DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-4,9-12,17 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1)
Regarding claim 1, Li discloses at least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors cause the one or more processors to (Li, [0013-0014] discloses a computing device comprising a processor, the memory, a communication interface. The memory is used to store at least one executable instruction, which causes the processor to perform certain operations):
perform a virtual switch (OpenFlow switch) comprising a Programming Protocol-independent Packet Processors (P4) proto (P4proto) portion (P4 protocol module) and comprising an ofproto portion (OpenFlow protocol module) to provide configurations (configuration/reconfiguration of OpenFlow switch) from control plane (SDN controller) to configure packet processing actions (forwarding performance) to be performed by a programmable pipeline of a packet processing device (Li, Step 131, [0049-0054], step 131, a Software Defined Network (SDN) controller is used to provide configuration/reconfiguration of an OpenFlow switch using P4 program to improve network forwarding performance. In step 131 runtime time information of the P4 program is sent to the software defined network SDN controller and the P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact based on the forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the configuration of the forwarding rule).
Li did not explicitly disclose “multiple control planes”, wherein: the provide configurations from multiple control planes to configure packet processing actions to be performed by the programmable pipeline of the packet processing device comprises providing a first configuration from a first control plane of the multiple control planes and providing a second configuration from a second control plane of the multiple control planes; the programmable pipeline is configured using the first configuration from the first control plane and the second configuration from the second control plane.
Faseela discloses “multiple control planes” (fig. 1, [0041]a SDN Controller 110A -C), wherein: the provide configurations from multiple control planes (first and second controllers) to configure packet processing actions to be performed (action for the switch to forward packets to the first controller via the first controller port) by the programmable pipeline of the packet processing device (packet processing pipeline of the switch) comprises providing a first configuration from a first control plane of the multiple control planes (Faseela, fig. 6, [0059] at block 610, a first controller generates an instruction (first configurations) for the switch to create a first group entry in a packet processing pipeline of the switch, where the first group entry includes a first bucket that specifies a first controller port as a watch port and an action for the switch to forward packets to the first controller via the first controller port, where the first controller port is a port that is associated with a control channel between the switch and the first controller, where the first controller being specified as the watch port in the first bucket indicates that execution of the action specified by the first bucket is to be contingent upon a liveness of the first controller port) and
providing a second configuration (an action for a switch to forward packets to a second controller port associated with a control channel) from a second control plane (second controller) of the multiple control planes (multiple controller use case) (Faseela, [0061] Block 615B describes a multiple controller use case in which a second controller generates an instruction (second configurations) that specifies a second controller port as a watch port and an action for the switch to forward packets to a second controller that is different from the first controller via the second controller port, where the second controller port is a port that is associated with a control channel between the switch and the second controller),
the programmable pipeline is configured using the first configuration (first instruction/configuration from the first controller) from the first control plane (first controller) and the second configuration (second instruction/configuration from the second controller) from the second control plane (second controller) (Faseela, fig. 6, [0059 -0061] at block 610, disclose a first controller generating first instruction (first configurations) for the switch to create a first group entry in a packet processing pipeline of the switch, that specifies a first controller port as a watch port and an action for the switch to forward packets to the first controller via the first controller port, where the first controller port is a port that is associated with a control channel. Block 615B describes a multiple controller use case in which a second controller generates an instruction (second configurations) that specifies a second controller port as a watch port and an action for the switch to forward packets to a second controller that is different from the first controller via the second controller port, where the second controller port is a port that is associated with a control channel between the switch and the second controller).
One of ordinary skill would have been motivated to combine the teachings of Li and Faseela because these teachings are from the same field of endeavor with respect to programmable packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Faseela with the teachings of Li, thereby enabling a multiple controller use case configuration where the instruction indicates that execution of an action specified by bucket is to be contingent upon a liveness of the controller port and sending the instruction to the switch to cause the switch to create the first group entry, Faseela, [Abstract].
Regarding claim 2, Li, and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, wherein the virtual switch is to provide inter-virtual execution environment communications and the virtual switch consistent with Open vSwitch, VPP, or Stratum (Li [0053] step 131, discloses a process of sending an operation time information of the P4 program to the software defined network SDN controller and the P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact in an inter-virtual environment based on a forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the mapping of the forwarding rule).
The motivation to combine is similar to that of claim 1.
Regarding claim 3, Li, and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, wherein a protocol or programming language of at least one of the multiple control planes comprises one or more of: Openflow, P4, C, Python, Broadcom Network Programming Language (NPL), Linux eBPF, or x86 compatible executable binaries (Li [0053] step 131, discloses a programming language such as a P4 program use to program a software defined network SDN controller executing a P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact in an inter-virtual environment based on a forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the mapping of the forwarding rule).
The motivation to combine is similar to that of claim 1.
Regarding claim 4, Li, and Faseela disclose the at least non-transitory computer-readable medium (non-transitory machine readable storage media 818) of claim 1, comprising instructions stored (networking software 820) thereon, that if executed by one or more processors (processors – 812) cause the one or more processors (812) to: receive a configuration of table entry format and configure the programmable pipeline with at least one configuration from one or more of the multiple control planes in a format consistent with the received table entry format (Faseela [0045] a packet processing pipeline 130 of the switch 120 includes one or more flow tables 140 and a group table 150. The packet processing pipeline 130 of the switch 120 includes flow tables 140A-M and group table 150. Each flow table 140 may include one or more flow entries 145. A flow table 140A is shown as including flow entries 145AA-AL. Each flow entry 145 may specify a match condition and a set of instructions. When the switch 120 receives an incoming packet, the switch 120 begins packet processing at the first (foremost) flow table 140 (e.g., table-0 in OpenFlow). The switch 120 matches the packet against flow entries 145 in the first flow table 140 and if the packet matches the match condition specified by a flow entry, the switch 120 executes the corresponding set of instructions specified by that flow entry).
The motivation to combine is similar to that of claim 1.
Regarding claim 9, Li, and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, wherein the packet processing device (Switch) comprises one or more of: a network interface controller (NIC), a remote direct memory access (RDMA)-enabled NIC, SmartNIC, router, switch, forwarding element, infrastructure processing unit (IPU), or data processing unit (DPU) (Li [0054] discloses a software defined network (SDN) controller comprises a P4 controller and an OpenFlow controller, with an open switch comprises P4 protocol module and OpenFlow protocol module, the open switch can realize the flow forwarding logic of the data packet).
The motivation to combine is similar to that of claim 1.
Regarding claim 10, Li discloses an apparatus (Li, [0013-0014] discloses a computing device comprising a processor, the memory, a communication interface. The memory is used to store at least one executable instruction, which causes the processor to perform certain operations): comprising:
a packet processing device (open switch) comprising a programmable packet processing pipeline (P4 program) that is configured using a virtual switch (Li [0053] at step 131, a P4 protocol module of the open switch interact with a the SDN controller based on the forwarding rule of the P4 protocol to configure a virtual switch for processing/forwarding packets. The P4 protocol module of the open switch and the OpenFlow protocol module perform the mapping of the forwarding rule);
the virtual switch (OpenFlow switch) comprises a Programming Protocol-independent Packet Processors (P4) proto (P4proto) component and an ofproto component (OpenFlow switch using P4 program) configuration of packet processing actions of the programmable packet processing pipeline (configuration/reconfiguration of an OpenFlow switch using P4 program) comprises receive a first configuration from a first control plane (SDN controller) of the multiple control planes (SDN controller, driving controller, P4 controller) (Li, Step 131, [0049-0054], discloses a software defined network SDN controller comprises a P4 controller and an OpenFlow controller, the open switch comprises P4 protocol module and OpenFlow protocol module, the open switch can realize the flow forwarding logic of the data packet. At step 131, the Software Defined Network (SDN) controller is used to provide configuration/reconfiguration of an OpenFlow switch using P4 program to improve network forwarding performance. In step 131 runtime time information of the P4 program is sent to the software defined network SDN controller and the P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact based on the forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the configuration of the forwarding rule).
Li did not explicitly disclose “multiple control planes”, wherein: packet processing actions of the programmable packet processing pipeline are configured by receipt of configurations from multiple control planes via the virtual switch, and receive a second configuration from a second control plane of the multiple control planes.
Faseela discloses “multiple control planes” (fig. 1, [0041]a SDN Controller 110A -C),
Furthermore, Faseela more explicitly disclose wherein: packet processing actions (packet forwarding configuration) of the programmable packet processing pipeline are configured by receipt of configurations (configurations from a first and second controllers) from multiple control planes (fig. 1, [0041] SDN Controllers 110A -C) via the virtual switch (virtualization layer 854/virtual switch 120) (Faseela, fig. 1, [0041;0059-0061;0083] discloses SDN Controllers 110A -C, each of the controllers may provide configuration information to switch 120 connected to the controllers. The switch may be a virtual switch included in a virtualization layer 854 and may be configured using a packet processing pipeline to specify a controller port as a watch port and an action for the switch to forward packets to a controller); and
receive a second configuration (second instruction/configuration from the second controller) from a second control plane (second controller) of the multiple control planes (fig. 1, [0041]a SDN Controller 110A -C), (Faseela, fig. 6, [0059 -0061] at block 610, disclose a first controller generating first instruction (first configurations) for the switch to create a first group entry in a packet processing pipeline of the switch, that specifies a first controller port as a watch port and an action for the switch to forward packets to the first controller via the first controller port, where the first controller port is a port that is associated with a control channel. Block 615B describes a multiple controller use case in which a second controller generates an instruction (second configurations) that specifies a second controller port as a watch port and an action for the switch to forward packets to a second controller that is different from the first controller via the second controller port, where the second controller port is a port that is associated with a control channel between the switch and the second controller).
The motivation to combine is similar to that of claim 1.
Regarding claim(s) 11-12 the claim(s) is/are rejected with rational similar to that of claim(s) 2-3, respectively.
Regarding claim 17, Li and Faseela discloses the apparatus of claim 10, comprising a server (Server device) that is to execute the virtual switch (implementing a virtual switch), wherein the server is communicatively coupled to the packet processing device (P4 protocol module switch) (Li, fig. 5, [0070;0077] discloses a server device implementing a SDN controller and a P4 protocol module switch of an open flow switch. The SDN controller and P4 protocol module switch of the open flow switch interact with forwarding rules to process and forward packets in the communication system).
The motivation to combine is similar to that of claim 1.
Regarding claim 21, Li and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, wherein the ofproto portion is to provide an interface consistent with OpenFlow (Li [0049-0054], step 131, discloses a Software Defined Network (SDN) controller used to provide configuration/reconfiguration of an OpenFlow switch using P4 program to improve network forwarding performance. In step 131 runtime time information of the P4 program is sent to the software defined network SDN controller and the P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact based on the forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the configuration of the forwarding rule).
The motivation to combine is similar to that of claim 1.
Claim(s) 5-6 and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1), further in view Atli et al. (US 2020/0028776 A1).
Regarding claim 5, Li, and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, but did not explicitly disclose wherein the multiple control planes (fig. 1, SDN controllers 110A-C)) comprise two or more of: a virtual switch controller, runtime server for the programmable pipeline, or kernel controller.
Atli discloses wherein the multiple control planes (fig. 19, Control planes 1920,1924 and 1928) comprise two or more of: a virtual switch controller, runtime server for the programmable pipeline, or kernel controller (Atli, fig. 3, [0028-0030] discloses software switches such as Open vSwitch (OVS) comprising a software-based virtual switching fabric (vSwitch) and virtual ports (vPort) on a purely software based SDN switch. The Software defined Network include SDN/server controllers and uses Programming Protocol-Independent Packet Processor (P4) as a preferred program for processing packets. Also, each of the vSwitches include controllers in the virtual switching fabric).
One of ordinary skill would have been motivated to combine the teachings of Li, Faseela and Atli because these teachings are from the same field of endeavor with respect to programmable packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Li and Faseela with the teachings of Atli, thereby enabling configuration messages to be translated to the programming language associated with the switching component of the network switch; and (e) programming the switching component according to translated messages, Atli, [0008].
Regarding claim 6, Li, Faseela and Atli disclose the at least one non-transitory computer-readable medium of claim 5, wherein the virtual switch controller configures the programmable pipeline with header field (IP header information in the IP packet) value matches and association action(s) related to one or more of: port selection (IP header information includes source IP address, destination IP address, source port, destination port (where “source port” and “destination port”), enabling of packet mirroring, or VXLAN utilization (Faseela [0086] virtual switch controller configures the programmable pipeline with header field that includes source IP address, destination IP address, source port, destination port (where “source port” and “destination port”. The port address identified in the packet header is used to select a port where the packet should be forwarded).
The motivation to combine is similar to that of claim 5.
Regarding claim(s) 13-14 the claim(s) is/are rejected with rational similar to that of claim(s) 5 and 6, respectively.
Claim(s) 7 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1), in view Atli et al. (US 2020/0028776 A1), further in view of Radi et al. (US 2020/0349080 A1).
Regarding claim 7, Li, Faseela and Atli disclose the at least one non-transitory computer-readable medium of claim 5, but did not explicitly disclose wherein the runtime server for the programmable pipeline configures the programmable pipeline with header field value matches and association actions related to one or more of: tunnels, mirroring, security group, connection tracking, forwarding, sampling of a flow to determine statistics, or link aggregation group (LAG).
Radi discloses wherein the runtime server for the programmable pipeline configures the programmable pipeline with header field value matches and association actions related to one or more of: tunnels, mirroring, security group, connection tracking, forwarding, sampling of a flow to determine statistics, or link aggregation group (LAG) (Radi, fig.4, [0057-0060] discloses a traffic manager 38 such as a runtime server receives a cache line request. The traffic manager 38/runtime server receives the cache line request as a packet by a parser module 34 of a programmable switch 112. The parser module 34 is configured to extract values from the packet, such as a destination address, operation type, or a source address, from a header in the packet for match-action operations performed by the ingress and egress stages. The extracted header values are fed into the ingress pipeline that includes stages 36.sub.1 and 36.sub.2. Traffic manager 38 may mirror the originally received packet for the cache line request to a port for host 120 to provide host 120 with cache miss data).
One of ordinary skill would have been motivated to combine the teachings of Li, Faseela, Atli and Radi because these teachings are from the same field of endeavor with respect to packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Li, Faseela and Atli with the teachings of Radi which enables a programmable switch to process cache line request from a plurality of clients, Radi [Abstract].
Regarding claim 15, the claim is rejected with rational similar to that of claim 7.
Claim(s) 8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1), in view Atli et al. (US 2020/0028776 A1), further in view of Waters (US 11,956,150 B1).
Regarding claim 8, Li, Faseela and Atli disclose the at least one non-transitory computer-readable medium of claim 5, but did not explicitly disclose wherein the kernel controller configures the programmable pipeline with one or more of: routing determination and tunneling.
Waters discloses wherein the kernel controller configures the programmable pipeline with one or more of: routing determination and tunneling (Waters, col. 5, lines 34-60, discloses a programmable network device 130 that can be configured to perform various packet processing operations, including packet filtering, pipeline processing, routing, etc. A packet analysis kernel 143 is configured to parse data packets entering via one or more of interface(s) 142, and determine how to process the data packets. If the data packet is associated with user data (for example, being destined to an external network and/or end-user device), then the data packet is transmitted to pipeline processing module 144. Pipeline processing module 144 can perform various operations. For secured data packets transmitted to host 134 and/or other network nodes via host 134. The host 134 can transmit the data packet to a session management function (SMF) via an N4 interface, while maintaining a secure tunnel such as IPsec).
One of ordinary skill would have been motivated to combine the teachings of Li, Faseela, Atli and Waters because these teachings are from the same field of endeavor with respect to packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Li, Faseela and Atli with the teachings of waters which enables a FPGA associated with a first network, to identify a data session associated with the data packet, and based on the identifying, routing the data packet to at least one of a host module coupled to the first FPGA or a pipeline processing circuit embedded into the first FPGA., waters, col. 2, lines 17-26.
Regarding claim 16, the claim is rejected with rational similar to that of claim 8.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1), further in view of Brar et al. (US 2022/0210070 A1).
Regarding claim 18, Li, and Faseela the apparatus of claim 17, but did not explicitly disclose comprising a data center that comprises the server and a second packet processing device, wherein the packet processing device is to transmit packets processed by the programmable packet processing pipeline to the second packet processing device.
Brar discloses a data center that comprises the server and a second packet processing device, wherein the packet processing device is to transmit packets processed by the programmable packet processing pipeline to the second packet processing device (Brar, fig. 1, [0065] discloses a distributed environment 100 comprises CSPI 101 that provides services and resources that customers can subscribe to and use to build their virtual cloud networks (VCNs). The CSPI 101 include data centers organized into one or more regions where is data center include physical servers (e.g., 202,203 and 208). [0113] the data centers provide packet processing data path in an NVD comprising multiple packet pipelines, each composed of a series of packet transformation stages. Upon receiving a packet, the packet is parsed and classified to a single pipeline. The packet is then processed in a linear fashion, one stage after another, until the packet is either dropped or sent out over an interface of the NVD).
One of ordinary skill would have been motivated to combine the teachings of Li, Faseela, Atli, and Brar because these teachings are from the same field of endeavor with respect to programmable packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Li, Faseela and Atli with the teachings of Brar, thereby enabling an L2 virtual network interface to emulate an L2 port of a L2 virtual network. Storm control information applicable to the L2 port is sent to a network virtualization device that hosts the L2 virtual network interface to improve functionality and value of virtual networks, Brar, [Abstract].
Claim(s) 19-20 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (CN 116033043 A) (filed 25 October 2021), in view of Faseela et al. (WO 2021/028931 A1), further in view of Csaba et al. (WO 2021/044191 A1).
Regarding claim 19, Li discloses a method comprising (Li [Abstract] discloses a method for protocol processing according to cloud management platform database and protocol database, implementing a P4 program by the compiler of the P4 program):
programming a programmable packet processing pipeline of a packet processing device by multiple control planes using a virtual switch comprising a Programming Protocol- independent Packet Processors (P4) proto (P4proto) component and an ofproto component (Li, Step 131, [0049-0054], step 131, a Software Defined Network (SDN) controller is used to provide configuration/reconfiguration of an OpenFlow switch using P4 program to improve network forwarding performance. In step 131 runtime time information of the P4 program is sent to the software defined network SDN controller and the P4 protocol module of the open switch, making the SDN controller and the P4 protocol module of the open switch interact based on the forwarding rule of the P4 protocol; the P4 protocol module of the open switch and the OpenFlow protocol module perform the configuration of the forwarding rule).
wherein the programming the programmable packet processing pipeline (Li [0058-0059] in step 13 discloses programming a programmable packet processing pipeline by sending the pipeline information of the P4 program to the P4 network interface module of a target hardware device, so that the P4 network interface module can communicate with the API interface of an open switch through the channel) comprises:
Li did not explicitly disclose “multiple control planes”, providing a first configuration from a first control plane of the multiple control planes and providing a second configuration from a second control plane of the multiple control planes and wherein the first configuration is a different protocol or language than the second configuration.
Faseela discloses “multiple control planes” (fig. 1, [0041]a SDN Controller 110A -C), comprising: providing a first configuration from a first control plane of the multiple control planes and providing a second configuration from a second control plane of the multiple control planes (Faseela, fig. 6, [0059 -0061] at block 610, disclose a first controller generating first instruction (first configurations) for the switch to create a first group entry in a packet processing pipeline of the switch, that specifies a first controller port as a watch port and an action for the switch to forward packets to the first controller via the first controller port, where the first controller port is a port that is associated with a control channel. Block 615B describes a multiple controller use case in which a second controller generates an instruction (second configurations) that specifies a second controller port as a watch port and an action for the switch to forward packets to a second controller that is different from the first controller via the second controller port, where the second controller port is a port that is associated with a control channel between the switch and the second controller).
One of ordinary skill would have been motivated to combine the teachings of Li and Faseela because these teachings are from the same field of endeavor with respect to programmable packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the] effective filing date of the claimed invention to modify the system of Faseela with the teachings of Li, thereby enabling a multiple controller use case configuration where the instruction indicates that execution of an action specified by bucket is to be contingent upon a liveness of the controller port and sending the instruction to the switch to cause the switch to create the first group entry, Faseela, [Abstract].
Li and Faseela did not explicitly disclose wherein the first configuration is a different protocol or language than the second configuration
Csaba discloses wherein the first configuration is a different protocol (P4 programming language/protocol and OpenFlow protocol) or language than the second configuration (Csaba [0029;0091] a packet forwarding pipeline that can be programmed using specialized languages such as the P4 programming language, by the P4 Language Consortium. The programming language works in connection with control protocols such as software defined networking (SDN) control protocols such as OpenFlow. Standards such as OpenFlow define the protocols used for the messages, as well as a model for processing the packets).
One of ordinary skill would have been motivated to combine the teachings of Li, Faseela and Csaba because these teachings are from the same field of endeavor with respect to programmable packet processing pipeline that is configured using a virtual switch.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Li, and Faseela with the teachings of Csaba, thereby enabling debugging of a parser in a packet processing pipeline of the programmable network device. The method includes receiving a packet for processing in the packet processing pipeline, initializing a tracing structure to record debugging information for the parser, adding a current state of the parser to the tracing structure, and determining a next state of the parser, Csaba, [Abstract].
Regarding claim 20, Li, Faseela and Csaba disclose the method of claim 19, wherein the protocol or programming language of at least one of the multiple control planes comprises one or more of: Openflow, P4, C, Python, Broadcom Network Programming Language (NPL), Linux eBPF, or x86 compatible executable binaries (Csaba [0029;0091] a packet forwarding pipeline that can be programmed using specialized languages such as the P4 programming language, by the P4 Language Consortium. The programming language works in connection with control protocols such as software defined networking (SDN) control protocols such as OpenFlow. Standards such as OpenFlow define the protocols used for the messages, as well as a model for processing the packets).
The motivation to combine is similar to that of claim 19.
Regarding claim 22, Li and Faseela disclose the at least one non-transitory computer-readable medium of claim 1, but did not explicitly disclose wherein: the first configuration is consistent with P4 language, the second configuration is consistent with OpenFlow protocol, the first configuration is to configure the programmable pipeline based on the P4 language, and the second configuration is to configure the programmable pipeline based on an OpenFlow protocol.
Csaba discloses wherein: the first configuration is consistent with P4 language, the second configuration is consistent with OpenFlow protocol, the first configuration is to configure the programmable pipeline based on the P4 language, and the second configuration is to configure the programmable pipeline based on an OpenFlow protocol (Csaba [0029;0091] a packet forwarding pipeline that can be programmed using specialized languages such as the P4 programming language, by the P4 Language Consortium. The programming language works in connection with control protocols such as software defined networking (SDN) control protocols such as OpenFlow. Standards such as OpenFlow define the protocols used for the messages, as well as a model for processing the packets).
The motivation to combine is similar to that of claim 19.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.F.D/Examiner, Art Unit 2451
/GLENFORD J MADAMBA/Primary Examiner, Art Unit 2451