DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims Status
Claims 1-14 are currently pending, claims 1, 8-14 are currently amended.
Response to Arguments
Applicant argues that amended claims 1 and 13-14 are not disclosed by the prior art of record. Applicant argues that “At a minimum, none of the cited references disclose or suggest an alternating current excitation circuit that excites the charging current using repeatedly applied alternating current, as recited by claim 1.” Applicant further states that amended independent claims 13-14 recite subject matter similar with respect to amended independent claim 1 and thus are also patentable over the cited prior art. The examiner provided new prior art reference TANAKA et al. (US 2018/0321326 A1) to address the added limitation.
The amended claims overcome the prior claim objections, the objections to claims 1 and 8-14 are withdrawn.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-4 and 8-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIMURA (US 2019/0036373 A1, hereinafter SHIMURA) in view of VAN LAMMEREN et al. (US 2015/0288213 A1, hereinafter VAN) and in further view of TANAKA et al. (US 20180/0321326 A1, hereinafter TANAKA).
Regarding claims 1 and 14 (claim 1 is considered representative for limitation matching purposes), SHIMURA discloses a power storage system comprising:
a power storage device including a battery (See Fig.2, Item#20, discloses a secondary battery);
a charging device including a charging circuit that supplies a charging current to battery (See Par,89, discloses an external charger connected to the terminals 35, 36); and
an alternating current excitation circuit that excites the charging current using an alternating current (See Pars.14, 89 and 135, disclose alternating-current generation unit);
the battery includes a complex impedance measuring unit configured to measure a current value of the alternating current used to excitate the charging current and a voltage value of each of the plurality of power storage cells (See Par.135, discloses” a known alternating-current impedance measurement unit. Par.17 discloses collecting charge current and charge voltage data and use them to determine internal resistance. Par.18 discloses that the internal resistance is determined from the AC impedance. The examiner interprets the previously cited paragraphs to mean that the charge current and charge voltage data and use the data to determine the complex impedance which is the used to determine the internal resistance), and
measure a complex impedance of each of the plurality of power storage cells from the measured current value and the measured voltage value (Pars.14, 18 and 45, disclose using current and voltage data measured in response to applied AC, to determine AC impedance “complex impedance”. Also, Par.17, discloses collecting charge current and charge voltage data and use them to determine internal resistance. Par.18 discloses that the internal resistance is determined from the AC impedance. The examiner interprets the previously cited paragraphs to mean that the charge current and charge voltage data and use the data to determine the complex impedance which is the used to determine the internal resistance); and
the charging device includes a charging control unit configured to control the charging current based on the complex impedance (See Figs.2 and 10, Item#30 and Par.75, discloses a charge control circuit which controls charging current for charging secondary battery 20. Par.136, discloses determining complex impedance from current and voltage data (flowing AC), then determine the internal resistance from the complex impedance and then the internal temperature is acquired from the internal resistance. Current is controlled based on the internal temperature which is derived from the complex impedance).
However, SHIMURA does not disclose the battery comprises a cell stack including a plurality of power storage cells or that the alternating current excites a charging current using repeatedly applied alternating current.
VAN discloses a battery charging and evaluation apparatus, wherein the battery comprises a cell stack including a plurality of power storage cells (See Fig.1, Item#130, discloses a battery comprising a cell stack including a plurality of power storage cells).
SHIMURA and VAN are analogous art since they both deal with battery charging and evaluation circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA with the teachings of VAN by using a cell stack including a plurality of power storage cells for the benefit of providing a higher voltage output.
However, SHIMURA and VAN do not disclose that the alternating current excites a charging current using repeatedly applied alternating current.
TANAKA discloses a system and method for calculating a complex impedance of a power storage device, the complex impedance is determined through repetitive calculation of the alternating-current voltage and alternating-current current (See Par.53).
SHIMURA, VAN and TANAKA are analogous art since they all deal with battery charging and evaluation circuits.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA and VAN with the teachings of TANAKA by performing repetitive application of alternating current and measurement of complex impedance for the benefit of increasing the accuracy of he measurement and providing continued monitoring of the power storage device.
Regarding claim 2, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, wherein the charging control unit is configured to estimate an internal temperature of each of the plurality of power storage cells based on an external temperature of the cell stack (See SHIMURA, Par.138, discloses an internal temperature of the battery is estimated from surface temperature of the battery) and the complex impedance (See SHIMURA, Par.14 discloses that the internal resistance is determined from the AC impedance. Par.14 further discloses acquiring the internal temperature of the secondary battery from the internal resistance value when the secondary battery is charging), and
optimize the charging current according to the estimated internal temperature (See SHIMURA, Pars.75 and 132, disclose controlling charging current based on the internal temperature).
Regarding claim 3, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 2 as discussed above, wherein the charging control unit is configured to estimate the internal temperature of each of the plurality of power storage cells according to at least one temperature distribution data (See SHIMURA, Par.138, discloses an internal temperature of the battery is estimated from surface temperature of the battery), and the temperature distribution data indicating a distribution of the external temperature and the internal temperature of the cell stack (See Par.138, discloses determining the internal temperature from the external temperature. This implicitly indicates the presence of distribution “relationship” between internal temperature and external temperature).
Regarding claim 4, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, wherein the charging control unit is configured to control the charging current according to a deterioration state of each of the plurality of power storage cells estimated from the complex impedance (See SHIMURA, Par.14 discloses that the internal resistance is determined from the AC impedance and Par.14 further discloses acquiring the internal temperature of the secondary battery from the internal resistance value when the secondary battery is charging and controlling charging based on the internal temperature. The examiner explains that internal resistance in closely related to battery deterioration i.e. as battery deterioration increases the internal resistance increases. Charging current is controlled based on internal temperature which is derived from the battery internal resistance).
Regarding claims 8 and 13 (Claim 8 is considered representative for limitation matching purposes, claim 13 includes limitations disclosed by claims 1 and 8), SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1, comprising:
wherein the power storage device includes:
the cell stack (See VAN Fig.1, Item#130 discloses a cell stack. Part of the modification SHIMURA in view of VAN to address claim 1. See rejection above);
the alternating current excitating circuit (See SHIMURA, Fig.10, Item#40A and Par.135, disclose “The temperature information acquisition device 40A in the second embodiment includes a known alternating-current generation unit that generates the alternating current”);
the complex impedance measuring unit (See SHIMURA, Fig.10, Item#40A and Par.135, disclose “The temperature information acquisition device 40A…includes… a known alternating-current impedance measurement unit…”); and
a first communication circuit that transmits information about the complex impedance to the charging device (See SHIMURA, Fig.4A, discloses the temperature information acquisition device 40A [including the AC impedance measurement unit, Par,.135], a signal line from the device 40A to the charge control device is displayed showing a transfer of data between the two devices and implicitly indicates communication circuit that transmits the information to the charge controller. The internal temperature is considered a representation of the AC impedance), and
the charging device includes:
the charging circuit (See SHIMURA, Par.89, discloses an external charger connected to the terminals 35, 36);
the charging control unit (See SHIMURA, Figs.2 and 10, Item#30, disclose a charge controller); and
a second communication circuit that receives the information about the complex impedance from the power storage device (See Fig.10, discloses signal lines between the charge controller 30 and the temperature acquisition device 40A, this implicitly indicates a communication circuit/interface at the charge controller to receive data from the temperature acquisition device 40A).
Regarding claim 9, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 8 as discussed above, However, SHIMURA, VAN and TANAKA as applied to claim 8 do not disclose wherein the power storage device includes a reference signal generation circuit that generates a reference frequency signal, the alternating current excitation circuit generates the alternating current synchronized with the reference frequency signal, and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal.
VAN further discloses the power storage device includes a reference signal generation circuit that generates a reference frequency signal (See Fig.2, Item#224 and Par.32, disclose a sine (or cosine) generator 224 provides a reference signal to a synchronous demodulator 225) and
the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal (See Fig.2 and Par.32, discloses the synchronous demodulator receives the reference frequency signal output from the reference signal generator 224 and generates outputs indicative of real and imaginary parts of an impedance of the cell 230).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA, VAN and TANAKA as applied to claim 1 with the further teachings of VAN by adding the a phase synchronization circuit that generates a reference frequency signal synchronized with the alternating current used to excite the charging current and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal for the benefit of setting a frequency or level of modulated charging to mitigate reduction in cell lifetime (See VAN, Par.32).
Regarding claim 10, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, comprising:
wherein the power storage device includes:
the cell stack (See SHIMURA, Figs.2 and 10, Item#20, disclose a secondary battery, SHIMURA as modified by VAN as applied to claim 1 discloses a cell stack [VAN, Fig.1, Item#130]);
the complex impedance measuring unit (See SHIMURA, Fig.10, Item#40A and Par.135, disclose an AC impedance measurement unit); and
the charging device includes:
the alternating current excitation circuit (See SHIMURA, Par.135, discloses “a known alternating-current generation unit”);
the charging circuit (See SHIMURA Par,89, discloses an external charger connected to the terminals 35, 36); and
the charging control unit (See Fig.10, Item#30).
However, SHIMURA, VAN and TANAKA as applied to claim 1 do not disclose a phase synchronization circuit that generates a reference frequency signal synchronized with the alternating current used to excite the charging current and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal.
VAN discloses a phase synchronization circuit that generates a reference frequency signal synchronized with the alternating current used to excite the charging current (See Fig.2, Item#224 and Par.32, disclose a sine (or cosine) generator 224 provides a reference signal to a synchronous demodulator 225) and
the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal (See Fig.2 and Par.32, discloses the synchronous demodulator receives the reference frequency signal output from the reference signal generator 224 and generates outputs indicative of real and imaginary parts of an impedance of the cell 230).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA, VAN and TANAKA as applied to claim 1 with the further teachings of VAN by adding the a phase synchronization circuit that generates a reference frequency signal synchronized with the alternating current used to excite the charging current and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal for the benefit of setting a frequency or level of modulated charging to mitigate reduction in cell lifetime (See VAN, Par.32).
Regarding claims 11-12, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, comprising:
wherein the power storage device includes:
the cell stack (See SHIMURA, Figs.2 and 10, Item#20, disclose a secondary battery, SHIMURA as modified by VAN as applied to claim 1 discloses a cell stack [VAN, Fig.1, Item#130];
the complex impedance measuring unit (See SHIMURA, Fig.10, Item#40A and Par.135, disclose an AC impedance measurement unit);
a first communication circuit that transmits information about the complex impedance to the charging device (See SHIMURA, Fig.4A, discloses the temperature information acquisition device 40A [including the AC impedance measurement unit, Par,.135], a signal line from the device 40A to the charge control device is displayed showing a transfer of data between the two devices and implicitly indicates communication circuit that transmits the information to the charge controller. The internal temperature is considered a representation of the AC impedance); and
the charging device includes:
the alternating current excitation circuit (See SHIMURA, Par.135, discloses “a known alternating-current generation unit”);
the charging circuit (See SHIMURA, Par.89, discloses an external charger connected to the terminals 35, 36);
the charging control unit (See SHIMURA, Fig.10, Item#30); and
a second communication circuit that receives the information about the complex impedance from the power storage device (See Fig.10, discloses signal lines between the charge controller 30 and the temperature acquisition device 40A, this implicitly indicates a communication circuit/interface at the charge controller to receive data from the temperature acquisition device 40A).
However, SHIMURA, VAN and TANAKA do not disclose a reference signal generation circuit that generates a reference frequency signal from the alternating current frequency information and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal or receives alternating current frequency information about a frequency of the repeatedly applied alternating current.
VAN discloses a reference signal generation circuit that generates a reference frequency signal from the alternating current frequency information (See Fig.2, Item#224 and Par.32, disclose a sine (or cosine) generator 224 provides a reference signal to a synchronous demodulator 225) and
the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal (See Fig.2 and Par.32, discloses the synchronous demodulator receives the reference frequency signal output from the reference signal generator 224 and generates outputs indicative of real and imaginary parts of an impedance of the cell 230).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA, VAN and TANAKA as applied to claim 1 with the further teachings of VAN by adding the a phase synchronization circuit that generates a reference frequency signal synchronized with the alternating current used to excite the charging current and the complex impedance measuring unit is configured to measure the complex impedance using the reference frequency signal for the benefit of setting a frequency or level of modulated charging to mitigate reduction in cell lifetime (See VAN, Par.32).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIMURA in view of VAN and TANAKA and in further view of FUJI HEAVY IND LTD (JP2007024687, hereinafter FUJI).
Regarding claim 5, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, wherein based on the complex impedance, the charging control unit is configured to optimize the charging current according to deterioration information that indicates an extent of deterioration of each of the plurality of power storage cells (See SHIMURA, Par.14 discloses that the internal resistance is determined from the AC impedance and Par.14 further discloses acquiring the internal temperature of the secondary battery from the internal resistance value when the secondary battery is charging and controlling charging based on the internal temperature. The examiner explains that internal resistance in closely related to battery deterioration i.e. as battery deterioration increases the internal resistance increases. Charging current is controlled based on internal temperature which is derived from the battery internal resistance).
However, SHIMURA, VAN and TANAKA do not disclose the deterioration information is obtained from an external server device.
FUJI discloses a battery management server which receives battery information of a power supply unit and analyzes the data to estimate battery deterioration state (See Pars.26-27) and battery management server then communicates the battery deterioration state to the power supply unit (See Par.26).
SHIMURA, VAN, TANAKA and FUJI are analogous art since they all deal with battery charging and evaluation.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA, VAN and TANAKA with the further teachings of FUJI by decentralizing the battery deterioration estimation for the benefit of allowing a single server to provide the deterioration estimation to a plurality of power sources.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIMURA in view of VAN and TANAKA and in further view of NODA et al. (US 2013/0027828, hereinafter NODA).
Regarding claim 7, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 2 as discussed above, SHIMURA, VAN and TANAKA further disclose reducing the charging current when the temperature exceeds a threshold (See SHIMURA discloses lowering the charging current when the temperature exceeds a threshold).
However, SHIMURA, VAN and TANAKA do not disclose wherein the charging control unit is configured to suspend charging when the internal temperature reaches a threshold.
NODA discloses a battery protection system wherein the charging control unit is configured to suspend charging when the internal temperature reaches a threshold (See Pars.28 and 179, disclose suspending charging when a estimated value of battery internal temperature exceeds a threshold).
SHIMURA, VAN, TANAKA and NODA are analogous art since they all deal with battery charging and protection.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention disclosed by SHIMURA, VAN and TANAKA with the teachings of NODA by suspending charging when the internal temperature reaches a threshold for the benefit of protecting the battery against damage caused by overheating.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over SHIMURA in view of VAN and TANAKA and in further view of YEBKA et al. (US 2018/0034283 A1, hereinafter YEBKA).
Regarding claim 6, SHIMURA, VAN and TANAKA disclose the power storage system according to claim 1 as discussed above, However, SHIMURA, VAN and TANAKA do not disclose wherein the charging control unit is configured to determine a value of the charging current to shorten a charging time required for a charge level of the cell stack to reach a predetermined level.
YEBKA discloses a system which increases charging rate based on impedance comprising charging control unit is configured to determine a value of the charging current to shorten a charging time required for a charge level of the cell stack to reach a predetermined level (See Par.40, discloses logic increases the charging rate based on battery impedance. Increasing charging rate inherently reduced the charging time).
SHIMURA, VAN, TANAKA and YENKA are analogous art since they all deal with battery charging and monitoring.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the invention disclosed by SHIMURA, VAN and TANAKA with the teachings of YEBKA by increasing charging rate based on impedance for the benefit of ensuring the quick availability of the power storage by shortening the charging time.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AHMED H OMAR whose telephone number is (571)270-7165. The examiner can normally be reached 10:00 am -7:00 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/AHMED H OMAR/Primary Examiner, Art Unit 2859