Prosecution Insights
Last updated: August 15, 2026
Application No. 17/700,415

SYSTEMS AND METHODS FOR ESTABLISHING A NERVE BLOCK

Non-Final OA §103§112
Filed
Mar 21, 2022
Priority
Jan 13, 2016 — provisional 62/278,337 +3 more
Examiner
LEE, ERICA SHENGKAI
Art Unit
3796
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Setpoint Medical Corporation
OA Round
4 (Non-Final)
65%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 65% — above average
65%
Career Allowance Rate
398 granted / 611 resolved
-4.9% vs TC avg
Strong +30% interview lift
Without
With
+30.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
42 currently pending
Career history
654
Total Applications
across all art units

Statute-Specific Performance

§101
6.4%
-33.6% vs TC avg
§103
51.3%
+11.3% vs TC avg
§102
11.2%
-28.8% vs TC avg
§112
24.9%
-15.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 611 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 24, 2026 has been entered. Response to Amendment Claims 14-15, 19 have been amended. Claims 1-13 were previously canceled. Currently, claims 14-21 are pending for examination. Response to Arguments Applicant’s arguments, see pages 5-7, filed July 24, 2026, with respect to the rejection(s) of claim(s) 14-20 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made for claims 14-21 in view of Bradley et al. (US 2007/0019770). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 20 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 20 recites, “wherein the preset signal is based on a set length of time, the voltage value, or the current value” (emphasis added). In view of the amendments made to claim 14 requiring the trigger is based on an electrical condition including a voltage value or a current value associated with operation of the device, claim 20 is definite if the preset signal is based on the voltage value or the current value but the claim is indefinite if the preset signal is based on a set length of time, as a set length of time is not regarded as an electrical condition. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 14-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Faltys et al. (US 2011/0190849) in view of Bradley et al. (US 2007/0019770). Regarding claim 14, Faltys et al. discloses a leadless, implantable microstimulator device comprising: a housing (“The POD may be constructed with a biocompatible and durable polymer” [0018]); at least two electrically conductive contacts disposed on the housing ([0019], [0021], [0037]; fig. 4); a microcontroller configured to control stimulation of a vagus nerve from the electrically conductive contacts ([0028], [0045], [0054], “MCU” [0156-0158], [0177]); a first clock to keep time ([0027], [0150]). Faltys et al. does not expressly disclose a second clock linked to a calibration module and having more accurate time-keeping capabilities than the first clock, wherein a trigger causes the calibration module to commence a calibration routine configured to periodically calibrate the first clock using the second clock, wherein the trigger is based on an electrical condition including a voltage value or a current value associated with the operation of the device. Bradley et al. teaches it is known in the art for a device with a microcontroller (“microprocessor”) to also comprise a highly versatile low power, high accuracy clock system using a programmable clock calibration wherein periodically, a calibration command from a processor triggers a calibration operation wherein a high power, high accuracy reference oscillator clock is enabled for only a limited time during which its output frequency is compared to that of a low accuracy, low power calibratable clock ([0009]). Bradley et al. teaches the calibration command is generated based on an electrical condition including a voltage value or current value associated with operation of the device ([0025]), and when the command is provided, the higher accuracy, higher power clock is turned on to periodically calibrate the low accuracy, low power clock ([0024]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Faltys et al. to provide a second clock linked to a calibration module and having more accurate time-keeping capabilities than a first clock, wherein a trigger causes the calibration module to commence a calibration routine configured to periodically calibrate the first clock using the second clock, wherein the trigger is based on an electrical condition including a voltage value or a current value associated with the operation of the device, as taught by Bradley et al. in order to provide a highly versatile low power but high accuracy clock system for the microcontroller (“[0003], [0009]). Regarding claim 15, Faltys et al. in view of Bradley et al. disclose wherein the second clock is configured to be in an idle mode when not calibrating the first clock (“In operation, the higher accuracy, higher power oscillator clock "0", 12 is normally off” [0024]), further wherein the electrical condition corresponds to a change in operating current or supply voltage of the microcontroller (“That calibration command can be developed in processor 28 by for example, monitoring time, temperature, voltage, current or any other desired parameter, so that upon a change in condition or any of those parameters processor 28 will respond by among other things providing the calibration command on line 20.” [0025]). Regarding claim 16, Faltys et al. discloses a resonator ([0042]) comprising a coil and a capacitor configured to resonate at a predetermined frequency range, wherein an electronic assembly is configured to receive power from the resonator to charge a battery ([0052], [0196]). Regarding claim 17, Faltys et al. in view of Bradley et al. disclose wherein a control circuitry is configured to be triggered by the trigger such that upon triggering, the control circuitry turns the second clock on, uses the second clock to calibrate the first clock, then turns the second clock off ([0011], [0024-0025]). Regarding claim 18, Faltys et al. in view of Bradley et al. disclose wherein the control circuitry is configured to correct a time drift of the first clock after the calibration routine is performed ([0011], [0024-0025]). Regarding claim 19, Faltys et al. in view of Bradley et al. disclose wherein the trigger comprises a preset signal (“calibration command” [0025]) programmed into the control circuitry. Regarding claim 20, Faltys et al. in view of Bradley et al. disclose wherein the preset signal is based on a set length of time, the voltage value, or the current value (“That calibration command can be developed in processor 28 by for example, monitoring time, temperature, voltage, current or any other desired parameter, so that upon a change in condition or any of those parameters processor 28 will respond by among other things providing the calibration command on line 20.” [0025]). Regarding claim 21, Faltys et al. discloses a leadless, implantable microstimulator device comprising: a housing (“The POD may be constructed with a biocompatible and durable polymer” [0018]); at least two electrically conductive contacts disposed on the housing ([0019], [0021], [0037]; fig. 4); a microcontroller configured to control stimulation of a vagus nerve from the electrically conductive contacts ([0028], [0045], [0054], “MCU” [0156-0158], [0177]); a first clock to keep time ([0027], [0150]). Faltys et al. does not expressly disclose a second clock having more accurate time-keeping capabilities than the first clock, wherein the second clock is configured to periodically calibrate the first clock, wherein control circuitry is configured to be triggered by an event such that upon triggering, the control circuitry turns the second clock on, uses the second clock to calibrate the first clock, then turns the second clock off, wherein the event comprises a preset signal programmed into the control circuitry, wherein the preset signal is based on a voltage value threshold or a current value threshold. Bradley et al. teaches it is known in the art for a device with a microcontroller (“microprocessor”) to also comprise a highly versatile low power, high accuracy clock system using a programmable clock calibration wherein periodically, a calibration command from a processor triggers a calibration operation wherein a high power, high accuracy reference oscillator clock is enabled for only a limited time during which its output frequency is compared to that of a low accuracy, low power calibratable clock ([0009]). Bradley et al. teaches the preset calibration command is generated based on an electrical condition including a voltage value threshold or current value threshold associated with operation of the device (“That calibration command can be developed in processor 28 by for example, monitoring… voltage, current… so that upon a change in condition or any of those parameters processor 28 will respond by… providing the calibration command” [0025]), and when the command is provided, the higher accuracy, higher power clock is turned on to periodically calibrate the low accuracy, low power clock ([0024]) and after calibration of the low accuracy, low power clock has been completed, turning off the higher accuracy, higher power clock ([0025]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Faltys et al. to provide a second clock having more accurate time-keeping capabilities than the first clock, wherein the second clock is configured to periodically calibrate the first clock, wherein control circuitry is configured to be triggered by an event such that upon triggering, the control circuitry turns the second clock on, uses the second clock to calibrate the first clock, then turns the second clock off, wherein the event comprises a preset signal programmed into the control circuitry, wherein the preset signal is based on a voltage value threshold or a current value threshold, as taught by Bradley et al. in order to provide a highly versatile low power but high accuracy clock system for the microcontroller ([0003], [0009]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERICA S LEE whose telephone number is (571)270-1480. The examiner can normally be reached M-F 8-7pm, flex. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Hamaoui can be reached at (571) 270-5625. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERICA S LEE/Primary Examiner, Art Unit 3796
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Prosecution Timeline

Show 1 earlier event
Feb 11, 2025
Non-Final Rejection mailed — §103, §112
Jun 11, 2025
Response Filed
Sep 12, 2025
Non-Final Rejection mailed — §103, §112
Jan 12, 2026
Response Filed
Feb 24, 2026
Final Rejection mailed — §103, §112
Jul 24, 2026
Request for Continued Examination
Jul 27, 2026
Response after Non-Final Action
Aug 05, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
65%
Grant Probability
96%
With Interview (+30.5%)
3y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 611 resolved cases by this examiner. Grant probability derived from career allowance rate.

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