DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined
under the first inventor to file provisions of the AIA .
Applicant cancelled claims 2 and 9.
Response to Arguments
3.1. Regarding the Double Patenting rejection:
The applicant argument regarding the Double Patenting rejection is noted.
3.2. Regarding the 35 USC § 103 rejection:
Applicant argues that the test and measurement instrument as claimed in amended claim 1, and in the method of amended claim 8, has three memory components. The acquisition memory 112 in FIG. 1, the data store 120 to which the waveform samples are transferred automatically without regard to any criteria, and the data store history 152, which is the secondary memory. The data store history 152 may be a partition of the data store, but functions separately from the data store [paragraph 0024]. Neither Niles nor Lee, nor the combination thereof teaches three memory components.
The examiner respectfully disagrees with the applicant’s argument because Lee discloses three memory components:
A “disk 110” which correspond to the claimed “acquisition memory” (see Fig. 1).
Metadata & logic block address mapping/file management structure., The system maintains “metadata and logic block address (LBA) lists”, which together function as a “data store” management layer holding information about each file (e.g., its name, type, and address) (see col. 2, lines 15-22, “The metadata may include at least one of a file path, a file extension, a file capacity, and a file name. The metadata may exist in a portion of the first storage device” and “The logic block address list may exist in a portion of the second storage device”. Thus, the “data store” corresponds to the logical record of acquisitions/files stored in the disk, with metadata controlling transfer and caching operations.
The “non-volatile memory / NVC (160, 330)” which corresponds to the claimed “A secondary memory”. The secondary memory matches the non-volatile cache (NVC) or flash memory (e.g., PRAM, FRAM, MRAM, NAND, NOR, etc.) (see col. 2, lines 59-62), which is explicitly called the second storage device: “the second storage device 226 may be a non-volatile memory” (see col. 5, lines 59-65) and “The NVC 160 is a non-volatile memory to which data can be written” (see col. 5, lines 7-8). This secondary memory holds copies of selected files that satisfy defined criteria, (see col. 5, lines 38-45, “When the metadata satisfies the setup condition, the CPU 145 reads the file to be read from the disk 110 and stores the file in the NVC 160, and transmits the file to be read that is stored in the NVC 160 to the host. The CPU 145 adds an LBA of the file to be read to the LBA list to update the LBA list. When the metadata does not satisfy the setup condition, the CPU 145 reads the file to be read from the disk 110 and transmits the file to the host”; see col. 2, lines 18-20, “The setup condition may include a file extension condition, a file capacity condition, or a file name condition. The setup condition may be added, modified, or deleted by the use”).
The applicant further argues that Further, the secondary memory/data store history stores not only those acquisitions that meet a particular criteria, but also it builds a list of all the acquisitions that meet the one or more criteria while the test and measurement instrument is operating.
The examiner notes that Lee discloses that:
“When the metadata satisfies the setup condition, the CPU 145 reads the file to be read from the disk 110 and stores the file in the NVC 160, and transmits the file to be read that is stored in the NVC 160 to the host” (see col. 5, lines 38-45) and “If the metadata satisfies the setup condition, the file to be read is read from the hard disk using the logic block address in operation S450. Then, the file to be read is stored in the flash memory in operation S455” (see col. 7, lines 7-15). The examiner notes that these passages show that only when the metadata (criteria) are satisfied is the file copied into the secondary memory. Files that don’t satisfy the condition remain only on the disk.
“The logic block address of the file to be read is stored in the logic block address list in operation S465” (see col. 7, lines 13-15); “The LBA list refers to LBAs of data file that is stored both on the disk 110 and in the NVC 160 at the same time. The LBA list may exclude data files that are stored only in the disk 110” (see col. 5, lines 12-22); and “The CPU 145 adds an LBA of the file to be read to the LBA list to update the LBA list” (see col. 5, lines 41-42). The examiner notes that these passages show that each time a file meets the condition and is copied to the secondary memory, its logic block address is added to an ongoing list, the LBA list. Therefore, this list serves as a continuously updated record (history) of all data that met the setup condition while the system was operating.
The applicant further argues that claim 8 recite that the secondary memory
produces a data store history of all acquisitions that meet the one or more criteria.
The examiner notes that Lee discloses that 2. “The logic block address of the file to be read is stored in the logic block address list in operation S465” (see col. 7, lines 13-15); “The LBA list refers to LBAs of data file that is stored both on the disk 110 and in the NVC 160 at the same time” (see col. 5, lines 12-22). That list represents a history of all qualifying copies made during system operations, each entry marking that a file met the condition and was cached, which corresponds functionally to a “data store history of all acquisitions that meet the one or more criteria.”
The examiner also notes that Lee may differ only in intended application, i.e., applying the same selective storage and history logic to a test and measurement device instead of a hybrid hard disk drive. However, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply such known condition-based selective data storage and history tracking methods from hybrid drive systems to a test and measurement contest, because both involve managing large volumes of digital data and would benefit from storing only data meeting specified criteria to improve system speed and memory efficiency (MPEP §2143). The modification would constitute a predictable use of prior art elements according to their established functions (see KSR int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Double Patenting
The non-statutory double patenting rejection is based on a judicially created
doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A non-statutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a non-statutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 1 and 5 are provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claim 1 of co-pending Application No. 17/701,662. An obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but an examined application claim not is patentably distinct from the reference claim(s) because the examined claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985). Although the conflicting claims are not identical, they are not patentably distinct from each other because claims 1 and 2 of the present application are anticipated by claim 1 of co-pending Application No. 17/701,662. Specifically, since claim 1 of co-pending Application No. 17/701,662 uses extra element(s) that is/are not required in claims 1 and 2 of the present application.
This is a provisional obviousness-type double patenting rejection because the conflicting claims have not in fact been patented.
Claims 4 and 7 are provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claims 6 and 10, respectively, of co-pending Application No. 17/701,662. An obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but an examined application claim not is patentably distinct from the reference claim(s) because the examined claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985). Although the conflicting claims are not identical, they are not patentably distinct from each other because claims 4 and 7 of the present application is anticipated by claims 6 and 10, respectively, of co-pending Application No. 17/701,662.
This is a provisional obviousness-type double patenting rejection because the conflicting claims have not in fact been patented.
Claim 8 is provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claim 11 of co-pending Application No. 17/701,662. An obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but an examined application claim not is patentably distinct from the reference claim(s) because the examined claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985). Although the conflicting claims are not identical, they are not patentably distinct from each other because claim 8 of the present application are anticipated by claim 11 of co-pending Application No. 17/701,662. Specifically, since claim 11 of co-pending Application No. 17/701,662 uses extra element(s) that is/are not required in claim 8 of the present application.
This is a provisional obviousness-type double patenting rejection because the conflicting claims have not in fact been patented.
Claims 11 and 14 are provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claims 16 and 20, respectively, of co-pending Application No. 17/701,662. An obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but an examined application claim not is patentably distinct from the reference claim(s) because the examined claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985). Although the conflicting claims are not identical, they are not patentably distinct from each other because claims 11 and 14 of the present application is anticipated by claims 16 and 20, respectively, of co-pending Application No. 17/701,662.
This is a provisional obviousness-type double patenting rejection because the conflicting claims have not in fact been patented.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all
obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-8 and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Niles et al. (Pub. No. US 2014/0095098) (hereinafter Niles) in view of Lee et al. (Patent Number US 8,656,097) (hereinafter Lee).
As per claims 1 and 8, Niles teaches a test and measurement device comprising an input configured to receive a signal for testing (see paragraph [0003]); an acquisition memory (see Abstract, and ¶¶ [0003], [0023], [0030], i.e., acquisition memory 56); a data store (see ¶¶ [0020], [0026], [0028], i.e., processor memory 23); a secondary memory (see ¶¶ [0025], [0027], i.e., segmented memory 62) an acquisition processor configured to generate an acquisition from the received signal, store the acquisition in an acquisition memory independent of one or more criteria selected by a user that will thereafter be compared against the acquisition, and to copy the acquisition stored in the acquisition memory to a data store (see ¶¶ [0003]-[0006] and [0017] i.e., “the sequence of (n) acquisitions may be analyzed in accordance with user-defined signal threshold settings”); and an acquisition evaluator configured to: compare the acquisition in the data store against the one or more criteria (i.e. user defined threshold) selected by the user (see ¶¶ [0017] and [0018]), identify whether the selected acquisition meets the one or more criteria (see paragraph [0015], “C) continues acquiring while searching for any signal which does not match the signal history, e.g. rare anomalies; and D) once a signal history violation is detected, the trigger settings are modified so as to only trigger on the learned anomaly”).
Niles fails to explicitly teach copy the acquisition from the data store to a secondary memory when the acquisition meets the one or more criteria to thereby store only those acquisitions that meet the one or more criteria in the secondary memory.
Lee teaches “searching metadata of a file to be read; determining whether the metadata satisfies a predetermined setup condition (i.e. whether a size of the file exceeds a threshold size); and if the metadata satisfies the setup conditions, copying the file to be read, from a first storage device and storing the file in a second storage device” (see abstract, col. 1, line 66 through col. 2, line 4 and col. 8, lines 25-34).
Niles fails to explicitly teach that the secondary memory comprising a data store history of all acquisitions that meet the one or more criteria during operation of the test and measurement device.
However; Lee teaches that 2. “The logic block address of the file to be read is stored in the logic block address list in operation S465” (see col. 7, lines 13-15); “The LBA list refers to LBAs of data file that is stored both on the disk 110 and in the NVC 160 at the same time. The LBA list may exclude data files that are stored only in the disk 110” (see col. 5, lines 12-22); and “The CPU 145 adds an LBA of the file to be read to the LBA list to update the LBA list” (see col. 5, lines 41-42).
The examiner notes that these passages show that each time a file meets the condition and is copied to the secondary memory, its logic block address is added to an ongoing list, the LBA list. Therefore, this list serves as a continuously updated record (history) of all data that met the setup condition while the system was operating.
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to incorporate Lee’s teaching into Niles’s invention because large files would be stored in different memory storage having larger storage capacity. Therefore, functionality of the system would be improved.
As per claims 3 and 10, Niles further teaches that the one or more criteria includes at least two criteria joined by a Boolean operator (see ¶ [0023] and Fig. 2, “OR gate”).
As per claims 4, 5, 11 and 12, Niles further teaches that the acquisition evaluator is further configured to: select an acquisition from the secondary memory; compare the selected acquisition from the secondary memory to a second one or more criteria; and identify whether the selected acquisition from the secondary memory meets the second one or more criteria (see ¶¶ [0030]-[0031]).
As per claims 6 and 13, Niles further teaches that the measurement processor is a cumulative processor (i.e. oscilloscope, which is a cumulative processor) (see ¶ [0015]).
As per claims 7 and 14, Niles further teaches that the one or more criteria comprises at least one of a visual trigger, a measurement trigger, an event trigger, a search result, a mask test, a bus decode result, or a hardware trigger (see ¶¶ [0004], [0010], [0015], [0019] and [0024]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in
this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact information
Any inquiry concerning this communication or earlier communications from the
examiner should be directed to MOHAMED CHARIOUI whose telephone number is (571)272-2213. The examiner can normally be reached Monday through Friday, from 9 am to 6 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached on (571) 272-2302. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Mohamed Charioui
/MOHAMED CHARIOUI/Primary Examiner, Art Unit 2857