DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 3-7 and 9-12 are pending in this application. Claims 1, 3, 5-7, 9 and 11-12 are currently amended; claims 4 and 10 are original; claims 2 and 8 are canceled.
Remarks
Claim 7 recites “An operation method for a memory device receiving an encoded input and an encoded weight data, wherein an input data is encoded into the encoded input by duplicating each bit of the input data and encoding the duplicated bits into a unary coding format including a spare bit; a first part and a second part of a weight data are encoded into unary-coded MSB and LSB vectors of the encoded weight data, respectively, by duplicating each bit of the first and second parts based on their bit significance; the encoded MSB and LSB vectors are written into the memory device, and reading out the encoded MSB and LSB vectors in parallel; the operation method including:” in the preamble. Perhaps Applicant may want to move the underlined limitations in the body of the claims.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
A. fail-bit-count circuit as specified in claims 1 and 7
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1, 3-7 and 9-12 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. In claim 1 lines 6 and 7, “the encoded MSB and LSB vectors” should read “the unary-coded MSB and LSB vectors” for consistency of claim terminologies. Claim 7 recites a similar limitation in lines 6, 7 and 15-16 and is objected to for the same reason. Claims 3-6 inherit the same deficiency as claim 1 by reason of dependence. Claims 9-12 inherit the same deficiency as claim 7 by reason of dependence.
B. In claim 5 recites “the encoded first part of the weight data” lines 2-3 and 6. Perhaps Applicant may want to recite “the unary-coded MSB vector of the encoded weight data” instead for better clarity since the first part is encoded into the unary-coded MSB vector as recited in claim 1 from which the claim depends. Claim 11 recites a similar limitation and is objected to for the same reason.
C. In claims 9-12 line 1, “The operation method for memory device” should read “The operation method for the memory device” for better clarity. Claim 11 inherit the same deficiency as claim 10 by reason of dependence.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 3-7 and 9-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “wherein an input data is encoded into the encoded input by duplicating each bit of the input data and encoding the duplicated bits into a unary coding format including a spare bit; a first part and a second part of a weight data are encoded into unary-coded MSB and LSB vectors of the encoded weight data, respectively, by duplicating each bit of the first and second parts based on their bit significance; the encoded MSB and LSB vectors are written into the memory device, and reading out the encoded MSB and LSB vectors in parallel” in lines 2-7. These limitations are unclear because they merely state functions (that an input data is somehow encoded, that a first part and a second part of a weight data are somehow encoded, that the encoded weight data are somehow written to and read out of the memory device) that are not performed by any structure recited in the claim. It is unclear whether the recited functions follow from the structure recited in the claim, i.e., the plurality of memory planes, the plurality of page buffers, and the accumulation circuit, so it is unclear whether the functions require some other structure or are simply a result of operating the memory device in a certain manner. Examiner suggest reciting the structure(s) performing the claimed functions. Claims 3-6 inherit the same deficiency as claim 1 by reason of dependence. See MPEP 2173.05(g) for more information.
Further, claim 1 recites “the encoded input data” in line 20. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as the encoded input. Claim 5 recites a similar limitation in lines 2 and 5 and is rejected for the same reason. Claims 3-6 inherit the same deficiency as claim 1 by reason of dependence.
Claim 3 recites “wherein: in encoding, the input data and the weight data are quantized as binary integer vectors; the weight data is separated into the first part and the second part; and each bit of the first part and the second part of the weight data is encoded into unary coding format to generate the unary-coded MSB and LSB vectors of the weight data”. These limitations are unclear because they merely state functions (that the input data and the weight data are somehow quantized, that the weight data is somehow separated into the first part and the second part, and that each bit of the first part and the second part of the weight data are somehow encoded into unary code) that are not performed by any structure recited in the claim. It is unclear whether the recited functions follow from the structure recited in the claim, i.e., the plurality of memory planes, the plurality of page buffers, and the accumulation circuit, so it is unclear whether the functions require some other structure or are simply a result of operating the memory device in a certain manner. Examiner suggest reciting the structure(s) performing the claimed functions. See MPEP 2173.05(g) for more information.
Claim 5 recites “wherein in performing MAC operation, each bit of the encoded input data and each bit of the encoded first part of the weight data are performed in logic AND operations by the plurality of page buffers; and in performing Hamming distance operation, each bit of the encoded input data and each bit of the encoded first part of the weight data are performed in logic XOR operations by the plurality of page buffers. A result is normally generated when an operation is performed. Therefore, it is unclear whether each bit of the encoded input data and each bit of the encoded first part of the weight data are the operands (input) or the result (output) of the AND and XOR operations because of the phrase “each bit of the encoded input data and each bit of the encoded first part of the weight data are performed in”. Claim 11 recites a similar limitation and is rejected for the same reason. For purposes of examination, this is interpreted as “wherein in performing MAC operation, a plurality of AND gates are configured to perform logic AND operations between each bit of the encoded input data and each bit of the encoded first part of the weight data in the plurality of page buffers; and in performing Hamming distance operation, a plurality of XOR gates are configured to perform logic XOR operations using each bit of the encoded input data and each bit of the encoded first part of the weight data in the plurality of page buffers.”
Claim 6 recites “the dimension” in line 2. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as a same dimension. Claim 12 recites a similar limitation and is rejected for the same reason.
Claim 7 recites “the encoded input data” in line 15; and “the plurality of page buffers” in line 16. There is insufficient antecedent basis for these limitations in the claim. For purposes of examination, this is interpreted as the encoded input and a plurality of page buffers respectively. Claim 11 recites similar limitations and is rejected for the same reason. Claims 9-12 inherit the same deficiency as claim 7 by reason of dependence.
Allowable Subject Matter
Claims 1, 3-7 and 9-12 would be allowable if rewritten to overcome the 35 U.S.C. 112(b) rejections discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
The reasons for indication of allowable subject matter are the same reasons provided in the non-final office action submitted on 06/24/2025.
Response to Arguments
In view of amendments made, the objection to the specification and the claims has been withdrawn. However, the amendments made raises new objection to the claims as discussed above.
Applicant's arguments, see remarks page 10-12 filed 09/22/2025, with respect to the 35 U.S.C. 112(b) rejection of claims 1, 3, 5 and 11 have been fully considered but they are not persuasive.
Applicant argues the following:
1.) Amended claim 1 recites that the multiplication is now performed in the plurality of page buffers and accumulation is performed by the accumulation circuit reused from a fail-bit-count circuit, therefore, claim 1 no longer “merely states functions” but ties them to specific disclosed hardware.
Response: Examiner agrees in part. Examiner agrees that the multiplication and accumulation functions are now being performed by structures recited in the claim. However, the claim recites additional functional limitations such as “wherein an input data is encoded into the encoded input by duplicating each bit of the input data and encoding the duplicated bits into a unary coding format including a spare bit; a first part and a second part of a weight data are encoded into unary-coded MSB and LSB vectors of the encoded weight data, respectively, by duplicating each bit of the first and second parts based on their bit significance; the encoded MSB and LSB vectors are written into the memory device, and reading out the encoded MSB and LSB vectors in parallel” that are not performed by any structures recited in the claim and Applicant has not provided any argument which structure(s) perform these functions.
2.) Fig. 3B and paragraph [0086] discloses that the encoding steps are executed before data is supplied to the memory device. Thus, the claim limitations correspond directly to disclosed circuitry and not to unspecified components.
Response: Applicant has not provided any argument which structure(s) recited in the claim perform these functions.
3.) Amended claims 5 and 11 now recites “each bit ... are performed in logic AND operations by the plurality of page buffers” and “each bit ... are performed in logic XOR operations by the plurality of page buffers” which identifies the structures performing the operations.
Response: Examiner agrees in part. Examiner agrees that the claim now recites structures for performing the operations. However, Examiner would like to point out that there were two 112(b) issues raised with respect to claim 5, and the language “each bit ... are performed in logic AND operations” and “each bit ... are performed in logic XOR operations” are still unclear because they recite that each bit are performed, however, each bit are not operations to be performed but are instead operands used for the operations.
Applicant’s arguments, see remarks page 12 filed 09/22/2025, with respect to the 35 U.S.C. 112(b) rejection of claim 6 with respect to the functional language have been fully considered and are persuasive. The 35 U.S.C. 112(b) rejection of claim 6 has been withdrawn.
Applicant’s arguments, see remarks page 12-15 filed 09/22/2025, with respect to the 35 U.S.C. 101 rejection of claims 1, 3-7 and 9-12 have been fully considered and are persuasive. The 35 U.S.C. 101 rejection of claims 1, 3-7 and 9-12 has been withdrawn.
Upon further reconsideration, Examiner is persuaded that amended claims 1 and 7 provides and improvement in technology by enabling parallel multiplications in a plurality of page buffers of a memory device and provides area efficiency by reusing an accumulation circuit of the memory device from a fail-bit-count circuit.
Applicant’s arguments, see remarks page 15-19 filed 09/22/2025, with respect to the 35 U.S.C. 103 rejection of claims 1-2, 4-8 and 10-12 have been fully considered and are persuasive. The 35 U.S.C. 101 rejection of claims 1-2, 4-8 and 10-12 has been withdrawn.
Applicant’s amendment to incorporate the specific features of how the input and weight data are encoded where a spare bit is included in the unary coding format of the input data and where the weight data are encoded into unary-coded MSB and LSB vectors distinguish the claimed invention over the prior art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlo Waje whose telephone number is (571)272-5767. The examiner can normally be reached 9:00-6:00 M-F.
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/Carlo Waje/Examiner, Art Unit 2182 (571)272-5767