DETAILED ACTION
Authorization for Internet Communications
The examiner encourages Applicant to submit an authorization to communicate with the examiner via the Internet by making the following statement (from MPEP 502.03):
“Recognizing that Internet communications are not secure, I hereby authorize the USPTO to communicate with the undersigned and practitioners in accordance with 37 CFR 1.33 and 37 CFR 1.34 concerning any subject matter of this application by video conferencing, instant messaging, or electronic mail. I understand that a copy of these communications will be made of record in the application file.”
Please note that the above statement can only be submitted via Central Fax, Regular postal mail, or EFS Web (PTO/SB/439).
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a coprocessor configured to,” “cluster configured to,” “a driver configured to” in claim 1 and 10.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Regarding claim 18, this part of the eligibility analysis evaluates whether the claim falls within any statutory category. MPEP §2106.03. The claim recites method steps; thus, the claim is directed to a process which is one of the statutory categories of invention.
Step 2A Prong 1: This part of the eligibility analysis evaluates whether the claim recites a judicial exception. As explained in MPEP 2106.04(II) and the October 2019 Update, a claim “recites” a judicial exception when the judicial exception is “set forth” or “described” in the claim.
The limitations “to schedule workloads for execution on the coprocessor,” “in response generate at least one launch request for submission to the coprocessor based on a coprocessor scheduling policy;” “selects which coprocessor clusters in the one or more clusters are activated to execute workloads,” “where workloads identified by the at least one launch request are scheduled to immediately execute on the coprocessor within time of a timing window in which the one or more tasks are being executed on the processor,” “scheduling where workloads identified by the at least one launch request are scheduled to execute on the coprocessor based on an order of priority and either,” as drafted, recite functions that, under its broadest reasonable interpretation, covers functions that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitations as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitations encompass a human mind carrying out the functions through observation, evaluation, judgment and/or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas. See MPEP §2106.04(a)(2). Accordingly, claim 1 recites a judicial exception (i.e. an abstract idea).
Step 2A, Prong 2, This part of the eligibility analysis evaluates whether the claim as a whole integrates the recited judicial exception into a practical application of the exception. This evaluation is performed by (a) identifying whether there are any additional elements recited in the claim beyond the judicial exception, and (b) evaluating those additional elements individually and in combination to determine whether the claim as a whole integrates the exception into a practical application. 2019 PEG Section III(A)(2), 84 Fed. Reg. at 54-55.
In this case, this judicial exception is not integrated into a practical application. The claim recites the following additional elements “a processor,” “a coprocessor configured to implement a processing engine comprising one or more clusters, wherein a cluster in the one or more clusters comprise one or more compute units, each compute unit comprising one or more processor cores;” “a driver configured to execute a processing engine scheduler,” “a queue on the driver based on the at least one launch request,” “or tightly-coupled coprocessor” and “wherein the clusters of compute units of the coprocessor execute the one or more workloads according to the defined coprocessor scheduling policy” are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component, or merely a generic computer or generic computer components to perform the judicial exception. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
The additional element “to receive one or more workload launch requests from one or more tasks,” “with respect to an external event common to both the processor and coprocessor, or during a subsequent timing window after the time of the timing window in which the one or more tasks are being executed on the processor” fails to meaningfully limit the claim because the element is regarding data gathering and applying the method for execution, thus is categorized as insignificant extra solution activity, thus not practical application under prong 2. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
Step 2B, This part of the eligibility analysis evaluates whether the claim as a whole amounts to significantly more than the recited exception, i.e., whether any additional element, or combination of additional elements, adds an inventive concept to the claim. MPEP 2106.05.
The claims include additional elements “to receive one or more workload launch requests from one or more tasks,” “with respect to an external event common to both the processor and coprocessor, or during a subsequent timing window after the time of the timing window in which the one or more tasks are being executed on the processor” that are not sufficient to amount to significantly more than the judicial exception because they are essentially regarding data gathering and applying method for execution. Under step 2B, the courts have identified data gathering as well understood routine and conventional. See MEPE 2106.05d.
Accordingly, the claim does not appear to be patent eligible under 35 USC 101.
Claim 1, is an independent processor claim rejected for the same reasons as claim 18. In particular, the claim recites additional elements –a processor, and a coprocessor, and a processing engine scheduler--. The processor and coprocessor and scheduler are recited at a high-level of generality (i.e., as a generic processor and coprocessor and scheduler) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. These additional elements are merely instructions to implement an abstract idea on a computer. MPEP 2106.04(d).
Claim 2, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the coprocessor scheduling policy defines a loosely-coupled coprocessor scheduling where workloads identified by the at least one launch request are scheduled to execute independently of a timing window of the one or more tasks executing on the processor and based on an order of priority of the workloads” does not render the judicial exception as a practical limitation or make a combination that is significantly more than the judicial exception because the step is still drawn to an abstract idea. The step is accomplished by a human scheduling on pen and paper.
Claim 3, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the processor includes a central processing unit (CPU) including at least one processing core, and the coprocessor includes a graphics processing unit (GPU), a processing accelerator, a field- programmable gate array (FPGA), or an application-specific integrated circuit (ASIC)” is an additional element reciting computer hardware (e.g. processor and memory); these additional elements are merely instructions to implement an abstract idea on a computer. MPEP 2106.04(d).
Claim 4, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the processor comprises a plurality of processor cores, and wherein the processing engine scheduler is configured to generate at least one launch request that schedules workloads associated with one processor cores of the plurality of processing cores to multiple clusters of the coprocessor for execution.” does not render the judicial exception as a practical limitation or make a combination that is significantly more than the judicial exception because the step is still drawn to an abstract idea. The step is accomplished by a human scheduling on pen and paper.
Claim 5, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the workloads identified by the at least one launch request are scheduled to execute during a subsequent timing window after the time of the timing window in which the one or more tasks are being executed on the processor, and/or during a subsequent data frame boundary of the processor.” does not render the judicial exception as a practical limitation or make a combination that is significantly more than the judicial exception because the step is still drawn to an abstract idea. The step is accomplished by a human scheduling on pen and paper.
Claim 6, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the coprocessor scheduling policy includes a preemption policy that defines a coupled coprocessor scheduling where one or more workloads scheduled for execution or currently being executed on the coprocessor are configured to be preempted by one or more workloads queued to be executed based on the order of priority.” does not render the judicial exception as a practical limitation or make a combination that is significantly more than the judicial exception because the step is still drawn to an abstract idea. The step is accomplished by a human scheduling on pen and paper.
Claim 7, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the one or more workloads currently being executed on the coprocessor are configured to be preempted by one or more higher priority workloads queued to be executed, and wherein the coprocessor is configured to: store the one or more workloads currently being executed on the coprocessor; and reschedule the stored one or more workloads for execution during a subsequent timing window that is after the higher priority workloads have been executed.” does not render the judicial exception as a practical limitation or make a combination that is significantly more than the judicial exception because the step is still drawn to an abstract idea. The step is accomplished by a human rescheduling on pen and paper.
Claim 8, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “wherein the preemption policy defines at least one of: a coupled coprocessor scheduling where one or more workloads currently executed on the coprocessor are configured to be completed and a subsequent workload queued for execution is preempted by a higher priority workload; a coupled coprocessor scheduling where one or more workloads currently being executed on the coprocessor are configured to be preempted by a higher priority workload; a coupled coprocessor scheduling where one or more workloads currently being executed on the coprocessor are configured to be preempted by a higher priority workload, wherein the one or more workloads include an indicator that identifies a portion of a respective workload that has been already executed, and wherein the one or more workloads are configured to be stored and re-executed starting at the indicator; or a coupled coprocessor scheduling where the one or more workloads scheduled for execution are partitioned into a plurality of sub-portions and each of the plurality of sub-portions are configured to be preempted by a higher priority workload.”
Claim 9, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims do not add additional elements and does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The additional element of “a computing engine, a rendering engine, or an artificial intelligence (AI) inference engine, and wherein the processing engine scheduler includes a computing engine scheduler, a rendering engine scheduler, or an inference engine scheduler.” is an additional element reciting computer hardware (e.g. processor and memory); these additional elements are merely instructions to implement an abstract idea on a computer. MPEP 2106.04(d).
Claim 10, is rejected for the same reasons as claim 18. In particular, the claim recites additional elements –one cluster--. The cluster is recited at a high-level of generality (i.e., as a generic cluster) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
Claims 11-17, are dependent claims corresponding to claims 9, 2, 4-8, respectively and are rejected for the same reasons.
Claims 19-20 are dependent claims corresponding to claims 6 and 9 respectively and are rejected for the same reasons.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 9-14, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Puthoor et al. (U.S. PG PUB 2019/0370059) in view of Persson (U.S. PG PUB 2013/0057563) and Zhang et al. (U.S. PG PUB 2020/0401529).
Regarding claim 1, Puthoor teaches a processing system comprising: a processor (see ¶[0013] “The first processor is implemented with any type of processor depending on the implementation.”);
a coprocessor configured to implement a processing engine comprising one or more clusters, wherein a cluster in the one or more clusters comprises one or more of compute units (see ¶ [0014] “In one implementation, the second processor includes a command processor and a plurality of compute units” see ¶[0013] “the CPU is referred to herein as a first processor and the GPU is referred to herein as a second processor”),
wherein the processing engine scheduler is configured to schedule workloads for execution on the coprocessor (see ¶[0014] “In one implementation, each compute unit includes a multi-level scheduler to schedule wavefronts of kernels that are launched and running on the compute unit. The multi-level scheduler schedules wavefronts in a way that helps to reduce resource contention among a plurality of kernels running on the compute unit while also ensuring forward progress of wavefront execution.”);
wherein the processing engine scheduler is configured to receive one or more workload launch requests from one or more tasks executing on the processor (see ¶[0014] “The command processor launches kernels on the various compute units of the second processor.”),
and in response generate at least one launch request for submission to the coprocessor based on a coprocessor scheduling policy (see ¶[0015] “Next, the second level scheduler schedules wavefronts from the scheduling group selected by the first level scheduler. Depending on the implementation, the second level scheduler uses a round-robin policy, an oldest wavefront first policy, or another policy for selecting which wavefronts to schedule from the scheduling group selected by the first level scheduler.”);
wherein based on the coprocessor scheduling policy, the processing engine scheduler selects which coprocessor clusters in the one or more clusters are activated to execute workloads identified by a queue based on the at least one launch request (see ¶[0025] “Scheduling queue 330 is representative of any number of queues for storing scheduling groups of wavefronts which are able to be scheduled on SIMD units 325A-N” see ¶[0026] “In one implementation, first level scheduler 310 groups together wavefronts into scheduling groups based on the priority of the kernel of the wavefronts. For example, for kernels of a first priority, all wavefronts of these kernels are grouped together into a first scheduling group. For kernels of a second priority, all wavefronts of these kernels are grouped together into a second scheduling group, and so on. Then, first level scheduler 310 selects, from a plurality of scheduling groups, the highest priority scheduling group for scheduling.”; and
wherein the coprocessor scheduling policy defines at least one of: tightly-coupled coprocessor scheduling where workloads identified by the at least one launch request are scheduled to immediately execute on the coprocessor within time of a timing window in which the one or more tasks are being executed on the processor (see ¶ [0035] “Next, the first-level scheduler selects, from the plurality of scheduling groups, the highest priority scheduling group for scheduling (block 515). Then, the first-level scheduler determines if the selected scheduling group has any wavefronts ready to execute in the current cycle (conditional block 520)”);
or tightly-coupled coprocessor scheduling where workloads identified by the at least one launch request are scheduled to execute on the coprocessor based on an order of priority and either: with respect to an external event common to both the processor and coprocessor (see ¶[0030] “During time slot t0, kernel A is running on the given compute unit. Accordingly, the first-level scheduler will create a scheduling group with the wavefronts from kernel A and then the second-level scheduler will schedule wavefronts from this scheduling group to be executed on the given compute unit. During the next time slot t1, kernels B, C, and D are running on the given compute unit. The first-level scheduler creates a scheduling group for the wavefronts of kernels B and C since these kernels have the same priority. Since kernels B and C have a higher priority than kernel D, the first-level scheduler selects the scheduling group for kernels B and C for scheduling. The second-level scheduler will then select wavefronts from the scheduling group for kernels B and C to be executed during time slot t1. Since kernel D was not selected by the first-level scheduler, wavefronts from kernel D will not be executed during time slot t1.”), or during a subsequent timing window after the time of the timing window in which the one or more tasks are being executed on the processor (see ¶[0016] “The control logic and scheduler continue this pattern of operations of monitoring conditions, waiting a predetermined amount of time, and then determining whether to migrate scheduling groups between queues based on a comparison of the measure of resource contention to one or more thresholds.”);
wherein the clusters of compute units of the coprocessor execute the one or more workloads according to the defined coprocessor scheduling policy (see ¶ [0031] “Accordingly, the first level scheduler creates a scheduling group for wavefronts from kernels E and D and the second level scheduler schedules wavefronts from this scheduling group to be executed on the compute unit during time slot”).
Puthoor does not expressly disclose, however, Persson teaches a driver configured to execute a processing engine scheduler (see ¶ [0031] “The scheduler interface for receiving GPU commands may take the form of a GPU API. Moreover, the scheduler may further comprise, or be connected to, a GPU driver adapted to receive the dispatched GPU commands. The GPU driver, in turn, may be configured to feed the GPU with the GPU commands received from the scheduler.”), queue on the driver (see ¶ [0054] “The GPU driver 160 receives the batches of GPU commands from the command buffer 240 of the command scheduler 140. The GPU commands thus received are fed by the GPU driver 160 to the GPU 180 in accordance with conventional command feeding strategies” see ¶ [0052] “The command scheduler 140 further comprises a command buffer 240 located downstream of the GPU API 220. The command buffer 240 is configured to temporarily store the GPU commands received via the GPU API 220. In one implementation, the command buffer 240 is realized in the form of a command queue (e.g., in accordance with the FIFO paradigm).”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Puthoor by adapting Persson to manage and manipulate GPU commands (see ¶[0047] of Persson).
Puthoor and Persson do not expressly disclose, however, Zhang teaches each compute unit comprising one or more processing cores (see ¶ [0044] “During processing, a processor core, also referred to as a “compute unit” (CU), is able to execute a thread with other CUs concurrently executing other threads, e.g., according to the single instruction, multiple data (SIMD) execution model.”)
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Puthoor and Persson by adapting Zhang to process multiple operations and request access to memory systems concurrently through multiple memory channels for efficiency (see ¶[0044] of Zhang).
Regarding claim 2, Puthoor teaches wherein the coprocessor scheduling policy defines a loosely-coupled coprocessor scheduling where workloads identified by the at least one launch request are scheduled to execute independently of a timing window of the one or more tasks executing on the processor and based on an order of priority of the workloads (see ¶[0015] “In one implementation, a first level scheduler groups together wavefronts into scheduling groups based on the priority of the kernel of the wavefronts. For example, for kernels of a first priority, all wavefronts of these kernels are grouped together into a first scheduling group.”).
Regarding claim 3, Puthoor teaches wherein the processor includes a central processing unit (CPU) including at least one processing core (see ¶[0018] CPUI), and the coprocessor includes a graphics processing unit (GPU) (see ¶[0013] GPU), a processing accelerator, a field- programmable gate array (FPGA), or an application-specific integrated circuit (ASIC).
Regarding claim 4, Puthoor teaches wherein the processor comprises a plurality of processor cores, and wherein the processing engine scheduler is configured to generate at least one launch request that schedules workloads associated with one processor cores of the plurality of processing cores to multiple clusters of the coprocessor for execution (see ¶[0026] “In one implementation, first level scheduler 310 groups together wavefronts into scheduling groups based on the priority of the kernel of the wavefronts. For example, for kernels of a first priority, all wavefronts of these kernels are grouped together into a first scheduling group. For kernels of a second priority, all wavefronts of these kernels are grouped together into a second scheduling group, and so on.”).
Regarding claim 5, Puthoor teaches herein the workloads identified by the at least one launch request are scheduled to execute during a subsequent timing window after the time of the timing window in which the one or more tasks are being executed on the processor, and/or during a subsequent data frame boundary of the processor (see ¶ [0031] “During the next time slot t2, kernels E and D are running on the given compute unit. Wavefronts from kernel D is now able to be scheduled in time slot t2 since there are no higher priority kernels available in the same cycle. Accordingly, the first level scheduler creates a scheduling group for wavefronts from kernels E and D and the second level scheduler schedules wavefronts from this scheduling group to be executed on the compute unit during time slot t2”).
Regarding claim 9, Puthoor teaches wherein the processing engine includes a computing engine (see ¶[0013] CPU/GPU), a rendering engine, or an artificial intelligence (AI) inference engine, and wherein the processing engine scheduler includes a computing engine scheduler (see ¶[0014] scheduler), a rendering engine scheduler, or an inference engine scheduler.
Regarding claim 10, is an independent coprocessors claim corresponding with claim 1. Therefore, it is rejected for the same reasons. In addition, Puthoor teaches at least one cluster configured to execute workloads (see ¶[0013] “A system includes at least a processor with a plurality of compute units coupled to one or more memories. In some implementations, the system includes multiple processors.”).
Regarding claim 11-14, correspond with claims 9, 2-5, respectively, and are rejected for the same reasons.
Regarding claim 18, is an independent method claim corresponding with claim 1. Therefore, it is rejected for the same reasons
Claim(s) 6-8, 15-17, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Puthoor et al. (U.S. PG PUB 2019/0370059), Persson (U.S. PG PUB 2013/0057563) and Zhang et al. (U.S. PG PUB 2020/0401529), as applied to claim 1, 10, and 18 above, further in view of Chin et al. (U.S. PG PUB 2015/0143381).
Regarding claim 6, Puthoor, Persson, and Zhang do not expressly disclose, however, Chin teaches wherein the coprocessor scheduling policy includes a preemption policy that defines a coupled coprocessor scheduling where one or more workloads scheduled for execution or currently being executed on the coprocessor are configured to be preempted by one or more workloads queued to be executed based on the order of priority (see ¶ [0041] “In one embodiment of the present invention, a running parent task may be interrupted or may not complete for any of a variety of reasons, including preemption, reclaim, and failure. Preemption occurs when a priority task managed by the same single logical workload scheduler program, such as workload scheduler program 400, needs to be scheduled and a resource is unavailable. A parent task may be preempted, in which case the parent task is interrupted during its run with a configurable grace period. If the task cannot complete within that grace period, the service instance process where it is running is terminated, the parent task is removed from the resource, and the resource is given to the priority task. The parent task is re-queued to be rescheduled by workload scheduler program 400 when the same slot or a different slot becomes available.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing data of the invention to modify the teachings of Puthoor, Persson, and Zhang by adapting Chin to improve scheduling and management of a computer workload (see ¶[0007] of Chin).
Regarding claim 7, Puthoor, Persson, and Zhang do not expressly disclose, however, Chin teaches wherein the one or more workloads currently being executed on the coprocessor are configured to be preempted by one or more higher priority workloads queued to be executed, and wherein the coprocessor is configured to: store the one or more workloads currently being executed on the coprocessor (see ¶[0042] “The parent task is re-queued to be rescheduled by the workload scheduler program when the same slot or a different slot becomes available”); and reschedule the stored one or more workloads for execution during a subsequent timing window that is after the higher priority workloads have been executed (see ¶[0041] “Preemption occurs when a priority task managed by the same single logical workload scheduler program, such as workload scheduler program 400, needs to be scheduled and a resource is unavailable. A parent task may be preempted, in which case the parent task is interrupted during its run with a configurable grace period. If the task cannot complete within that grace period, the service instance process where it is running is terminated, the parent task is removed from the resource, and the resource is given to the priority task. The parent task is re-queued to be rescheduled by workload scheduler program 400 when the same slot or a different slot becomes available.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing data of the invention to modify the teachings of Puthoor, Persson, and Zhang by adapting Chin to improve scheduling and management of a computer workload (see ¶[0007] of Chin).
Regarding claim 8, Puthoor, Persson, and Zhang do not expressly disclose, however, Chin teaches wherein the preemption policy defines at least one of:
a coupled coprocessor scheduling where one or more workloads currently executed on the coprocessor are configured to be completed and a subsequent workload queued for execution is preempted by a higher priority workload;
a coupled coprocessor scheduling where one or more workloads currently being executed on the coprocessor are configured to be preempted by a higher priority workload (see ¶ [0041] “Preemption occurs when a priority task managed by the same single logical workload scheduler program, such as workload scheduler program 400, needs to be scheduled and a resource is unavailable. A parent task may be preempted, in which case the parent task is interrupted during its run with a configurable grace period. If the task cannot complete within that grace period, the service instance process where it is running is terminated, the parent task is removed from the resource, and the resource is given to the priority task. The parent task is re-queued to be rescheduled by workload scheduler program 400 when the same slot or a different slot becomes available.”);
a coupled coprocessor scheduling where one or more workloads currently being executed on the coprocessor are configured to be preempted by a higher priority workload, wherein the one or more workloads include an indicator that identifies a portion of a respective workload that has been already executed, and wherein the one or more workloads are configured to be stored and re-executed starting at the indicator; or
a coupled coprocessor scheduling where the one or more workloads scheduled for execution are partitioned into a plurality of sub-portions and each of the plurality of sub-portions are configured to be preempted by a higher priority workload.
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing data of the invention to modify the teachings of Puthoor, Persson, and Zhang by adapting Chin to improve scheduling and management of a computer workload (see ¶[0007] of Chin).
Regarding claim 15-17, are dependent claims corresponding to claims 6-8 above, and are rejected for the same reasons.
Regarding claim 19-20, are dependent claims corresponding to claims 6 and 8 above, and are rejected for the same reasons.
Response to Arguments
Applicant's arguments filed 4/16/2025 have been fully considered but they are not persuasive.
Regarding 112(f), the claims are acknowledged as invoking 112(f), examiner has withdrawn 112 2nd paragraph rejections in light of applicant’s arguments.
Regarding 101 rejections, applicant argues Step 1A: Prong One that the claim does not fall under prong one of abstract idea because applicants’ amends claim to include a driver that executes a processing engine scheduler, and the claims also include components such as processor, and coprocessor, and are drawn to an apparatus, system, and method for enforcing and executing a scheduling policy on actual devices.
Applicant argues Step2A Prong Two, that the claims are drawn to a practical application of enforcing scheduling policy and then improvement of computer technology of synchronizing workloads, and further argues step 2B, that the claims are significantly more because it recites a driver that executes the engine scheduler.
Examiner disagrees. The claimed limitations recite an abstract idea, because the limitations as drafted,
“to schedule workloads for execution on the coprocessor,” “in response generate at least one launch request for submission to the coprocessor based on a coprocessor scheduling policy;” “selects which coprocessor clusters in the one or more clusters are activated to execute workloads,” “where workloads identified by the at least one launch request are scheduled to immediately execute on the coprocessor within time of a timing window in which the one or more tasks are being executed on the processor,” “scheduling where workloads identified by the at least one launch request are scheduled to execute on the coprocessor based on an order of priority and either,” are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitations encompass a human mind carrying out the functions through observation, evaluation, judgment and/or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas. See MPEP §2106.04(a)(2).
Regarding Step 2A, Prong one, the driver, processor, and coprocessor applicant is mentioning are generic computer components and they are not significantly more than the abstract idea.
Regarding step 2B, The technological environment/improvement applicant is mentioning is merely insignificant post solution activity and merely linking the abstract idea into a particular technological environment, recited at a high level of generality. The executions step is merely a means to apply the driver and is not significantly more than the abstract idea itself.
Regarding 103 rejections, applicants argue Puthoor teaches scheduler that schedules on a single compute unit and does not coordinate assignments with other compute units by a processing engine scheduler. Puthoor is silent regarding the selection of compute unit clusters based on scheduling policy.
Examiner disagrees. Putthoor teaches a scheduler that is configured to schedule workloads for execution on the coprocessor, for example, the scheduler schedules wavefronts of kernels that are launched on the compute unit, see ¶[0014]. The scheduler selects from a plurality of scheduling groups the highest priority group for scheduling, therefore, Putthoor shows that there is a selection of the compute unit based on the scheduling policy as it selects the highest priority group and it coordinate assignments with other groups as each compute unit also monitors resource contention and throttles scheduling groups of wavefronts if a measure of the monitored resource contention is greater than a threshold, see ¶[0018].
Interview Requests
In accordance with 37 CFR 1.133(a)(3), requests for interview must be made in advance. Interview requests are to be made by telephone (571-270-7848) call or FAX (571-270-8848). Applicants must provide a detailed agenda as to what will be discussed (generic statement such as “discuss §102 rejection” or “discuss rejections of claims 1-3” may be denied interview). The detail agenda along with any proposed amendments is to be written on a PTOL-413A or a custom form and should be faxed (or emailed, subject to MPEP 713.01.I / MPEP 502.03) to the Examiner at least 5 business days prior to the scheduled interview. Interview requests submitted within amendments may be denied because the Examiner was not notified, in advance, of the Applicant Initiated Interview Request and due to time constraints may not be able to review the interview request to prior to the mailing of the next Office Action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Cadambi et al. (U.S. PG PUB 2012/0124591) for scheduling client-server applications onto heterogeneous clusters includes storing at least one client request of at least one application in a pending request list on a computer readable storage medium. A priority metric is computed for each application, where the computed priority metric is applied to each client request belonging to that application. The priority metric is determined based on estimated performance of the client request and load on the pending request list. The at least one client request of the at least one application is scheduled based on the priority metric onto one or more heterogeneous resources.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARINA YUN whose telephone number is (571)270-7848. The examiner can normally be reached Mon, Tues, Thurs, 9-4 (EST).
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Carina Yun
Patent Examiner
Art Unit 2194
/CARINA YUN/Examiner, Art Unit 2194