Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings were received on 12/24/2024. These drawings are acceptable.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-10, 16-19 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2019/0165207). From herein after Kim et al. will be referred to as Kim.
Regarding claim 1, Kim teaches a unit pixel (FIG. 33 - FIG. 35), comprising:
a first light emitting stack (2430);
a second light emitting stack (2330) disposed under the first light emitting stack (2430); and
a third light emitting stack (2230) disposed under the second light emitting stack (2330),
wherein at least one or more of the plurality of light emitting stacks among the first through third light emitting stacks has a mirror symmetrical structure with respect to a vertical plane (cutline C-C, see FIG. 33 below) passing through a center of the at least one light emitting stack in plan view (annotated FIG.33 below shows the first light emitting stack 2430 having a mirror symmetrical structure with respect to a vertical plane defined by cutline C-C passing through the center of first light emitting stack 2430 in plan view) and has an asymmetrical structure with respect to another vertical plane (cutline A-A, see FIG. 33 below) passing through the center of the at least one light emitting stack in plan view (annotated FIG.33 below shows the first light emitting stack 2430 having an asymmetrical structure with respect to another vertical plane defined by cutline A-A passing through the center of the first light emitting stack in a plan view), and the another vertical plane (cutline A-A, see FIG. 33 below) is perpendicular to the vertical plane (cutline C-C, annotated FIG. 33 below show cutline A-A is perpendicular to cutline C-C), an adhesive layer 2550 (Para. 369, claim does not specify the material) is disposed between the second light emitting stack 2330 and the third light emitting stack 2230, and an adhesion enhancement layer 2350 (Para. 369, claim does not specify the material) is disposed between the adhesive layer 2550 and the second light emitting stack 2330, and the adhesion enhancement layer 2350 is adhered (claim does not specify directly) to the adhesive layer 2550.
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Regarding claim 2, Kim teaches the unit pixel of claim 1, wherein:
the unit pixel has a rectangular shape in plan view (the unit pixel in FIG.33 appears to have four right angles and opposite sides that are parallel and equal in length or a rectangular shape); and
the vertical plane (cutline C-C, see FIG. 33 below) passes through a straight line parallel to an edge of the unit pixel (annotated FIG.33 below shows vertical plane, cutline C-C, passing through a straight line parallel to an edge of the unit pixel).
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Regarding claim 3, Kim teaches the unit pixel of claim 2, wherein the first light emitting stack ([0376] third LED stack 2430) has a mirror symmetrical structure with respect to a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel (FIG. 33: the third LED stack 2430 has a mirror symmetrical structure with respect to cutline A-A a vertical plane passing through a straight line parallel to a lateral edge of the unit pixel) or a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel.
Regarding claim 4, Kim teaches the unit pixel of claim 3, wherein the first light emitting stack ([0376] third LED stack 2430) has a mirror symmetrical structure with respect to each of the first (the third LED stack 2430 has a mirror symmetrical structure with respect to cutline A-A) and second vertical planes (below, annotated FIG.33: the third LED stack 2430 has a mirror symmetrical structure with respect to cutline C-C a vertical plane passing through a straight line parallel to a vertical edge of the unit pixel).
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Regarding claim 5, Kim teaches the unit pixel of claim 1, wherein the first light emitting stack ([0430] the third LED stack 2430) has an octagonal, hexagonal, or rhombus shape ([0430] to have a square shape and it is widely known that a rhombus shape is a type of square shape).
Regarding claim 6, Kim teaches the unit pixel of claim 5, wherein the first light emitting stack ([0430] the third LED stack 2430) has a regular octagonal, regular hexagonal, or square shape ([0430] to have a square shape).
Regarding claim 7, Kim teaches the unit pixel of claim 2, wherein the second light emitting stack ([0376] second LED stack 2330) has a protrusion protruding outside of the first light emitting stack in plan view (below, annotated FIG. 33: second LED stack 2330 has a protrusion protruding outside of the first light LED stack 2430), and
the protrusion of the second light emitting stack extends along a diagonal direction of the unit pixel (below, annotated FIG. 33, the protrusion of the second LED stack 2330 extends along a diagonal direction of the unit pixel).
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Regarding claim 8, Kim teaches the unit pixel of claim 7, wherein the second light emitting stack ([0376] second LED stack 2330) has a mirror symmetrical structure with respect to one of a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel and a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel (below, annotated FIG. 33, the second LED stack 2330 has a symmetrical structure with respect to cutline C-C), and
has an asymmetrical structure with respect to the other one of the first and second vertical planes (FIG.33: the second LED stack 2330 has an asymmetrical structure with respect to cutline A-A).
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Regarding claim 9, Kim teaches the unit pixel of claim 7, wherein the third light emitting stack ([0376] first LED stack 2230) has a mirror symmetrical structure with respect to the first vertical plane or the second vertical plane (FIG 33. the first LED stack 2230 has a mirror symmetrical structure with respect to the first vertical plane defined by cutline A-A).
Regarding claim 10, Kim teaches the unit pixel of claim 9, wherein the third light emitting stack ([0376] first LED stack 2230) has a rectangular shape (FIG 33. the first LED stack 2230 has a rectangular shape).
Regarding claim 16, Kim teaches the unit pixel of claim 1, further comprising a substrate ([0369] a support substrate) disposed under the third light emitting stack ([0406] support substrate 2510 is disposed under the first LED stack).
Regarding claim 17, Kim teaches a display apparatus (FIG. 31, [0407] teaches FIG. 31 to be a display apparatus), comprising:
a circuit board ([0406] teaches the display apparatus comprising a circuit board); and
a unit pixel (FIG. 33 - FIG. 35) disposed on the circuit board ([0406] teaches a unit pixel disposed on the circuit board) and comprising:
a first light emitting stack (2430);
a second light emitting stack (2330) disposed under the first light emitting stack (2430); and
a third light emitting stack (2230) disposed under the second light emitting stack (2330),
wherein at least one or more of the plurality of light emitting stacks among the first through third light emitting stacks has a mirror symmetrical structure with respect to a vertical plane (cutline C-C, see FIG. 33 below) passing through a center of the at least one light emitting stack in plan view (annotated FIG.33 below shows first light emitting stack 2430 having a mirror symmetrical structure with respect to vertical plane defined by cutline C-C passing through the center of first light emitting stack 2430 in plan view) and has an asymmetrical structure with respect to another vertical plane (cutline line A-A, see FIG. 33 below) passing through the center of the at least one light emitting stack in plan view (annotated FIG.33 below shows first light emitting stack 2430 having an asymmetrical structure with respect to a vertical plane defined by cutline A-A passing through the center of first light emitting stack 2430 in plan view), and the another vertical plane (cutline line A-A, see FIG. 33 below) is perpendicular to the vertical plane (cutline C-C, annotated FIG.33 below shows cutline A-A perpendicular to cutline C-C); an adhesive layer 2550 is disposed between the second light emitting stack 2330 and the third light emitting stack 2230, and an adhesion enhancement layer 2350 (claim does not specify the material) is disposed between the adhesive layer 2550 and the second light emitting stack 2330, and the adhesion enhancement layer 2350 is adhered to the adhesive layer 2550.
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Regarding claim 18, Kim teaches the display apparatus of claim 17, wherein:
the unit pixel has a rectangular shape in plan view (the unit pixel in FIG.33 appears to have four right angles and opposite sides that are parallel and equal in length or a rectangular shape); and
the vertical plane (cutline C-C, see FIG. 33 below) passes through a straight line parallel to an edge of the unit (annotated FIG.33 below show vertical plane, cutline C-C, passing through a straight line parallel to an edge of the unit pixel), and
the first light emitting stack (2430) has a mirror symmetrical structure with respect to the vertical plane (cutline C-C, annotated FIG. 33 below show the first light emitting stack 2430 having a mirror symmetrical structure with respect to a vertical plane defined by cutline C-C).
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Regarding claim 19, Kim teaches the unit pixel of claim 18, wherein the second light emitting stack ([0376] second LED stack 2330) has a mirror symmetrical structure with respect to one of a first vertical plane passing through a straight line parallel to a lateral edge of the unit pixel (below, annotated FIG. 33, the second LED stack 2330 has a symmetrical structure with respect to cutline C-C), and a second vertical plane passing through a straight line parallel to a vertical edge of the unit pixel, and
has an asymmetrical structure with respect to the other one of the first and second vertical planes (FIG.33: the second LED stack 2330 has an asymmetrical structure with respect to cutline A-A).
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Regarding claim 20, Kim teaches the unit pixel of claim 19, wherein the third light emitting stack ([0376] first LED stack 2230) has a mirror symmetrical structure with respect to the first vertical plane or the second vertical plane (FIG 33. the first LED stack 2230 has a mirror symmetrical structure with respect to the first vertical plane defined by cutline A-A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11 - 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim.
Regarding claim 11, Kim teaches the unit pixel of claim 2, comprising first, second, and third light emitting stacks.
The embodiment in FIG. 33 to FIG. 35 of Kim does not teach the unit pixel further comprising first, second, third, and fourth connection electrodes electrically connected to the first, second, and third light emitting stacks, wherein two or more of the first through fourth connection electrodes are disposed along a diagonal direction of the unit pixel.
However, Kim does teach another embodiment (FIGS. 1 to 3) including first (170), second (172), third (174), and fourth (176) connection electrodes ([0181]) electrically connected to first (LE3), second (LE2), and third (LE1) light emitting stacks ([0133]), wherein two or more of the first through fourth connection electrodes are disposed along a diagonal direction of the unit pixel (FIG. 1A: at least two of 170, 172, 174, or 176 are disposed along a diagonal direction of the unit pixel).
A person of ordinary skill in the art would have had the technological capabilities to incorporate both a first through third light emitting stacks and a first through fourth connection electrodes of the two Kim embodiments into a combined apparatus before the effective filing date of the claimed invention. Furthermore, the resulting combined apparatus would yield predictable results. Even in the context of a combined apparatus, the features of a first through third light emitting stacks and a first through fourth connection electrode would be expected to work as intended, with each element in the combined apparatus performing the same function as it did separately. The functionality of the combined apparatus would be the same as if one had used a first through fourth via contact for electrical connection to a first through third light emitting stacks. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine a first through third light emitting stacks with a first through fourth connection electrodes to yield the predictable result of a combined apparatus that a connection electrode is electrically connected to a first through third light emitting stacks.
Regarding claim 12, Kim teaches the unit pixel of claim 11 further comprising: a first insulation layer (2610) covering the first through third light emitting stacks (FIG. 34 to 35) and having contact holes (2610a to 2610f);
first (FIG.33: 2710a), second (FIG.33: 2730a), third (FIG.33: 2750a), and fourth (FIG.33: 2770a or 2770b) pads disposed on the first insulation layer (FIG. 34 and 35); and
a second insulation layer (PVT1) covering the first through fourth pads and having through holes (FIG. 1B and 1C), wherein:
the first through fourth pads are electrically connected to the first through third light
emitting stacks through the contact holes; and
the first through fourth connection electrodes are electrically connected to the first through fourth pads through the through holes of the second insulation layer (FIG. 1B and 1C).
Claim(s) 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim, in view of Hashimoto et at. US 20140252382 A1. From herein after, Hashimoto et al. will be referred to as Hashimoto.
Regarding claim 13, Kim teaches a unit pixel (FIG. 33 - FIG. 35), comprising:
a first light emitting stack (2430);
a second light emitting stack (2330) disposed under the first light emitting stack (2430);
a third light emitting stack (2230) disposed under the second light emitting stack (2330),
wherein at least one light emitting stack among the first through third light emitting stacks has a mirror symmetrical structure with respect to a vertical plane (cutline C-C, see FIG. 33 below) passing through a center of the at least one light emitting stack in plan view (annotated FIG.33 below shows the first light emitting stack 2430 having a mirror symmetrical structure with respect to a vertical plane defined by cutline C-C passing through the center of first light emitting stack 2430 in plan view);
a first adhesive layer (2570) disposed between the first light emitting stack (2430) and the second light emitting stack (2330);
a second adhesive layer (2550) disposed between the second light emitting stack (2330) and the third light emitting stack (2230), wherein the first adhesion enhancement layer 2350 (claim does not specify the material) is adhered to the second adhesive layer 2550.
What Kim fails to teaches is a first adhesion enhancement layer disposed between the second adhesive layer and the second light emitting stack.
However, Hashimoto teaches a first adhesion enhancement layer (see [0144]) disposed between the second adhesive layer (44b) and the second light emitting stack (30) ([0144], teaches the second adhesive layer between the second light emitting stack and the third light emitting stack and comprising an insulative layers or an adhesion enhancement layer).
Kim and Hashimoto are both consider to be analogous to the claimed invention because they are in the same of semiconductor lighting. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kim and incorporate the teachings of Hashimoto and add an insulative layer or an adhesion enhancement layer to the claimed invention. Doing so would aid in protecting the device.
Regarding claim 14, Kim fails to teach a second adhesion enhancement layer disposed between the second adhesive layer and the third light emitting stack.
However, Hashimoto teaches a second adhesion enhancement layer (see [0144]) disposed between the second adhesive layer (44b) and the third light emitting stack (20) ([0144] teaches the second adhesive layer between the second light emitting stack and the third light emitting stack and comprising an insulative layers or second adhesion enhancement layer).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kim and incorporate the teachings of Hashimoto and add a second insulative layer or a second adhesion enhancement layer to the claimed invention. Doing so would aid in manufacturing and assembly processes.
Regarding claim 15, Kim fails to teach the first adhesion enhancement layer and the second adhesion enhancement layer include a silicon oxide layer.
However, Hashimoto teaches the first adhesion enhancement layer (see [0144]) and the second adhesion enhancement layer (see [0144]) include a silicon oxide layer. ([0144] teaches the second adhesive layer comprising an insulative layers or a first and second adhesion enhancement layer comprised of silicon oxide or include a silicon oxide layer).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kim and incorporate the teachings of Hashimoto and comprise a first and second adhesion enhancement layer from silicon oxide. Doing so would aid in forming the insulative layers.
Response to Arguments
Applicant's arguments filed 06/04/25 have been fully considered but they are not persuasive.
Applicant’s argue:
The rejection is moot and cited arts do not teach the amended parts for the claims 1, 13 and 17.
Examiner responds:
However, Examiner respectfully disagrees about the arguments. Kim reference still teaches the amended part for the claims 1, 13 and 17. See above rejections.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
23. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BILKIS JAHAN whose telephone number is (571)270-5022. The examiner can normally be reached Monday-Friday, 8:00 am-5 Pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon T Fletcher can be reached at (571)272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/Primary Examiner, Art Unit 2817
