DETAILED ACTION
Statement of claims
The present amended application include :
Claims 1, 3-8, 10-15 and 17-21 were amended.
Claims 1-21 remain pending in the application. Claims 1-21 are being considered on the merits.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Rejections of Claims 1-20 under 35 U.S.C. $ 103
Applicant argues that:
“Applicant respectfully asserts that the amendments overcome the current rejection at least because the Office Action fails to reject the claims as amended and at least for the reasons indicated above.
In response, Singh et al (US 2021/0224178) is added only as directly corresponding evidence to support the prior common knowledge finding as stated above.” (emphasis added).
Examiner respectfully disagree and submit that: Applicant’s arguments with respect to the newly added limitations have been considered but are moot because the arguments do not apply to the newly cited reference Olderdissen et al (US 2020/0026659) and Mcgraw et al. (US 2022/0350767) being used in the current rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-21 are rejected under 35 U.S.C. 103 as being unpatentable over Olderdissen et al (US 2020/0026659), Olderdissen hereinafter) in view of Mcgraw et al. (US 2022/0350767. McGraw hereinafter).
As to claim 1, Olderdissen teaches a non-transitory computer readable medium having stored thereon a sequence of instructions which, when stored in memory and executed by a processor (e.g., see FIG. 6, para [0081] The system 600 comprises at least one processor and at least one memory, the memory serving to store program instructions corresponding to the operations of the system. As shown, an operation can be implemented in whole or in part using program instructions accessible by a module. The modules are connected to a communication path 605, and any operation can communicate with other operations over communication path 605. The modules of the system can, individually or in combination, perform method operations within system 600. Any operations performed within system 600 may be performed in any order unless as may be specified in the claims.) , cause acts comprising:
mapping, by the processor of a first computing node (e.g., “computing node 152”, FIG. 1, para 7, “to facilitate memory paging operations to and from a memory mapped storage device”), a first virtual memory address of a first virtual machine (e.g., “VM 158”, FIG. 1) to a first physical address of the first computing node (e.g., see FIG. 1, “ maps addresses of a virtual address space 132.sub.1K of host operating system 156.sub.1K to addresses of a physical address space 144.sub.1K at RAM device 142.sub.1K.”) , wherein the mapping is performed in response to an instruction to access the first virtual memory address from the first virtual machine of a first virtualization system on the first computing node (e.g., see FIG. 3, para [0047] “a hypervisor at one node in distributed storage system 360 “, “ a hypervisor at another node in distributed storage system 360” , “ an operating system virtualization environment at a given node”, “the virtualized entities at computing node 152.sub.1M can access storage pool 370 by interfacing with a controller container (e.g., virtualized controller 362.sub.1M) through hypervisor 154.sub.1M” , para 36-37, “In response to detecting a paging event corresponding to the page of data (step 254), a request to perform a paging operation is issued “ execution of the computer program instructions” ).
issuing, by the processor of the first computing node, a first memory command to access the first physical address to a first specialized hardware based on the mapping of the first virtual memory address of the first virtual machine to the first physical address the first computing node (e.g., e.g., para 47, “a request to perform a paging operation is issued “ and “operations that facilitate virtual I/O access to swap devices in systems that facilitate memory page swapping between a RAM device and a RAPM device. “ , “computing environments with …hypervisors that can be designed to include specialized device drivers that have virtual I/O functionality”, “paging operations 250 earlier described. Such paging operations can be invoked by a page swap event 560.sub.2.” in para see FIG. 5B, para 64, [0065] receiving a virtual I/O request from the swap device driver of a VE to perform certain paging operations over a portion of the swap address space of a swap device “, “a virtual I/O request might be issued from a VE to perform paging operations (e.g., page-in request, page-out request, etc.) at swap device 586.sub.15.” for “Any executable container of any sort can be rooted in a directory system, and can be configured to be accessed by file system commands (e.g., “ls” or “ls—a”, etc.).” , “ the library and OS-like functions needed for execution of the runnable instance” in para 106.
Thus, the “I/O access” include the command , one of the “hypervisors that can be designed to include specialized device drivers” include the first specialized hardware) ; and
wherein the first memory command is processed using an interconnection (e.g., see FIG. 3, para 40, “a network 364, such as a networked storage 375 (e.g., a storage area network or SAN, network attached storage or NAS, etc.).”, Para 84, Distributed systems are systems of interconnected components “, “ storage operations “operate cooperatively to achieve a particular objective, “ “distributed storage system can coordinate to efficiently use a set of data storage facilities”) and a second specialized hardware (e.g., “hypervisor 1541M) FIG. 3) at a second computing node (e.g., “computer Node 1521M”, FIG. 3).
However, Olderdissen does not teach the interconnection fabric comprising the first specialized hardware and the second specialized hardware , the first specialized hardware determines that the first memory command corresponds to a location at the second computing node (see FIG. 3) , the first specialized hardware forwards the first memory command to the second specialized hardware, and the second specialized hardware accesses a corresponding second memory location at the second computing node to perform the first memory command.
McGraw teaches an interconnection fabric comprising first specialized hardware at a first computing node and second specialized hardware at a second computing node (see FIG. 3, para 64, “interconnection fabrics (e.g., 342, 344)” and “physical infrastructure modules” and “C-RAs 414 utilizing CXL” in para 68, see FIG. 4) , wherein the first specialized hardware determines that the first memory command corresponds to the second location at the second computing node, the first specialized hardware forwards the first memory command to the second specialized hardware, and the second specialized hardware accesses a corresponding second memory location at the second computing node to perform the first memory command (e.g., See FIG. 3, para 31, para 64 wherein “multiple parallel interconnection fabrics (e.g., 342, 344) and see FIG. 4. , para 69,70 , “Target/IO resources 434 the provide a physical function (PF) and corresponding T-RAs 432. Resources 434 can be connected to T-RAs 414 utilizing CXL or PCIe protocols, for example. Processing cores 412 can be any type of resource that can be utilized to support processing cores 412, for example, memory modules, smart I/O modules” , “Interconnection fabrics 421 and 425 “, “ interconnections between compute modules 410 and target modules 430” , “the interconnection fabrics are PCIe-based interconnection fabrics” for “/O target bindings (e.g., logical memory ranges” in para 79. Thus, the “/O modules” represent the commands , the “logical memory ranges” include the memory location. Therefore , wherein the first specialized hardware determines that the first memory command corresponds to the second memory location at the second computing node, the first specialized hardware forwards the first memory command to the second specialized hardware, and the second specialized hardware accesses the corresponding second memory location to perform the first memory command) .
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the method of Olderdissen by adopting the teachings of McGraw in order to “provide parallel paths between the various nodes to provide maximum available bandwidth” (see McGraw, para 65) or to allow “ I/O utilization can be more efficient as I/O resources can be shared between compute resources sequentially or concurrently.” (see McGraw, para 54).
As to claim 2, Olderdissen does not teach wherein the first specialized hardware comprises a first CXL device and the second specialized hardware comprises a second CXL device. However, McGraw teaches wherein the first specialized hardware comprises a first CXL device and the second specialized hardware comprises a second CXL device (e.g., para 102, “Processing cores”, “ utilizing CXL “) . Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the method of Olderdissen by adopting the teachings of McGraw to allow “ I/O utilization can be more efficient as I/O resources can be shared between compute resources sequentially or concurrently.” (see McGraw, para 54).
As to claim 3, Olderdissen teaches wherein the first specialized hardware accesses a second memory location to perform a second memory command received from the second specialized hardware, the second memory command was forwarded from the second specialized hardware in response to a second instruction to access a second virtual memory address from a second virtual machine of a second virtualization system on the second computing node that was mapped to a second physical address of the second computing node (e.g., see FIG. 4, para [0051] The swap memory virtualization technique 400 presents one embodiment of certain steps and/or operations that virtualized a swap address space to facilitate memory page swapping between a RAM device and a random access persistent memory device. A representative computing node (e.g., computing node 152.sub.12) is shown to further illustrate the swap memory virtualization technique 400. Certain specialized data structures (e.g., virtual memory mapping schema 464) that are designed to improve the way a computer stores and retrieves data in memory when performing such techniques are also discussed. As shown, the steps and/or operations of the swap memory virtualization technique 400 comprise an embodiment of apportioning operations 240 earlier described.)
As to claim 4, Olderdissen teaches wherein the first physical address is a physical address of the first specialized hardware and the first specialized hardware determines that the first memory command corresponds to the second memory location at the second computing node based on at least a determination that the memory command is mapped to the second memory location at the second computing node, the second memory location comprising a second physical address at the second computing node (see FIG. (e.g. see FIG. 5D, para [0074] The swap device data access technique 5D00 can commence by responding to a page swap event 560.sub.4, after which certain of the paging operations 250 move at least one data page from a RAM device to a RAPM device that is configured as a swap device (step 544). For example, RAPM device 146.sub.17 at computing node 152.sub.17 might be designated as a swap device 586.sub.17 for the node, and receive the data page from RAM device 142.sub.17 in response to certain paging operations. Certain computer program instructions executing at a VE might expect at least a portion of the data page that is moved to the swap device to be in memory. When such instructions are detected (step 546), a determination is made as to whether the data page should be swapped back into the RAM device (decision 548)..
As to claim 5, Olderdissen teaches wherein a memory page of the second virtual machine on the first computing node is sent to the second computing node to be copied into physical memory of the second computing node after performing the second memory command (e.g., para 23, “ the virtualized swap framework and/or other subsystems (e.g., operating systems, device drivers, etc.) of the computing node determine when pages are copied from the swap device (e.g., RAPM device) back into the RAM device. In certain embodiments, an intra-node block-addressable device is configured as a swap device”).
As to claim 6, Olderdissen teaches wherein a copy of the second virtual machine of the second virtualization system running on the second computing node is instantiated on the first computing node (e.g., see FIG. 3, para 48, “Actions taken by one or more instances of the virtualized swap framework can apply to a node (or between nodes), and/or to a cluster (or between clusters), and/or between any resources or subsystems accessible by the virtualized swap framework, the virtualized controllers, and/or their agents”) .
As to claim 7, Olderdissen teaches wherein at least a portion of the copy of the second virtual machine of the second virtualization system is stored in physical memory of the interconnection (see FIG. 3, para [0048] In certain embodiments, one or more instances of a virtualized swap framework can be implemented over any of the components in the distributed virtualization environment 300 to facilitate the herein disclosed techniques. Specifically, virtualized swap framework 110.sub.11 can be implemented in one or more VEs (e.g., VE 358.sub.11K) and/or one or more hypervisors (e.g., hypervisor 154.sub.11) of computing node 152.sub.11, and virtualized swap framework 110.sub.1M can be implemented in one or more VEs (e.g., VE 358.sub.1MK), one or more hypervisors (e.g., hypervisor 154.sub.1M), and/or host operating system 156.sub.1M of computing node 152.sub.1M. Such instances of the virtualized swap framework can be implemented in any node in any cluster. Actions taken by one or more instances of the virtualized swap framework can apply to a node (or between nodes), and/or to a cluster (or between clusters), and/or between any resources or subsystems accessible by the virtualized swap framework, the virtualized controllers, and/or their agents. ) . However, Olderdissen does not the interaction fabric. McGraw teaches The interaction fabric (e.g., see rejection of claim 1 above ) . Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the method of Olderdissen by adopting the teachings of McGraw to allow “ I/O utilization can be more efficient as I/O resources can be shared between compute resources sequentially or concurrently.” (see McGraw, para 54).
As to claim 8, see rejection of claim 1 above
As to claims 9-14 see rejection of claims 2-7 above.
As to claim 15, see rejection of claim 1 above
As to claims 16-21, see rejection of claims 2-7 above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABDOU K SEYE whose telephone number is (571)270-1062. The examiner can normally be reached M-F 9-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pierre Vital can be reached at 5712724215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ABDOU K SEYE/Examiner, Art Unit 2198
/PIERRE VITAL/Supervisory Patent Examiner, Art Unit 2198
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