DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of species 1 (figures 3-5 and claims 1-20) in the reply filed on 03/09/26 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
1 Claims 1-2, 9 and 17-20 are rejected under 35 U.S.C. 102a1 as being anticipated by Ho-Hsiang (US 20100164667).
Regarding claim 1, Ho-Hsiang (figures 2a-2d and para 0028-0032) discloses a substrate (see figure 2d and para 0031); a first conductive layer (230) on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments (see figure 2c and para 0028-0030); a second conductive layer (220) over the first conductive layer opposite the substrate (see figures 2b-2d), the second metal layer (220) comprising a third set of conductive segments and a fourth set of conductive segments(see figure 2b and para 0028-0030); a first set of vias between the first set of conductive segments and the third set of conductive segments (see para 0028 and figure 2d), wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding (see para 0028-0030); and a second set of vias between the second set of conductive segments and the fourth set of conductive segments(see figure 2d and para 0028), wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding(see para 0028-0030).
Regarding claim 2, Ho-Hsiang (figure 2a) discloses wherein the first transformer winding is interleaved with the second transformer winding.
Regarding claim 9, Ho-Hsiang (para 0028) discloses wherein: the first conductive layer is a metal; and the second conductive layer is a metal.
Regarding claim 17, Ho-Hsiang (figures 2a-2d and para 0028-0032) discloses a first transformer (202) winding comprising: a first set of metal segments in a first metal layer (see figures 2a-2d and para 0028-0030); a second set of metal segments in a second metal layer (see figures 2a-2d);and a first set of conductive vias coupling together the first set of metal segments to the second set of metal segments (see para 0028); and a second transformer winding (206) comprising: a third set of metal segments in the first metal layer (see figures 2a-2d and para 0028-0030)a fourth set of metal segments in the second metal layer (see figures 2a-2d and para 0028-0030) and a second set of conductive vias coupling together the third set of metal segments to the fourth set of metal segments (see figure 2d and para 0028); wherein the first transformer winding is interleaved with the second transformer winding(see figures 2a-5c).
Regarding claim 18, Ho-Hsiang (figures 2a-2d) discloses wherein each of the first transforming winding and the second transformer winding has at least two turns.
Regarding claim 19, Ho-Hsiang (figures 2a-2d) discloses further including a dielectric layer (270) between the first metal layer and the second metal layer.
Regarding claim 20, Ho-Hsiang (figures 2b-2c) discloses wherein at least one metal segment of the first set of metal segments is a different length than at least one metal segment of the second set of metal segments.
2 Claims 1-2, 9 and 17-20 are rejected under 35 U.S.C. 102a1 as being anticipated by Huang (US 20060077028).
Regarding claim 1, Huang (figures 5a-5b and para 0037-0048) discloses a substrate (see figure 5b and para 0040); a first conductive layer (see figures 5a-5b) on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments (see figures 5a-5b and para 0037-0042); a second conductive layer (see figures 5a-5b) over the first conductive layer opposite the substrate (see figures 5a-5b), the second metal layer (see figures 5a-5b and para 0037-0042) comprising a third set of conductive segments and a fourth set of conductive segments( see figures 5a-5b and para 0037-0042); a first set of vias (see figure 5a and para 0039) between the first set of conductive segments and the third set of conductive segments (see figure 5a), wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding (see para 0041); and a second set of vias between the second set of conductive segments and the fourth set of conductive segments(see para 0041), wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding(see para0041).
Regarding claim 2, Huang (figures 5a-5b) discloses wherein the first transformer winding is interleaved with the second transformer winding.
Regarding claim 9, Huang (para 0021) discloses wherein: the first conductive layer is a metal; and the second conductive layer is a metal.
Regarding claim 17, Huang (figures 5a-5b and para 0037-0048) discloses a first transformer (501) winding comprising: a first set of metal segments in a first metal layer (see figures 5a-5b and para 0037-0048); a second set of metal segments in a second metal layer (see figures 5a-5b); and a first set of conductive vias coupling together the first set of metal segments to the second set of metal segments (see figures 5a-5b); and a second transformer winding (503) comprising: a third set of metal segments in the first metal layer (see figures 5a-5b and para 0037-0048); a fourth set of metal segments in the second metal layer(see figures 5a-5b and para 0037-0048); and a second set of conductive vias coupling together the third set of metal segments to the fourth set of metal segments (see figures 5a-5b and para 0037-0048); wherein the first transformer winding is interleaved with the second transformer winding(see figures 5a-5b).
Regarding claim 18, Huang (figures 5a-5b) discloses wherein each of the first transforming winding and the second transformer winding has at least two turns.
Regarding claim 19, Huang (figure 5b) discloses further including a dielectric layer (505b) between the first metal layer and the second metal layer.
Regarding claim 20, Huang (figure 5a) discloses wherein at least one metal segment of the first set of metal segments is a different length than at least one metal segment of the second set of metal segments.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3 Claims 3-8 are rejected under 35 U.S.C. 103 as being unpatentable over Babazadeh et al. (DE 102017116103)(English translation) in view of Huang (US 20060077028).
Regarding claim 3, Huang (figure 5a) discloses wherein a first terminal on one of the conductive segments of the third set of conductive segments; a second terminal on another conductive segment of the third set of conductive segments but does not expressly discloses a first die coupled to the first terminal and to the second terminal..
Babazadeh et al. (figures 4-8, page 2 and last para of page 5 discloses wherein multiple semiconductor dies can be implemented if needed).
Accordingly, It would have been obvious to one of ordinary skill in the art to design wherein the first die coupled to the first terminal and to the second terminal as taught by Babazadeh et al. to the electronic device of Huang so as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics
Regarding claim 4, designing wherein the first die is at least partially supported by the conductive segments of the third set of conductive segments that include the first terminal and the second terminal would have been an obvious design consideration based on intended application/environment use. Such as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics
Regarding claim 5, Huang (figure 5a) discloses wherein a third terminal on one conductive segment of the fourth set of conductive segments; and a fourth terminal on another conductive segment of the fourth set of conductive segments.
Babazadeh et al. (figures 4-8, page 2 and last para of page 5 discloses wherein multiple semiconductor dies can be implemented if needed). It would have been obvious to one of ordinary skill in the art to design wherein the second die is coupled to the third terminal and to the fourth terminal so as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics.
Regarding claim 6, designing wherein the second die is at least partially supported by the conductive segments of the fourth set of conductive segments that include the third terminal and the fourth terminal would have been an obvious design consideration based on intended application/environment use. Such as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics.
Regarding claim 7, Babazadeh et al. (figures 3-8 and pages 2-10) discloses the first die includes transistors configured to provide a switching voltage waveform to be provided to the first transformer winding; and the second die includes a rectifier configured to rectify the voltage from the second transformer winding.
Regarding claim 8, Babazadeh et al. (figures 3-8 and pages 2-10) discloses wherein the apparatus is an isolation voltage converter.
4 Claims 10-11 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Babazadeh et al. (DE102017116103)(English translation) in view of Ho-Huang (US 20060077028).
Regarding claim 10, Babazadeh et al. (figures 3-8 and pages 2-10) discloses a first semiconductor die including a power stage circuit (see figures 4-8, page 2 and last para of page 5); a second semiconductor die including a rectifier(see figures 4-8, page 2 and last para of page 5 disclosing multiple dies may be used).
Babazadeh et al. (figure 4-8) discloses a transformer (160), the first semiconductor die coupled to the first transformer winding; the second semiconductor die coupled to the second transformer winding.(see last para of page 5 disclosing wherein multiple semiconductor dies can be implemented in the circuit design)
Babazadeh et al. (figure 4-8) does not expressly discloses a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding.
Ho-Hsiang (figures 2a-2d and para 0028-0032) discloses a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding as taught by Ho-Hsiang to the electronic device of Babazadeh et al. so as to allow for more compact design thereby saving valuable space on the printed circuit board while also reducing noise and improve magnetic flux distribution.
Regarding claim 11, Ho-Hsiang (figure 2a) discloses wherein the first transformer winding is interleaved with the second transformer winding.
Regarding claim 16, Ho-Hsiang (figures 2a-2d) discloses wherein:the first conductive layer is a metal; and the second conductive layer is a metal.
5 Claims 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Babazadeh et al. (DE102017116103)(English translation) in view of Huang (US 20060077028).
Regarding claim 10, Babazadeh et al. (figures 3-8 and pages 2-10) discloses a first semiconductor die including a power stage circuit (see figures 4-8, page 2 and last para of page 5); a second semiconductor die including a rectifier(see figures 4-8, page 2 and last para of page 5 disclosing multiple semiconductor dies may be used).
Babazadeh et al. (figure 4-8) discloses a transformer (160), the first semiconductor die coupled to the first transformer winding; the second semiconductor die coupled to the second transformer winding.(see last para of page 5 disclosing wherein multiple semiconductor dies can be implemented in the circuit design)
Babazadeh et al. (figure 4-8) does not expressly discloses a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding.
Huang (figures 5a-5b and para 0037-0048) discloses a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a structural make-up of the transformer wherein the transformer comprises a substrate; a first conductive layer on the substrate, the first conductive layer comprising a first set of conductive segments and a second set of conductive segments; a second conductive layer over the first conductive layer opposite the substrate, the second conductive layer comprising a third set of conductive segments and a fourth set of conductive segments; a first set of vias between the first set of conductive segments and the third set of conductive segments, wherein the first set of conductive segments, the third set of conductive segments, and the first set of vias form a first transformer winding and a second set of vias between the second set of conductive segments and the fourth set of conductive segments, wherein the second set of conductive segments, the fourth set of conductive segments, and the second set of vias form a second transformer winding as taught by Huang to the electronic device of Babazadeh et al. so as to allow for more compact design thereby saving valuable space on the printed circuit board while also reducing noise and improve magnetic flux distribution.
Regarding claim 11, Huang (figure 5a) discloses wherein the first transformer winding is interleaved with the second transformer winding.
Regarding claim 12, Huang (figure 5a) discloses wherein a first terminal on one of the conductive segments of the third set of conductive segments; and a second terminal on another conductive segment of the third set of conductive segments.
Babazadeh et al. (figures 4-8, page 2 and last para of page 5 discloses wherein multiple semiconductor dies can be implemented if needed). It would have been obvious to one of ordinary skill in the art to design wherein the first die coupled to the first terminal and to the second terminal so as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics.
Regarding claim 13, designing wherein the first die is at least partially supported by the conductive segments of the third set of conductive segments that include the first terminal and the second terminal would have been an obvious design consideration based on intended application/environment use. Such as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics
Regarding claim 14, Huang (figure 5a) discloses wherein a third terminal on one conductive segment of the fourth set of conductive segments; and a fourth terminal on another conductive segment of the fourth set of conductive segments.
Babazadeh et al. (figures 4-8, page 2 and last para of page 5 discloses wherein multiple semiconductor dies can be implemented if needed). It would have been obvious to one of ordinary skill in the art to design wherein the second die is coupled to the third terminal and to the fourth terminal so as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics.
Regarding claim 15, designing wherein the second die is at least partially supported by the conductive segments of the fourth set of conductive segments that include the third terminal and the fourth terminal would have been an obvious design consideration based on intended application/environment use. Such as to allow for reduced parasitic effects and improved physical, thermal, and electrical characteristics.
Regarding claim 16, Huang (para 0021) discloses wherein: the first conductive layer is a metal; and the second conductive layer is a metal
Conclusion
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/RONALD HINSON/Primary Examiner, Art Unit 2837
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