DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5 August 2026 has been entered.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5 August 2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-5, 7, 9, 11-12, 15-22 are rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov et al. (WO 2019/185633A1; hereinafter "Ouzounov"). It should be appreciated that corresponding US PGPUB 20210367611 will act as a proxy for WO 2019/185633A1 henceforth.
With regards to Claim 1, an event-based ultrasound system (ultrasound imaging system; see Ouzounov ¶ [0239]) comprising:
a transducer array (acoustic transducer array 110; see Ouzounov FIG. 1 & ¶ [0239]) comprising transducer elements (transducers elements 160; see Ouzounov FIG. 1 & ¶ [0239]) and a timing system (time-to-digital converter may be configured to operate in a number of ways, such as measuring the time between events or simply timestamping events as they arrive; see Ouzounov ¶ [0280 & 0286]), wherein the transducer elements are connected to event-detection circuits (a first ASIC having multiplexer 270 for labelling each edge timing event; see Ouzounov ¶ [0270 & 0273]), and wherein the event-detection circuits generate events (the analog signals received by the transducer elements are passed through asynchronous sigma-delta modulators 150, thereby generating a plurality of binary bit-streams in the time domain, which may then be combined into a multiplexed signal; see Ouzounov ¶ [0270]) and wherein data for an event comprises an up-down value (the multiplexer 270 may treat each rising or falling edge as a separate edge timing event; see Ouzounov ¶ [0273]), a timestamp based on the timing system (time-to-digital converter may be configured to operate in a number of ways, such as measuring the time between events or simply timestamping events as they arrive; see Ouzounov ¶ [0280 & 0286]), and an address of a transducer element (the multiplexer may label each edge timing event with a unique (digital) identifier {i.e. address} and convey them to the second ASIC in an asynchronous fashion; see Ouzounov ¶ [0273]);
a computing and imaging device (second ASIC 120; see Ouzounov FIG. 7 & ¶ [0282]); and
a connection (data channel 210; see Ouzounov FIG. 7 & ¶ [0282]) connecting the transducer array to the computing and imaging device (data channel 210; see Ouzounov FIG. 7 & ¶ [0282]), wherein the data for the events generated by the event-detection circuits is transmitted to the computing and imaging device across the connection (remote processing unit comprises a second ASIC 120 adapted to interpret the multiplexed signal. In some examples the ASIC comprises a time to digital converter, the function of which is described further below. Using the measurements from the second ASIC, the binary bit-stream can be reconstructed entirely in the digital domain; see Ouzounov 271).
While Ouzounov discloses generating events based on the electrical signals of the transducer elements, it appears that Ouzounov may not explicitly disclose generating events directly based on the electrical signals of the transducer elements. However, one of ordinary skill in the art would readily interpret each input line of Ouzounov’s multiplexer preceded by a corresponding delta-sigma modulator {i.e. each channel amounts to a circuit} as an individual event-detection circuit under the obviousness doctrine by way of making integral. One of ordinary skill in the art would recognize that the op-amp 110 circuit resemble a differentiator op-amp. Since the output of the op-amp 110 is an asynchronous quantization signal, as disclosed in FIG. 1, which is similar to an output of a differentiator op-amp, one of ordinary skill in the art would recognize that the claimed event-detection circuit as disclosed in FIG. 1 is an op-amp circuit in series with an edge-detection component circuit while claimed as an integrated event-detection circuit. Accordingly, one of ordinary skill in the art would recognize that each of Ouzounov’s sigma-delta modulators in series with a corresponding multiplexer channel amounts to a single event encoding circuit (see Ouzounov ¶ [0271]).
It should be appreciated that the same logic pattern and rationale are applied to Claim 12 as applied to Claim 1.
With regards to Claim 21, modified Ouzounov teaches of wherein an event-detection circuit of the event-detection circuits generates an event when an edge-up or edge-down is detected in an electrical signal from a one of the transducer elements to which the event-detection circuit is connected (the multiplexer 270 may treat each rising or falling edge as a separate edge timing event; see Ouzounov ¶ [0273]).
With regards to Claim 32, modified Ouzounov teaches of wherein the event-detection circuit does not generate an event when no edge-up or edge-down is detected in the electrical signal from a one of the transducer elements to which the event-detection circuit is connected (the multiplexer 270 may treat each rising or falling edge as a separate edge timing event; see Ouzounov ¶ [0273]; it should be appreciated that a binary zero amounts to null data such that no data is transmitted).
With regards to Claim 41, modified Ouzounov teaches of further comprising transducer memories connected to the transducer elements, wherein each one of the transducer memories stores data for events generated by an event-detection circuit to which the one of the transducer memories is connected (capacitor stores the charge of the sigma-delta modulator which amounts to a memory; see Ouzounov ¶ [0264]).
With regards to Claim 54, modified Ouzounov teaches of wherein the transducer memories store the data for events without addresses of transducer elements, and wherein the addresses for the transducer elements are added to the data for the events when the data for the events is read out from the transducer memories (the multiplexer may label each edge timing event with a unique (digital) identifier and convey them to the second ASIC, i.e. the label is appended after the detection event; see Ouzounov ¶ [0273]).
With regards to Claim 71, modified Ouzounov teaches of wherein the up-down value for an event comprises a single bit generated by one of the event-detection circuits (the analog signals received by the transducer elements are passed through asynchronous sigma-delta modulators 150, thereby generating a plurality of binary bit-streams in the time domain, which may then be combined into a multiplexed signal; see Ouzounov ¶ [0270]; i.e. binary quantization is a single bit quantization).
It should be appreciated that the same logic pattern and rationale are applied to Claim 18 as applied to Claim 7.
With regards to Claim 91, modified Ouzounov teaches of wherein the data for the events generated by the event-detection circuits is transmitted to the computing and image device using the connection at intervals (A time-to-digital converter operates at a given time resolution, accepting an input signal once per given time interval according to its operating resolution; see Ouzounov ¶ [0198]).
With regards to Claim 111. modified Ouzounov teaches of wherein the computing and imaging device generates images from the data for the events received over the connection (the retrieved data may be used to construct an ultrasound image; see Ouzounov ¶ [0283]).
With regards to Claim 1512, modified Ouzounov teaches of wherein timestamping the event by generating a timestamp that indicates a time at which the event occurred for data for the event comprises uses a time of a clock of a timing system (time-to-digital converter {i.e. clock of a timing system} may be configured to operate in a number of ways, such as measuring the time between events or simply timestamping events as they arrive; see Ouzounov ¶ [0280 & 0286]).
With regards to Claim 1612, modified Ouzounov teaches of further comprising not transmitting data based on the electrical signal output by the transducer element to the computing device in absence of data for an event generated after detection of the event by the event-detection circuit (the multiplexer 270 may treat each rising or falling edge as a separate edge timing event; see Ouzounov ¶ [0273]; it should be appreciated that a binary zero amounts to null data such that no data is transmitted).
With regards to Claim 1712, modified Ouzounov teaches of further comprising:
receiving, by the computing device over a connection, the data for the event (data channel 210 for receiving bitstream at second ASIC 120; see Ouzounov FIG. 7 & ¶ [0282]); and
generating, by the computing device, and image based on the data for the event and data for one or more other events, wherein the one or more other events occurred at any time relative to the event (the retrieved data may be used to construct an ultrasound image; see Ouzounov ¶ [0283]).
With regards to Claim 1912, wherein the address of the transducer element indicates the location of the transducer element within a transducer array (obtaining the plurality of analog signals each analog signal being obtained from a separate channel, wherein each separate channel is associated with a channel identifier; see Ouzounov ¶ [0147]; wherein each channel identifies the location of the transducer element).
With regards to Claim 2012. wherein an edge-up event occurs when the transducer element transitions from generating a voltage that is below a noise floor to generating a voltage that is above the noise floor, and wherein an edge-down event occurs when the transducer element transitions from generating a voltage that is above the noise to floor to generating a voltage that is below the noise floor (loops filter 170 for reducing self-oscillation, i.e. noise floor; see Ouzounov ¶ [0241] FIG. 2, 4).
With regards to Claim 2112, wherein time gain compensation is used to account for attenuation of electrical signals generated by the transducer elements over time (time gain control (TGC) function by way of a TGC circuit 240; see Ouzounov ¶ [0253] & FIG. 4).
With regards to Claim 2212, further comprising converting data for events comprising at least the data for the event to a regularly sampled dataset (A time-to-digital converter operates at a given time resolution, accepting an input signal once per given time interval; see Ouzounov ¶ [0198]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov as applied to claim 1 above, and further in view of Rothberg et al. (US PGPUB 20150297193; hereinafter "Rothberg1").
With regards to Claim 61, while modified Ouzounov discloses all of the limitations of intervening Claim 1, it appears that modified Ouzounov may be silent to further comprising transducer group memories connected to transducer elements, wherein each of the transducer group memories stores data for events generated by a group of event-detection circuits to which the one of the transducer group memories is connected. However, Rothberg teaches of a single chip ultrasonic imaging solution which relies on 1-bit quantization with a sigma-delta ADC (see Rothberg1 Abstract & ¶ [0046]). In particular Rothberg teaches of further comprising transducer group memories connected to transducer elements (RX buffer memory 140; see Rotherberg1 FIG. 1 & ¶ [0044]), wherein each of the transducer group memories stores data for events generated by a group of event-detection circuits to which the one of the transducer group memories is connected (beamforming in one direction than beamforming in another direction; see Rothberg1 ¶ [0113]; it should be appreciated that RX buffer memory 140 is connected to the first direction than the second direction, i.e. each group memories store event data for corresponding group).
Modified Ouzounov and Rothberg1 are both considered to be analogous to the claimed invention because they are in the same field of sigma-delta ADC in ultrasound reception. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have further modified Ouzounov to incorporate the above teachings of Rothberg1 to provide at least wherein each of the transducer group memories stores data for events generated by a group of event-detection circuits to which the one of the transducer group memories is connected. Doing so would aid in beamforming (see Rothberg1 ¶ [0113]).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov as applied to claim 1 above, and in further view of Rothberg et al. (US PGPUB 20220110529 having an effective filing date of 17 October 2011; hereinafter "Rothberg2").
With regards to Claim 81, while modified Ouzounov discloses all of the limitations of intervening claim 1, it appears that modified Ouzounov may be silent to wherein data for the events generated by the event-detection circuits is transmitted to the computing and image device using the connection in real time. However, Rothberg2 teaches of an ultrasound system for real-time volumetric imaging (see Rothberg2 ¶ [0159]) which relies on binary waveforms (see Rothberg2 ¶ [0192]).
Modified Ouzounov and Rothberg2 are both considered to be analogous to the claimed invention because they are in the same field of binary quantization of ultrasound signals. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have further modified Ouzounov to incorporate the above teachings of Rothberg2 to provide at least wherein data for the events generated by the event-detection circuits is transmitted to the computing and image device using the connection in real time. Doing so would aid in imaging a subject in motion (see Rothberg2 ¶ [0159]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov as applied to claim 1 above, and in further view of Isla et al. (“The Use of Binary Quantization for the Acquisition of Low SNR Ultrasonic Signals: A Study of the Input Dynamic Range,” (23 May 2016), IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control (Volume: 63, Issue: 9, September 2016); hereinafter "Isla").
With regards to Claim 101, while modified Ouzounov teaches a time-to-digital converter 290 on the second ASIC and not the first ASIC {i.e. timestamps are not generated by the event-detection circuits} (see Ouzounov ¶ [0281]), it appears that modified Ouzounov may be silent to wherein the timing system comprises a clock, and wherein all timestamps for all events generated by the event-detection circuits are based on the clock of the timing system. However, Isla teaches of binary quantization of ultrasonic signals for faster and more energy efficient data throughput (see Isla Abstract). In particular, Isla teaches of wherein the timing system comprises a clock, and wherein all timestamps for all events generated by the event-detection circuits are based on the clock of the timing system (Isla FIG. 1 clearly illustrates the comparator and latch {i.e. edge detection circuit collectively, wherein the latch amounts to local memory} is synchronized by a clock signal).
Modified Ouzounov and Isla are both considered to be analogous to the claimed invention because they are in the same field of binary quantization in ultrasound reception. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have further modified Ouzounov to incorporate the above teachings of Isla to provide at least wherein the timing system comprises a clock, and wherein all timestamps for all events generated by the event-detection circuits are based on the clock of the timing system . Doing so would aid in faster and more energy efficient data throughput (see Isla Abstract).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov as applied to claim 12 above, and in further view of Koenig et al. (WO 2016/038225; hereinafter "Koenig").
With regards to Claim 1312 , modified Ouzounov teaches of further comprising storing the up-down value (capacitor stores the charge of the sigma-delta modulator which amounts to a memory which occurs prior to multiplexing; see Ouzounov ¶ [0264] & FIG. 7); and
reading out the up-down value (capacitor stores the charge of the sigma-delta modulator which amounts to a memory which occurs prior to multiplexing; see Ouzounov ¶ [0264] & FIG. 7).
It appears that Ouzounov may be silent to storing a timestamp before adding the address. However, Koenig teaches of a method for an improved throughput of sensor data in a communication system which relies on a sigma/delta ADC (see Koenig pg. 15, lines 20-24) for generate a binary representation (see Koenig pg. 17, lines 26-36) of, for example, acoustic signals (see Koenig pg. 12, lines 4-12). In particular, Koenig teaches of storing the up-down value and timestamp of the data for the event are in a transducer memory that is local to the transducer element before adding the address of the transducer element to the data for the event (output of sigma/delta modulation 112 {binarization} is stored to buffer 114 which also has a timestamp inserted into it e; see Koenig FIG. 1 & 17, lines 26-36; ); and
reading out the up-down value and the timestamp of the data for the event from the transducer memory before adding the address of the transducer element to the data for the event (the buffer 114 appends the timestamp before transmission over bus 140 which is controlled by bus controller 150 which appends timeslot identifier {i.e. address}; see Koenig FIG. 1 & pg. 19, lines 13-32).
Modified Ouzounov and Koenig are both considered to be analogous to the claimed invention because they are in the same field of binarization of acoustic sensor signals. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have further modified Ouzounov to incorporate the above teachings of Koenig to provide at least storing a timestamp before adding the address. Doing so would aid in the system being more robust and less expensive (see Koenig pg. 15, lines 20-24).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Ouzounov as applied to claim 1 above, and in view of Rothberg1 as applied to claim 6 above, and further in view of Isla.
With regards to Claim 1412, while modified Ouzounov teaches of all of the intervening limitations of Claims 6, it appears that modified Ouzounov may be silent to further comprising storing the data for the event comprising the up-down value, timestamp, and address in a transducer group memory that is local to a group of transducer elements. However, as detailed above, Isla teaches of front-end clock synchronization, i.e. timestamp is generated and stored prior to transmission to the computing & imaging device (see Isla FIG. 1).
Modified Ouzounov and Isla are both considered to be analogous to the claimed invention because they are in the same field of binary quantization in ultrasound reception. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have further modified Ouzounov to incorporate the above teachings of Isla to provide at least storing the data for the event comprising the up-down value, timestamp, and address in a transducer group memory that is local to a group of transducer elements . Doing so would aid in faster and more energy efficient data throughput (see Isla Abstract).
Response to Arguments
Applicant’s arguments filed 5 August 2026 with respect to the rejection(s) under 35 U.S.C. 102(a)(1) have been fully considered but they are not persuasive.
With regards to Claim 1, Applicant contends that the “as the "single-bit quantizer" is the "event detection circuit I00." The Office disagrees. ¶ [0019] of the instant specification discloses that “An event-based ultrasound system may use a single bit quantizer and timing system” (emphasis added), whereas the embodiment of ¶ [0031] discloses “The event-detection circuit 100 may act a {sp.} single-bit quantizer for the electrical signal output by the transducer element it is connected to.” Assuming the grammar mistake is meant to recite “act as a…,” these two phrases are semantically distinct. While ¶ [0019] describe an embodiment which relies on either being a single-bit quantizer or having a single-bit quantizer component, the embodiment of ¶ [0031] merely discloses that the event detection circuit 100 acts similar to a single bit quantizer and does not require a single-bit quantizer. Moreover, both embodiments are defined modally, i.e. the instant specification discloses possible implementations of an event-detection circuit and does not explicitly define the event detection circuit as being one of said embodiments. Therefore, the claimed limitation of event-detection circuit does not inherit the special definition including a single-bit quantizer of ¶ [0019] or even the event detection circuit of FIG. 1 and is afforded its plain and ordinary meaning to one of ordinary skill in the art. Therefore, Applicant’s argument that “the "single-bit quantizer" is the "event detection circuit I 00", not a component thereof” is not persuasive.
Applicant also argues that square wave form in FIG. 1 “is not an analog signal that has been quantized, or digitized. It is, as the name implies, an analog waveform.” The Office disagrees. Applicant is directed to the definition of “quantized”1. Analog signals are continuous by definition and cannot be discrete. Therefore, the output of the op-amp 110 is, as disclosed by the instant specification, an asynchronous quantization signal. In conflict with Applicant’s own disclosure, Applicant also argues that “Operational amplifiers are not quantizers. Operational amplifiers are not used to digitize analog signals.” Firstly, if Applicant’s own admission that the embodiments of ¶ [0019] and ¶ [0031] are the same embodiment, the Applicant’s own disclosure refutes this statement in ¶ [0019] which discloses that “The timing system may synchronize the time stamping of data across the transducer array and may be used in the generation of timestamps for the up-down values generated by the single bit quantizer.” According to the instant specification, the edge detection component 140 timestamps whether the signal includes edge-up and edge-down events, i.e. the timing system. Where does the timing system get the up-down values generated by the single bit quantizer? One of ordinary skill in the art would recognize, based on circuit illustrated in FIG. 1, that the op-amp 110 with an inverted feedback signal based on detected edges from edge detection component 130 is said single bit quantizer. Accordingly, edge detection is not performed on analog signals as Applicant purports. It should be appreciated that the instant specification, as filed, fails to explicitly disclose or imply that the “Edge detection is performed on analog signals” as Applicant purports.
Secondly, Applicant’s argument is only partially true. An op-amp amplifies the voltage difference between its two inputs {i.e. inverting and non-inverting inputs}. The circuit, as illustrated in instant FIG. 1, uses the inverted feedback of a pulse signal {corresponding with detected edges of the output by edge detection component 130} to a generate a square wave signal which is clearly illustrated and clearly identified as an “asynchronous quantization” signal in FIG. 1. Said square wave is then input into the edge detection component 140.
Applicant also argues that the Ouzounov system that “the entirety of the analog signal is quantized.” It should be appreciated that without supporting evidence, Applicant’s opinion is not persuasive. Regardless, Ouzounov explicitly discloses that “simply timestamping events as they arrive” which one of ordinary skill in the art would recognize as only generating time-stamping data when the even occurs.
Applicant also argues that “the present specification does not detect edges in quantized signals. The signal is only quantized when an edge is detected.” The Office disagrees. In ¶ [0019], the instant specification discloses that “The timing system may synchronize the time stamping of data across the transducer array and may be used in the generation of timestamps for the up-down values generated by the single bit quantizer.” Since the edge detection component 140 is disclosed as “time stamping edge detection component 140,” one of ordinary skill in the art would recognized the component as the timing system. Moreover, the only input of the time stamping edge detection component 140 is form the output of the op-amp 110. Accordingly, one of ordinary skill in the art would recognize, the instant specification, that the op-amp 110 generates the up-down values as the single bit quantizer. For at least this reason, Applicant’s argument is not persuasive.
With regards to Claims 3 & 16, Applicant argues that “the transmission of a binary "O" is not equivalent to "no data." Without acquiescing to Applicant’s arguments, the Office contends that Applicant’s arguments are moot because they have provided no evidence to support the opinion that Ouzounov generates data when no edges are detected. In fact, Ouzounov discloses that “Concurrent edge timing events may be detected concurrently, but processed sequentially…. concurrent events can be buffered and transmitted sequentially” (see Ouzounov ¶ [0280]). One of ordinary skill in the art would recognize that Ouzounov timing events cannot be sequential if null data is generated between timing events as Applicant contends.
With regards to Claim 2, Applicant argues that “events are detected directly in the electrical signal from a transducer element without prior quantization.” The Office disagrees. Firstly, the claim only recites detecting events from an electrical signal from one of the transducer elements. While parent Claim 1 recites directly, there is no corresponding claim language that indicates that said detection is prior to quantization. Moreover, as detailed above, the instant specification explicitly discloses edge events are detected in a quantized signal with respect to ¶ [0019]. Regardless, Ouzounov’s circuit includes both the sigma-delta modulator and corresponding multiplexer channel amount to a single circuit, as detailed above. Therefore, the input to the Ouzounov circuit is the analog transducer signal.
With regards to independent Claim 12, applicant relies on the same rationale to argue that said independent claims distinguish from the cited prior art. Accordingly, said argument is not persuasive for at least the same reasons as Claim 1 as detailed above.
With regards to dependent claims, Applicant relies on the virtue of their dependency upon abovementioned independent claims to argue novelty. Accordingly, said argument is not persuasive for at least the same reasons as Claim 1 & 12 as detailed above.
Applicant is directed to Lavache (US PGPUB 20110026363) which teaches of edge detection in analog ultrasound signals with an amplifier and comparator arrangement (see Lavache ¶ [0012]). One of ordinary skill in the art would recognize that Ouzounov in view of Lavache would obviate the embodiment of ¶ [0031].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHISH S. JASANI whose telephone number is (571)272-6402. The examiner can normally be reached M-F 9:00 am - 5:00 pm (CST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Keith M. Raymond can be reached on (571) 270-1790. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ASHISH S. JASANI/Examiner, Art Unit 3798
/JOEL LAMPRECHT/Primary Examiner, Art Unit 3798
1 “a set of specific, discrete values instead of a continuous range”
Prosecution Insights