DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 8-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 12, and 19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Didier (US Pub. 20220374755).
Referring to claim 1, Didier discloses A system for performing a quantum computation comprising: a quantum component [fig. 1; quantum computing systems 103]; and a classical component, the classical component including at least one processor, and at least one non-transitory computer-readable medium containing instructions that, when executed by the at least one processor, cause the classical component to perform operations [fig. 1; servers 108 comprising classical processor 1111 and memory 112] comprising:
obtaining a description of a quantum computational task [pars. 3 and 24; a quantum computer can perform computational tasks by executing a quantum algorithm];
generating a gate sequence implementing the quantum computational task [pars. 3 and 24; the quantum algorithm is expressed as quantum circuit that is implemented as a series of quantum logic gates], generation comprising:
identifying, in the gate sequence, a two-qubit gate applied to two qubits [pars. 3 and 25; the quantum logic gates may include a two-qubit gate applied to qubits; note that two-qubit means the gate is applied to two qubits];
determining a decomposition sequence that implements the two-qubit gate using at least one square root of iSWAP (SQiSW) gate and at least one single-qubit gate [pars. 29 and 93; the two-qubit gate can be applied using a variety of gates such as square-root-of-iSWAP gates, which can be combined with single-qubit gates to define a universal set of quantum logic gates for universal quantum computation (e.g., the two-qubit gate can be decomposed using a combination of square-root-of-iSWAP and single-qubit gates)]; and
including the decomposition sequence in the gate sequence in place of the two-qubit gate [pars. 3, 25, 29, and 93; note that the two-qubit gate is part of the series of quantum logic gates, and thus the two-qubit gate would be applied using the decomposition; and
providing commands applying the gate sequence to the quantum component [fig. 1; pars. 3, 24, and 93; the quantum algorithm is executed by applying the series of quantum logic gates (i.e., instruction sets) to the quantum computer] and
obtaining an output from the quantum component [par. 38; the servers receive output data from the computation tasks performed by the quantum computer].
Referring to claim 12, see at least the rejection for claim 1, which incorporates the claimed computer-readable medium.
Referring to claim 19, see the rejection for claim 1, which incorporates the claimed method.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 7, 13, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Didier in view of Winick et al. (US Pub. 20210099201).
Referring to claim 2, Didier does not appear to explicitly disclose The system of claim 1, wherein: determining a decomposition sequence comprises performing a Cartan decomposition of a unitary of the two-qubit gate.
However, Winick discloses The system of claim 1, wherein: determining a decomposition sequence comprises performing a Cartan decomposition of a unitary of the two-qubit gate [par. 88; note reference to Cartan’s KAK decomposition, which decomposes a 2-qubit unitary into a combination of simpler gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed using Cartan’s KAK decomposition as taught by Winick, with a reasonable expectation of success. The motivation for doing so would have been to simplify the quantum circuit to make it easier to understand and control [Didier, pars. 24 and 25].
Referring to claim 7, Didier does not appear to explicitly disclose The system of claim 1, wherein: determining the decomposition sequence comprises analytically determining the at least one single-qubit gate.
However, Winick discloses discloses The system of claim 1, wherein: determining the decomposition sequence comprises analytically determining the at least one single-qubit gate [par. 88; note reference to Cartan’s KAK decomposition, which decomposes a 2-qubit unitary into a combination of simpler gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed using Cartan’s KAK decomposition as taught by Winick, with a reasonable expectation of success. The motivation for doing so would have been to simplify the quantum circuit to make it easier to understand and control [Didier, pars. 24 and 25].
Referring to claim 13, see the rejection for claim 2.
Referring to claim 18, see the rejection for claim 7.
Referring to claim 20, see the rejection for claim 2.
Claims 3-6 and 14-17 are rejected under 35 U.S.C. 103 as being unpatentable over Didier in view of Ryan et al. (US Pat. 11562284).
Referring to claim 3, Didier does not appear to explicitly disclose The system of claim 1, wherein: the decomposition includes two SQiSW gates when the two-qubit gate is, or is locally equivalent to, a special orthogonal gate.
However, Ryan discloses The system of claim 1, wherein: the decomposition includes two SQiSW gates when the two-qubit gate is, or is locally equivalent to, a special orthogonal gate [figs. 8A-8D, 12, and 13A; col. 30, line 25 – col. 32, line 33; decomposition of an XY(B,0) gate depends on equivalences between the entangling phase B and equal and opposite local single-qubit gates applied before and after the XY gate; note variations of one or two square-root-of-iSWAP pulses and one, two, or three XY gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed based on equivalencies as taught by Ryan, with a reasonable expectation of success. The motivation for doing so would have been to account for the relative phase between single-qubit frames and the two-qubit frame [col. 30, lines 25-28].
Referring to claim 4, Didier does not appear to explicitly disclose The system of claim 1, wherein: the at least one single-qubit gate comprises three single-qubit gates and the decomposition specifies application of the three single-qubit gates to one of the two qubits when the two-qubit gate is, or is locally equivalent to, a CPHASE gate or super-controlled gate.
However, Ryan discloses The system of claim 1, wherein: the at least one single-qubit gate comprises three single-qubit gates and the decomposition specifies application of the three single-qubit gates to one of the two qubits when the two-qubit gate is, or is locally equivalent to, a CPHASE gate or super-controlled gate [figs. 8A-8D, 12, and 13A; col. 30, line 25 – col. 32, line 33; decomposition of an XY(B,0) gate depends on equivalences between the entangling phase B and equal and opposite local single-qubit gates applied before and after the XY gate; note variations of one or two square-root-of-iSWAP pulses and one, two, or three XY gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed based on local equivalencies as taught by Ryan, with a reasonable expectation of success. The motivation for doing so would have been to account for the relative phase between single-qubit frames and the two-qubit frame [col. 30, lines 25-28].
Referring to claim 5, Didier does not appear to explicitly disclose The system of claim 1, wherein: the at least one single-qubit gate comprises three single-qubit gates and the decomposition specifies application of a first one of the three single-qubit gates to a first one of the two qubits and application of a second and a third one of the three single-qubit gates to a second one of the two qubits when the two-qubit gate is, or is locally equivalent to, an iSWAP gate.
However, Ryan discloses discloses The system of claim 1, wherein: the at least one single-qubit gate comprises three single-qubit gates and the decomposition specifies application of a first one of the three single-qubit gates to a first one of the two qubits and application of a second and a third one of the three single-qubit gates to a second one of the two qubits when the two-qubit gate is, or is locally equivalent to, an iSWAP gate [figs. 8A-8D, 12, and 13A; col. 30, line 25 – col. 32, line 33; decomposition of an XY(B,0) gate depends on equivalences between the entangling phase B and equal and opposite local single-qubit gates applied before and after the XY gate; note variations of one or two square-root-of-iSWAP pulses and one, two, or three XY gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed based on local equivalencies as taught by Ryan, with a reasonable expectation of success. The motivation for doing so would have been to account for the relative phase between single-qubit frames and the two-qubit frame [col. 30, lines 25-28].
Referring to claim 6, Didier does not appear to explicitly disclose The system of claim 1, wherein: the decomposition specifies application of one SQiSW gate when the two-qubit gate is, or is locally equivalent to, an improper orthogonal gate.
However, Ryan discloses discloses The system of claim 1, wherein: the decomposition specifies application of one SQiSW gate when the two-qubit gate is, or is locally equivalent to, an improper orthogonal gate [figs. 8A-8D, 12, and 13A; col. 30, line 25 – col. 32, line 33; decomposition of an XY(B,0) gate depends on equivalences between the entangling phase B and equal and opposite local single-qubit gates applied before and after the XY gate; note variations of one or two square-root-of-iSWAP pulses and one, two, or three XY gates].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the quantum computation taught by Didier so that the two-qubit gate is decomposed based on local equivalencies as taught by Ryan, with a reasonable expectation of success. The motivation for doing so would have been to account for the relative phase between single-qubit frames and the two-qubit frame [col. 30, lines 25-28].
Referring to claim 14, see the rejection for claim 3.
Referring to claim 15, see the rejection for claim 4.
Referring to claim 16, see the rejection for claim 5.
Referring to claim 17, see the rejection for claim 6.
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/Grace Park/Primary Examiner, Art Unit 2144