DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Examiner acknowledges amended claims 1, 3-4, 6, and 8-20. As well as cancelation of claims 2, 5, and 7.
Response to Arguments
Applicant’s arguments with respect to claim(s) claims 1 and 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Objections
Previous claim objection has been withdrawn
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 and 20 recites the limitation "the first VCSEL and second VCSEL" in page 2. There is insufficient antecedent basis for this limitation in the claim.
Claim 6 states “wherein the width of the blocking structure in the direction parallel to the first crystal axis is less than 30% of the”. It is not clear what the Applicant is referring since the claim is missing to what it is comparing to. For examination purposes, the Examiner will consider it as “wherein the width of the blocking structure in the direction parallel to the first crystal axis is less than 30% of the pitch”.
Claims 3-4, and 9-19 are rejected due to their dependency with claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 6, 9-18, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over by Roucka (US Patent US-20210305782-A1) in the view of Onishi (US Patent US-20150124433-A1) hereinafter Onishi and Dummer (US Patent US-20180301871-A1), hereinafter Dummer.
Regarding claim 1, Roucka teaches a semiconductor device comprising an array of vertical cavity surface emitting lasers VCSELs (Fig. 23 VCSEL array #2300) having a pitch (annotated figure below “pitch”), the semiconductor device comprising:
- a first VCSEL (Fig. 23 top left VCSEL ) having a first active area (Fig. 23 aperture #2312b of top left VCSEL) with a first active area width less than 20 um ([0087] “each constituent VCSEL emitter each may have a diameter of about 10 μm”);
- a second VCSEL area (Fig. 23 top right VCSEL) having a second active area (Fig. 23 aperture #2312b of top right VCSEL) with a second active area width less than 20 um ([0087] “each constituent VCSEL emitter each may have a diameter of about 10 μm”);
- a first bridge connecting the first VCSEL and the second VCSEL (Fig. 23 first portion of #2328 connects the top right and left VCSEL, see annotated figure below);
wherein the first active area of the first VCSEL and the second active area of the second VCSEL are arranged along a first axis; and
- a blocking structure arranged between the first VCSEL and the second VCSEL, along the first axis (Fig. 23 apertures #2312b from top left and right VCSELs are arrange along “first axes” as indicated in the figure below); and - a blocking structure (Fig. 23 structure # 2324b) arranged between the first VCSEL and the second VCSEL (Fig. 23 structure # 2324b are between top left and right VCSELs),
wherein a length of the blocking structure in a direction perpendicular to the first axis (Fig. 23 structure 2324b which length “W1” is perpendicular to the first axis as seen in the annotated figure below) is greater than the first active area width (annotated figure 1 “W1” is greater than “W2”, where W2 is the diameter of the VCSEL emitter), and, wherein the pitch is not more than 30um (Annotated figure below shows that the pitch is 30um; see [0087]).
PNG
media_image1.png
741
853
media_image1.png
Greyscale
Roucka fails to teach determining a crystal axis; first and second VCSEL being rectangular VCSELs; a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch.
However, Onishi teaches a VCSEL array (Fig. 8a laser array #302); a first active area (Fig. 8a light emission of top left laser) and a second active area (Fig. 8a light emission of top right laser); wherein the first active area of the first VCSEL and the second active area of the second VCSEL are arranged along a first crystal axis (Fig. 8a light emission of top left and right laser are arranged along “a” crystal axis).
It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device having a first crystal axis (e.g. having the “first axis” indicated in the annotated figure above to be the “first crystal axis”) as taught by Onishi because it would allow to control the polarization of the emitted light in a desired direction (from Onishi see paragraphs [0015]; [0016] and [0018]).
Roucka’s device modified above fails to teach first and second VCSEL being rectangular VCSELs.
However, Dummer teaches an array of rectangular VCSELs (Fig. 4 array of rectangular VCSEL’s 402). It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device in the view of Onishi having a rectangular active area as taught by Dummer because it would allow to provide improved efficiency and low voltage as compared to the same size round VCSEL (from Dummer paragraph [0062]).
Rucka’s modified device above also fails to teach a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch.
However, having a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch can be reach through routine optimization (from Rucka Fig. 4 already teaches a width of 10um parallel to the first axis less than 40% of the pitch), see 2144.05 II A. It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Rucka’s device in the view of Onoshi and Dummer because it would result in a compact array (from Roucka [0087] states that Fig. 23 is to reach compact arrays with closely-spaced VCSEL output apertures) which is the result of routine optimization, MPEP 2144.05 II B.
Regarding claim 6, Roucka teaches the semiconductor device according to claim 1, wherein the width of the blocking structure in the direction parallel to the first crystal axis is less than 30% (from Roucka modified device width of structure 2324b would be less than 20% of the pitch).
Regarding claim 9, Roucka’s modified device as per claim 1 teaches wherein the blocking structure (from Roucka Fig. 23 structure #2324b) comprises a trench used for oxidation of the first rectangular VCSEL and the second rectangular VCSEL (from Roucka Fig. 23 #2324b is an oxide trench used for top left VCESEL and top right VCSEL, paragraph [0087] states “ The shared oxide trench width..” to refer to #2324b; modified Rucka’s device in the view of Dummer as per claim 1 would have rectangular VCSELs ).
Regarding claim 10, Roucka’s modified device as per claim 9 teaches wherein a depth of the trench exceeds a depth of an active layer of the first rectangular VCSEL or the second rectangular VCSEL (from Roucka Fig. 3A shows cross section of a single VCSEL in Fig. 23, see paragraph [0087], where the depth of trench #124, which correlated to trenches 124a-b in Fig. 23, exceeds the depth of active region #106 as seen from the figure. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs).
Regarding claim 11, Roucka’s modified device as per claim 9 teaches wherein the trench (from Roucka Fig. 23 trench #2324b) is separated from a top-contact of the first rectangular VCSEL or the second rectangular VCSEL (from Roucka Fig. 23 trench #2324b is separated from metal contact #2328 of top left or right VCSEL; metal contact is part of the VCSEL device, see paragraph [0088]. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs).
Regarding claim 12, Roucka’s modified device as per claim 1 teaches wherein the bridge (from Roucka Fig. 23 first portion of #2328) connecting the first rectangular VCSEL and the second rectangular VCSEL (from Roucka Fig. 23 first portion of #2328 connecting top left and right VCSEL, see annotated figure in claim 1. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) bends around a side of the blocking structure (from Roucka Fig. 23 first portion of #2328 bends around a first side of #2324b see figure below.).
PNG
media_image2.png
584
656
media_image2.png
Greyscale
Regarding claim 13, Roucka’s modified device as per claim 12 teaches wherein a second bridge (from Roucka Fig. 23 second portion of #2328) connecting the first rectangular VCSEL and the second rectangular VCSEL (from Roucka Fig. 23 second portion of #2328 connecting top left and right VCSEL, see annotated figure in claim 1. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) bends around a second side of the blocking structure different from the first side (from Roucka Fig. 23 second portion of #2328 bends around a second side of 2324b in an opposite direction from the first side, see figure below).
PNG
media_image3.png
603
597
media_image3.png
Greyscale
Regarding claim 14, Roucka’s modified device as per claim 1 teaches wherein the bridge connecting the first rectangular VCSEL and the second rectangular VCSEL (from Roucka Fig. 23 first portion of #2328 connects top left and right VCSELs. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) further connects a third neighboring VCSEL (from Roucka Fig. 23 first portion of #2328 connects VCSEL at the bottom left side).
Regarding claim 15, Roucka’s modified device as per claim 14 teaches wherein the bridge connecting the first rectangular VCSEL and the second rectangular VCSEL (from Roucka Fig. 23 first portion of #2328 connects top left and right VCSELs. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) further connects a fourth neighboring rectangular VCSEL (from Roucka Fig. 23 first portion of #2328 connects VCSEL at the bottom right side. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs).
Regarding claim 16, Roucka’s modified device as per claim 1 wherein the first rectangular VCSEL and the second rectangular VCSEL of the rectangular VCSEL array have a common top contact (from Roucka Fig, 23 top left and right VCSELs have metal contact #2328 in common on top of the surface; paragraph [0088] states “emitting VCSEL elements can be electrically connected together with a closed upon itself metal contact 2328 dimensioned around/along the periphery of the array”. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) and/or a common bottom contact.
Regarding claim 17, Roucka’s modified device as per claim 1 further comprising:
a third rectangular VCSEL having a third active area (from Roucka Fig. 23 aperture #2312b of bottom left VCSEL. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs);
- a second bridge (from Roucka Fig. 23 third portion of #2328, see annotated figure below) connecting the first rectangular VCSEL and the third rectangular VCSEL (from Roucka Fig. 23 third portion #2328 connects top left VCSEL with bottom left VCSEL. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs);
wherein the first active area of the first rectangular VCSEL (from Roucka Fig. 23 aperture #2312b of top left VCSEL. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) and the third active area of the third rectangular VCSEL (from Roucka Fig. 23 aperture #2312b of bottom left VCSEL. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) are arranged along a second crystal axis (from Roucka Fig. 23 aperture #2312b of top left VCSEL are arrange on second axis, see annotated figure below; which is considered as the second crystal axis as per Onishi’s teaching); and
- a second blocking structure arranged between the first rectangular VCSEL and the third rectangular VCSEL (from Roucka Fig. 23 structure #2324b located between top and bottom left VCSELs. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs).
PNG
media_image4.png
575
752
media_image4.png
Greyscale
Regarding claim 18, Roucka’s modified device as per claim 1 teaches the first active area of the first VCSEL (from Roucka Fig. 23 aperture #2312b of top left VCSEL) wherein the blocking structure (from Roucka Fig. 23 etch trenches #2324a-b) is provided on each side of the first active area (from Roucka Fig. 23 etch trenches #2324a-b are around the surface of aperture #2312b).
Regarding claim 19, Roucka modified device as per claim 1 teaches wherein the semiconductor device (from Roucka Fig. 23 VCSEL array #2300) comprises a plurality of rectangular VCSELs (from Roucka Fig. 23 VCSEL array #2300) arranged in rows and columns (from Roucka Fig. 23 VCSELs are arranged in rows and columns) on a rectangular grid (from Roucka Fig. 23 rectangular grid, see annotated figure below. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs) and wherein a separate blocking structure is provided between each pair of neighboring rectangular VCSELs on the grid (from Roucka Fig. 23 trenches #2324b is provided between each pair of neighboring VCSELs on the grid. Modified Rucka’s device in the view of Dummer would have rectangular VCSELs).
PNG
media_image5.png
566
509
media_image5.png
Greyscale
Regarding claim 20, Roucka teaches a method of fabricating a semiconductor device comprising an array of vertical cavity surface emitting lasers VCSELs (Fig. 23 VCSEL array #2300) having a pitch (annotated figure in claim 1 “pitch”), the method comprising the steps of:
- providing a semiconductor die (Fig. 3A #300 represent a step formation of each die the VCSEL array #2300 in Fig. 23, see paragraph [0087]) comprising a vertical layer stack adapted for fabrication of the VCSELs (Fig. 3A shows a vertical stacked layers for fabrication of VCSELs in Fig. 23);
- determining an axis of the semiconductor die in a direction parallel to a surface of the semiconductor die (Fig. 3A “first axis” is parallel to the surface of a semiconductor die, see annotated figure below; die in Fig. 3A is a semiconductor die, see paragraph [0092]) and perpendicular to the vertical layer stack (Fig. 3A “first axis” is perpendicular to the layer stack “z”) and perpendicular to the vertical layer stack (Fig. 3A “first axis” is perpendicular to the layer stack “z”); and
- processing the semiconductor die into a semiconductor device (paragraph [0092] describes the process of the die into a semiconductor device) comprising:
- a first VCSEL (Fig. 23 top left VCSEL) having a first active area with a first active area width less than 20 um (Fig. 23 aperture #2312b of top left VCSEL) with a first active area width less than 20 um ([0087] “each constituent VCSEL emitter each may have a diameter of about 10 μm”);
- a second VCSEL (Fig. 23 top right VCSEL) having a second active area with a second active area width less than 20 um ([0087] “each constituent VCSEL emitter each may have a diameter of about 10 μm”);
wherein the first active area of the first VCSEL and the second active area of the second VCSEL are arranged along the axis (Fig. 23 aperture #2312b of top left and right VCSEL are arranged along the axis, see annotated figure in below); and
- a blocking structure (Fig. 23 structure #2324b) arranged between the first VCSEL and the second VCSEL along the axis (Fig. 23 structure #2324b is arranged between top left and right VCSEL along “fist axis” see annotated figure below),
wherein a length of the blocking structure in a direction perpendicular to the first axis (Fig. 23 structure 2324b which length “W1” is perpendicular to the first axis as seen in the annotated figure in clam 1) is greater than the first active area width (annotated figure 23 in claim 1 “W1” is greater than “W2”, where W2 is the diameter of the VCSEL emitter and, wherein the pitch is not more than 30um (Annotated figure in claim 1 shows that the pitch is 30um; see [0087]).
PNG
media_image6.png
465
999
media_image6.png
Greyscale
Roucka fails to teach determining a crystal axis; first and second VCSEL being rectangular VCSELs; a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch.
However, Onishi teaches a VCSEL array (Fig. 8a laser array #302); a first active area (Fig. 8a light emission of top left laser) and a second active area (Fig. 8a light emission of top right laser); wherein the first active area of the first VCSEL and the second active area of the second VCSEL are arranged along a first crystal axis (Fig. 8a light emission of top left and right laser are arranged along “a” crystal axis).
It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device having a first crystal axis (e.g. having the “first axis” indicated in the annotated figure above to be the “first crystal axis”) as taught by Onishi because it would allow to control the polarization of the emitted light in a desired direction (from Onishi see paragraphs [0015]; [0016] and [0018]).
Roucka’s device modified above fails to teach first and second VCSEL being rectangular VCSELs.
However, Dummer teaches an array of rectangular VCSELs (Fig. 4 array of rectangular VCSEL’s 402). It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device in the view of Onishi having a rectangular active area as taught by Dummer because it would allow to provide improved efficiency and low voltage as compared to the same size round VCSEL (from Dummer paragraph [0062]).
Rucka’s modified device above also fails to teach a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch.
However, having a width of the blocking structure in a direction parallel to the first crystal axis is less than 20% of the pitch can be reach through routine optimization (from Rucka Fig. 4 already teaches a width of 10um parallel to the first axis less than 40% of the pitch), see 2144.05 II A. It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Rucka’s device in the view of Onoshi and Dummer because it would result in a compact array (from Roucka [0087] states that Fig. 23 is to reach compact arrays with closely-spaced VCSEL output apertures) which is the result of routine optimization, MPEP 2144.05 II B.
Claim(s) 3-4, 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Roucka (US Patent US-20210305782-A1) in the view of Onishi (US Patent US-20150124433-A1) and Dummer (US Patent US-20180301871-A1), as per claim 1 and 6, in further view of Seurin (US Patent US-20160072258-A1) hereinafter Seurin.
Regarding claim 3, Roucka’s modified device as per claim 1 teaches the semiconductor device in claim 2. Roucka’s modified device fails to teach wherein the pitch is not more than 20 mm or not more than 17.5 mm.
However, Seurin teaches an array of VCSELs (Figs. 8 shows an array of VECSELs with a pitch #823) wherein the pitch is not more than 20 mm or not more than 17.5 mm (paragraph [0087] states “emission window may be ˜2 μm and the array pitch may be as small as ˜3 μm”).
It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device in the view of Onishi with a pitch not more than 20 mm or not more than 17.5 mm as taught by Seurin because it would allow to increase the resolution of the device (from Seurin abstract “One aspect of the invention describes methods to construct densely and ultra-densely packed VCSEL arrays with to produce high resolution structured illumination pattern.”).
Regarding claim 4, Roucka’s modified device as per claim 1 teaches the semiconductor device in claim 2. Roucka’s modified device fails to teach wherein the pitch is not more than 15mm or not more than 10mm.
However, Seurin teaches an array of VCSELs (Figs. 8 shows an array of VECSELs with a pitch #823) wherein the pitch is not more than 15mm or not more than 10mm (paragraph [0087] states “emission window may be ˜2 μm and the array pitch may be as small as ˜3 μm”).
It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device in the view of Onishi with a pitch not more than 15mm or not more than 10mm as taught by Seurin because it would allow to increase the resolution of the device (from Seurin abstract “One aspect of the invention describes methods to construct densely and ultra-densely packed VCSEL arrays with to produce high resolution structured illumination pattern.”).
Regarding claim 8, Roucka’s modified device as per claim 1 teaches the semiconductor device in claim 6.
Roucka modified device fails to teach wherein the width of the blocking structure in the direction parallel to the first crystal axis is smaller than 10% of the VCSEL pitch or 5% of the VCSEL pitch.
However, having the width of the blocking structure in the direction parallel to the first crystal axis is smaller than 10% of the VCSEL pitch or 5% of the VCSEL pitch (from Roucka in the view of Onishi teaches width of the blocking structure in the direction parallel to the first crystal axis is smaller than 30% of the VCSEL pitch, see claim 6; from Seurin teaches smaller the pitch higher resolution, see abstract) can be reached through routine optimization, see MPEP 2144.05 II A. It would have been obvious to a person of ordinary skill in the art to prior to the effective filling date of the claimed invention to modify Roucka’s device in the view of Onishi with a blocking structure in the direction parallel to the first crystal axis is smaller than 10% of the VCSEL pitch or 5% of the VCSEL pitch because it would allow to increase the resolution of the device (from Seurin abstract “One aspect of the invention describes methods to construct densely and ultra-densely packed VCSEL arrays with to produce high resolution structured illumination pattern.”) and it would be the result of routine optimization, see MPEP 2144.05 II B.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee (US-20150222094-A1) teaches an array of VCSEL surrounded by blocking structures see Fig. 1.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDA ADRIANA CAMACHO ALANIS whose telephone number is (703)756-1545. The examiner can normally be reached Monday-Friday 7:30am-5:30pm Friday off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FERNANDA ADRIANA CAMACHO ALANIS/Examiner, Art Unit 2828 /MINSUN O HARVEY/Supervisory Patent Examiner, Art Unit 2828
Prosecution Insights