Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
1. Applicant's arguments have been fully considered but they are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Specifically, Applicant argues only that Khan et al. (US 10642702 B1) does not teach or described the amended claims. However, Khan is not being considered alone and Applicant has not considered He et al. (US 20240048398 A1).
Applicant merely states that he does not concede that Khan and He are properly combinable, but Applicant does not make arguments that they would be improper to combine.
Examiner, however, considers this combination as being an obvious to try combination as Khan provides a broader methodology to manage a plurality of master control planes, and it would be obvious then to try utilizations of these master control plans as described in He, as doing so would combine the performance benefits of both and therein improve efficiency.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claims 1-4, 6-12, and 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Khan et al. (US 10642702 B1) in view of He et al. (US 20240048398 A1)
Claim 1 Khan teaches an apparatus comprising:
a packet processing device comprising multiple processors, (Col. 1, Line 21, one or more processors) a data plane circuitry, (Col. 1, Line 36-37, data plane component) and an interface, (Col. 6, Lines 29-34, communication via an internal connection) wherein
a first processor of the multiple processors performing operations of a first control plane stored in a memory, (FIG. 1A, Control Plane Component 1)
a second processor of the multiple processors performing operations of a second control plane stored in a second memory, (FIG. 1A, Control Plane Component 1) and
the first and second control planes are to communicate through an interface, (Col. 6, Lines 29-34, wherein the control plane components are communicatively coupled through the internal connection)
However, Khan does not explicitly teach wherein the first control plane is to discover capabilities of data plane circuitry and configure operation of the data plane circuitry by the interface, and wherein the first control plane is to operate during operation of the second control plane for a time duration.
From a related technology, He teaches wherein the first control plane is to discover capabilities of data plane circuitry (FIG. 14, step 1402, ¶0178, receiving a supported function of the user plane, i.e. discovering a capability of the data plane) and configure operation of the data plane circuitry by the interface, (FIG. 14, step 1406, configuring the data plane) and wherein the first control plane is to operate during operation of the second control plane for a time duration. (¶0183, wherein the first control plane and second control plane are configured to operate at the same time as they communicate with one another)
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Khan to incorporate the teachings of He that provide a means for the control plane to configure the data plane in order to more effectively utilize network resources as intended by the user.
Claim 2 Khan in view of He teaches Claim 1, and further teaches, wherein the interface comprises a region in one or more of:
one or more registers or one or more memory devices. (Examiner interprets a “memory device” as being a device with a memory, Khan, FIG 1A, Col. 6, Lines 29-34, wherein the interface is comprised within the region of a memory device, i.e. the device with memory)
Claim 3 Khan in view of He teaches Claim 1, teaches wherein a second control plane is to configure the data plane circuitry (He, FIG. 14, ¶0180, wherein the control plane configures the user plane, i.e. the data plane circuitry) to perform operations related to one or more of: non-volatile memory express (NVMe) read or write operations, address translation, compression or decompression, encryption or decryption, configuration as a storage node, configuration as a tenant hosting node, or configuration as a compute node. (He, ¶0180, wherein configure to receive information comprises a storage node)
Claim 4 Khan in view of He teaches Claim 1, but does not explicitly teach wherein a second control plane is to configure the data plane circuitry to perform match-action operations. (He, FIG. 14, ¶0180, wherein the control plane configures the user plane, i.e. the data plane circuitry, Examiner interprets “match-action” operations as when actions match or are consistent, for example a charging action for a session to and/or from another user plane)
Claim 6 Khan in view of He teaches Claim 1, and further teaches wherein the first and second control planes are to communicate through an interface comprises the first control plane to communicate the second control plane one or more of:
reserve hardware resources, receive hardware events, (FIG. 1D, 114, Col. 10, Lines 54-67, communicating events related to control plane components, i.e. hardware events) or perform hardware register reads or writes for debugging.
Claim 7 Khan in view of He teaches Claim 1, and further teaches wherein the interface is to perform an access control list (ACL) to limit communications to the first control plane and to second control plane. (Khan, Col. 17, Lines 11-32, FIG. 4, step 420, wherein the control plane addressed stored in the caches comprise a list which limits communications to the control planes)
Claim 8 Khan in view of He teaches Claim 1, and further teaches wherein the packet processing device comprises one or more of: a network interface controller (NIC), a remote direct memory access (RDMA)-enabled NIC, SmartNIC, router, switch, forwarding element, infrastructure processing unit (IPU), or data processing unit (DPU). (Col. 4, Lines 44-53, FIG. 1A-1G, wherein the device may comprise a router or switch)
Claim 9 is taught by Khan in view of He as described for Claim 1.
Claim 10 is taught by Khan in view of He as described for Claim 2.
Claim 11 is taught by Khan in view of He as described for Claim 3.
Claim 12 is taught by Khan in view of He as described for Claim 4.
Claim 14 is taught by Khan in view of He as described for Claim 6.
Claim 15 is taught by Khan in view of He as described for Claim 7.
Claim 16 is taught by Khan in view of He as described for Claim 1.
Claim 17 is taught by Khan in view of He as described for Claim 1.
Claim 18 is taught by Khan in view of He as described for Claim 3.
Claim 19 is taught by Khan in view of He as described for Claim 4.
Claim 20 is taught by Khan in view of He as described for Claim 5.
3. Claims 5 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Khan et al. (US 10642702 B1) in view of He et al. (US 20240048398 A1) and in further view of Kumar et al. (US 20240048398 A1)
Claim 5 Khan in view of He teaches Claim 1, and further teaches wherein the first control plane is to configure the second control plane based on a configuration from a software defined networking (SDN) controller.
From a related technology, Kumar teaches a first control plane is to configure the second control plane based on a configuration from a software defined networking (SDN) controller. (¶0022, wherein the first control plane configures the second control plane for supporting SDN technology and configurations)
It would be obvious to one of ordinary skill in the art before the effective filing date of the claimed inventions to modify the teachings of Khan it incorporate the techniques used by Yu in order to more effectively utilize network resources.
Claim 13 is taught by Khan in view of He and Kumar as described for Claim 5.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER PALACA CADORNA whose telephone number is (571)270-0584. The examiner can normally be reached M-F 10:00-7:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, John Follansbee can be reached at (571) 272-3964. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTOPHER P CADORNA/Examiner, Art Unit 2444
/JOHN A FOLLANSBEE/Supervisory Patent Examiner, Art Unit 2444
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