Prosecution Insights
Last updated: April 19, 2026
Application No. 17/748,181

ESTIMATION OF DISTALLY-LOCATED MULTIPORT NETWORK PARAMETERS USING MULTIPLE TWO-WIRE PROXIMAL MEASUREMENTS

Non-Final OA §101§103
Filed
May 19, 2022
Examiner
EVANS, GEOFFREY T
Art Unit
2852
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Analog Devices International Unlimited Company
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
674 granted / 793 resolved
+17.0% vs TC avg
Moderate +9% lift
Without
With
+9.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
19 currently pending
Career history
812
Total Applications
across all art units

Statute-Specific Performance

§101
14.2%
-25.8% vs TC avg
§103
43.7%
+3.7% vs TC avg
§102
30.1%
-9.9% vs TC avg
§112
7.1%
-32.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 793 resolved cases

Office Action

§101 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of invention I in the reply filed on 1/16/26 is acknowledged. Claims 11-17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/16/26. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-10 and 18-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to the judicial exception of abstract ideas without significantly more. The claim(s) recite(s) abstract ideas as indicated by in-line comments below. This judicial exception is not integrated into a practical application for reasons also indicated by in-line comments below. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception for reasons also indicated by in-line comments below. 1. A method for estimating an impedance matrix of parasitic network disposed between a first network and a second network of a bio-impedance measurement system (does not integrate into a practical application because generally linking the use of the judicial exception to a particular technological environment or field of use; not significantly more because generally linking the use of the judicial exception to a particular technological environment or field of use), the method comprising: determining an impedance matrix for the first network (ZMUX) (abstract; mathematical concepts; mathematical calculations) based on an impedance matrix for the second network (ZLOAD) for at least one known load condition (abstract; mathematical concepts; mathematical relationships); fitting ZMUX values for ZLOAD for the at least one known load condition to estimate parameters of the impedance matrix of the intervening network (abstract; mathematical concepts; mathematical calculations). 2. The method of claim 1, wherein the each of first network, the second network and the intervening parasitic network is a multiport networks with at least two ports (merely further details of ineligible subject matter). 3. The method of claim 1, wherein the fitting is performed using a non-linear optimization algorithm (abstract; mathematical concepts; mathematical calculations). 4. The method of claim 2, where the optimization algorithm used is a Levenberg- Marquardt algorithm (abstract; mathematical concepts; mathematical calculations). 5. The method of claim 1, further comprising storing the estimated intervening network impedance matrix parameters (does not integrate into a practical application because insignificant extra-solution activity; not significantly more because insignificant extra-solution activity). 6. The method of claim 5, wherein the estimated intervening network impedance matrix parameters are stored in a flash memory device of the bio-impedance measurement system (does not integrate into a practical application because insignificant extra-solution activity; not significantly more because insignificant extra-solution activity). 7. The method of claim 5, further comprising: subsequent to the storing, determining the ZMUX for an unknown load (abstract; mathematical concepts; mathematical calculations); and estimating the ZLOAD for the unknown load using the stored estimated intervening network impedance matrix parameters and the determined ZMUX (abstract; mathematical concepts; mathematical calculations). 8. The method of claim 7, wherein the estimating the ZLOAD for the unknown load is performed using a Levenberg-Marquardt algorithm (abstract; mathematical concepts; mathematical calculations). 9. The method of claim 7, further comprising determining the bio-impedance and contact impedances from the estimated ZLOAD for the unknown load (abstract; mathematical concepts; mathematical calculations). 10. The method of claim 1, wherein the known load condition comprises a load condition selected from the group consisting of a short circuit, an open circuit, and twice an expected contract impedance of the bio-impedance measurement system (does not integrate into a practical application because generally linking the use of the judicial exception to a particular technological environment or field of use; not significantly more because generally linking the use of the judicial exception to a particular technological environment or field of use). Regarding claim 18, see the foregoing rejection of claim 1, for most limitations except as noted below. 18. Apparatus for estimating an impedance matrix of parasitic network disposed between a first network and a second network of a bio-impedance measurement system (see the foregoing rejection of claim 1), the apparatus comprising: circuitry (does not integrate into a practical application because generic computer performing generic computer functions; not significantly more because generic computer performing generic computer functions) for determining an impedance matrix for the first network (ZMUX) based on an impedance matrix for the second network (ZLOAD) for at least one known load condition (see the foregoing rejection of claim 1); circuitry (does not integrate into a practical application because generic computer performing generic computer functions; not significantly more because generic computer performing generic computer functions) for fitting ZMUX values for ZLOAD for the at least one known load condition to estimate parameters of the impedance matrix of the intervening network (see the foregoing rejection of claim 1); and a memory device for storing the estimated intervening network impedance matrix parameters (does not integrate into a practical application because insignificant extra-solution activity; not significantly more because insignificant extra-solution activity). Regarding claim 19, see the foregoing rejection of claim 7, for most limitations except as noted below. 19. The apparatus of claim 18, further comprising: circuitry (does not integrate into a practical application because generic computer performing generic computer functions; not significantly more because generic computer performing generic computer functions) for determining the ZMUX for an unknown load (see the foregoing rejection of claim 1); and circuitry (does not integrate into a practical application because generic computer performing generic computer functions; not significantly more because generic computer performing generic computer functions) for estimating the ZLOAD for the unknown load using the stored estimated intervening network impedance matrix parameters and the determined ZMUX (see the foregoing rejection of claim 1). Regarding claim 20, see the foregoing rejection of claim 7. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Note that, in the following rejections, the highlighting indicates differences from the exact claim language, or items involved in an obviousness argument. Claim(s) 1-2, 5-7, 9-10, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ganesan et al. (WO 2020/144328 A1) in view of Qu et al. (2018/0196101). Regarding claim 1, Ganesan et al. disclose a method for estimating an impedance matrix (impedances ZE1-ZE4; see paragraphs 26, 34, and 77) of parasitic network (contact impedances between the electrodes and the body; supra) disposed between a first network (circuitry 150; see paragraphs 27, 32) and a second network (unknown bio-impedance 102, which is of interest; see paragraph 24) of a bio-impedance measurement system (100; see paragraph 24), the method comprising: determining (see paragraphs 43-45) an impedance matrix for the first network (ZMUX) (impedance of 120; see paragraphs 33-35) based on an impedance matrix for the second network (ZLOAD) for at least one known load condition (calibration resistor; see paragraph 56); ... . Ganesan et al. do not disclose the highlighted limitations: fitting ZMUX values for ZLOAD for the at least one known load condition to estimate parameters of the impedance matrix of the intervening network. Qu et al. disclose using bridge analysis to estimate an unknown impedance given known impedances it forms a circuit with (see paragraphs 60-61). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art, to modify the invention of Ganesan et al. to include fitting ZMUX values for ZLOAD for the at least one known load condition to estimate parameters of the impedance matrix of the intervening network, similarly to the invention of Qu et al., for calibration of sensors to enable better accuracy (see paragraph 70). Regarding claim 2, this combination of references further teaches the method of claim 1, wherein the each of first network, the second network and the intervening parasitic network is a multiport networks with at least two ports (see paragraphs 77-78 of Ganesan et al.). Regarding claim 5, this combination of references does not meet the highlighted limitations: The method of claim 1, further comprising storing the estimated intervening network impedance matrix parameters. Ganesan et al. further disclose storing determined circuit parameters (see paragraph 89). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art, to further modify the combination to further comprise storing the estimated intervening network impedance matrix parameters, similarly to the invention of Ganesan et al., because such a modification would have combined prior art elements according to known methods to yield predictable results. KSR Int'l Co. v. Teleflex Inc., 550 U.S. at 416, 82 USPQ2d at 1395. Regarding claim 6, this combination of references further teaches the method of claim 5, wherein the estimated intervening network impedance matrix parameters are stored in a flash memory device of the bio-impedance measurement system (see Ganesan et al., paragraph 130). Regarding claim 7, this combination of references further teaches the method of claim 5, further comprising: subsequent to the storing, determining the ZMUX for an unknown load (102; see Ganesan et al., paragraphs 24, 56, and 77); and estimating the ZLOAD for the unknown load using the stored estimated intervening network impedance matrix parameters and the determined ZMUX (see Ganesan et al., paragraphs 24, 56, and 77). Regarding claim 9, this combination of references further teaches the method of claim 7, further comprising determining the bio-impedance and contact impedances from the estimated ZLOAD for the unknown load (see Ganesan et al., paragraphs 24, 27, 33-35, 56, and 77). Regarding claim 10, this combination of references further teaches the method of claim 1, wherein the known load condition comprises a load condition selected from the group consisting of a short circuit, an open circuit, and twice an expected contract impedance of the bio-impedance measurement system (see Ganesan et al., paragraph 83). Regarding claim 18, see the foregoing rejections of claim 1, for most limitations, and of claims 5-6 for the limitations associated with the memory device. Regarding claim 19, see the foregoing rejection of claim 7. Regarding claim 20, see the foregoing rejection of claim 10. Claim(s) 3, 4, and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ganesan et al. (WO 2020/144328 A1) in view of Qu et al. (2018/0196101), further in view of Patil et al. (2014/0142398). See the foregoing rejections of claims 1, 2, and 7 for limitations recited therein. Regarding claim 3, this combination of references does not meet the highlighted limitations: The method of claim 1, wherein the fitting is performed using a non-linear optimization algorithm. Patil et al. disclose solving for an unknown in circuit analysis by using a Levenberg-Marquardt algorithm (see paragraph 231). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art, to further modify the combination to include solving for the parameters of the impedance matrix by using a Levenberg-Marquardt algorithm, similarly to the invention of Patil et al., because such a modification would have combined prior art elements according to known methods to yield predictable results. KSR Int'l Co. v. Teleflex Inc., 550 U.S. at 416, 82 USPQ2d at 1395. This modification meets the highlighted limitations: wherein the fitting is performed using a non-linear optimization algorithm. Regarding claim 4, see the foregoing rejection of claim 3. Regarding claim 8, see the foregoing rejection of claim 3. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Medvedovsky et al. (2019/0269348) is cited for disclosing compensating for contact impedances in bioimpedance measurements (see paragraphs 28 and 37). Any inquiry concerning this communication or earlier communications from the examiner should be directed to GEOFFREY T EVANS whose telephone number is (571)272-2369. The examiner can normally be reached M-F, 9 AM - 5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Walter Lindsay can be reached at (571) 272-1674. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WALTER L LINDSAY JR/Supervisory Patent Examiner, Art Unit 2852 /GEOFFREY T EVANS/Examiner, Art Unit 2852
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Prosecution Timeline

May 19, 2022
Application Filed
Apr 03, 2026
Non-Final Rejection — §101, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+9.0%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 793 resolved cases by this examiner. Grant probability derived from career allow rate.

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