Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to claims filed on 03/17/2026.
Claims 1-28 were cancelled.
Claims 29-30, 33, 35, 38, 44-46, 48, 49, 51, 53-56 are amended.
Claims 29-56 are pending.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/1/2026 has been entered.
Response to Arguments for Claim Rejections - 35 USC § 103
Applicant’s arguments and amendments, see remarks Pages 12-14, filed 03/17/2026, with respect to 35 U.S.C 103 have been fully considered and are persuasive. The rejection of claims 29-56 has been withdrawn. However, upon further search and consideration a new ground of rejection necessitated by the claim amendments.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 29-33, 36-38, 40-44, 47-54 and 56 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Damian Silvio Steiger, NPL, “Software and Algorithms for Quantum Computing”, Published: 2018 (hereafter Steiger).
Regarding claim 29. Steiger teaches a method comprising:
obtaining an original quantum circuit, wherein the original quantum circuit manipulates a plurality of qubits over a plurality of cycles (Page 7, fig 2.1, high level, low level, instructions having a plurality of cycles) (Page 14, Fig 2.4, circuit) (Page 36, Fig 2.10, Back-ends) (Page 36, Sec 2.7.2, quantum circuits at the level of gates);
obtaining one or more auxiliary qubit indications indicating one or more unverified qubits within the plurality of qubits of the original quantum circuit (Page 22, Fig 2.7, having ancilla qubit) (Page 59, Fig 4.1, ancilla qubit in state, measured and reset to state);
generating a testing quantum circuit (Page 36, fig 2.10, after optimization), the testing quantum circuit comprising:
quantum circuit component that comprises all elements of the original quantum circuit (Page 36, fig 2.10, CNOT mapping);
the plurality of qubits (Page 36, fig 2.10, multiple qubits); and
testing components external to the original quantum circuit (inherently teaches in Page 36, fig 2.10, measure) (also inherently teaches in Page 23, Table 2.1, H, X), the testing components comprising:
one or more quantum state setters (Page 36, fig 2.10, |0>), configured to set one or more initial states to the plurality of qubits (Page 36, fig 2.10, |0>, H); and
one or more inspectors (Page 36, fig 2.10, measure);
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simulating, by a simulator, the testing quantum circuit (Page 36, sec 2.7.2, simulation of quantum circuits) (Page 38, Code, CNOT, simulator=eng.backend);
inspecting, by the one or more inspectors, states of the plurality of qubits from said simulating (Page 38, Code, print, simulator.get_probability) (Page 18, sec 2.5.1, Measure | qubit1); and
verifying, based on the inspecting, that the one or more unverified qubits comply with auxiliary property by determining whether the one or more initial states provided to the one or more unverified qubits remains unchanged at an output of the testing quantum circuit (Page 19, measurement of qubit1, into state 0 or 1) (Page 20, Par 2, perform a measurement on any qubits that are currently in a superposition state before those go out of scope) (Page 37, fir 2.11, measurement outcome).
Regarding claim 30. Steiger teaches the method of Claim 29,
wherein the testing quantum circuit further comprises one or more inverse quantum state setters (Page 31, Fig 2.8, Compute, Action, Uncompute) (Page 31, Code, Compute (eng): U | qureg, V | qureg, Uncompute (eng)),
wherein the one or more quantum state setters are operatively coupled to the plurality of qubits before being manipulated by the quantum circuit component (Page 40, Fig 2.13, state 0, A, B),
wherein the one or more inverse quantum state setters are operatively coupled to the plurality of qubits after being manipulated by the quantum circuit component (Page 31, Code, Compute (eng): U | qureg, V | qureg, Uncompute (eng)),
wherein the one or more inverse quantum state setters are configured to reverse the one or more initial states (Page 59, Fig 4.1, reset to state 0).
Regarding claim 31. Steiger teaches the method of Claim 30, wherein said inspecting comprises inspecting final states of the plurality of qubits that are outputted from the one or more inverse quantum state setters (Page 23, dagger) (Page 93, Fig 5.1, ancilla qubits) (Page 94, Code 5.1, dagger(eng)).
Regarding claim 32. Steiger teaches the method of Claim 30,
wherein an inverse setter of the one or more inverse quantum state setters is associated to a setter of the one or more quantum state setters (Page 93, Fig 5.1, inverse B),
wherein the inverse setter is configured to reverse an initial state set by the setter (Page 94, Code 5.1, compute(eng), uncompute (eng)).
Regarding claim 33. Steiger teaches the method of Claim 29,
wherein the testing quantum circuit comprises one or more additional qubits that are external to the original quantum circuit (Page 64, code 4.3, CNOT, ancilla),
wherein the plurality of qubits excludes the one or more additional qubits (Page 64, code 4.3, eng.allocate_qubit()) (Page 65, Code 4.4, eng.allocate_qubit(), for measurement).
Regarding claim 36. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters comprise a setter that is operatively coupled to one or more target qubits (Page 59, Fig 4.1, H, U),
wherein the one or more target qubits are manipulated by the testing quantum circuit (Page 59, Fig 4.1, QFT, R()),
wherein the setter is configured to set to each of the one or more target qubits one of: computational bases states, and highly-entangled states (Page 22, Fig 2.7, qubit a, superposition state, entangled with other qubits) (Page 59, Fig 4.1, |0>).
Regarding claim 37. Steiger teaches the method of Claim 36, wherein the one or more target qubits of the plurality of qubits comprise one or more dirty auxiliary qubits of the one or more unverified qubits, or one or more argument qubits of the plurality of qubits (Page 22, Fig 2.7, qubit a, superposition state, entangled with other qubits).
Regarding claim 38. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters comprise a loop setter that is operatively coupled to one or more target qubits (Page 28, loops and classical control instructions, Loop(eng, 10)),
wherein the one or more target qubits are manipulated by the testing quantum circuit (Page 57, Loop meta-instructions),
wherein the loop setter comprises a loop contraction between the one or more target qubits before and after being manipulated by the quantum circuit component or by an inverse quantum circuit (Page 53, LocalOptimizer).
Regarding claim 40. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters are configured to set proper states to expected input of the plurality of qubits and to clean auxiliary qubits of the one or more unverified qubits (Page 22, Par 1, ancilla qubit stats in state 0, returned to 0),
wherein the proper states comprise known states for the clean auxiliary qubits and expected states for the expected input (Page 22, par 2, cases where the qubits q0, q1, q2, are in state 111).
Regarding claim 41. Steiger teaches the method of Claim 29,
wherein the simulator is one of: a state vector simulator, a density matrix simulator, a tensor network simulator, and a quantum simulator (Page 36, sec 2.7.2, high performance quantum simulator, high performance density matrix simulator) (Page 32, Par 2, All (also called tensor)) (Page 39, standard state vector simulator).
Regarding claim 42. Steiger teaches the method of Claim 29, wherein said inspecting is performed by one or more inspectors of the testing quantum circuit based on at least one of: measurements and a reduced density matrix (Page 37, Measurement outcomes, with respective probabilities) (Page 38, code, get_probability).
Regarding claim 43. Steiger teaches the method of Claim 29, wherein said inspecting is performed by a contraction of a tensor network, wherein the tensor network implements the testing quantum circuit (Page 32, Par 3, ALL, called Tensor, All(Measure), Equivalent).
Regarding claim 44. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters are configured to set highly-entangled states to dirty auxiliary qubits of the one or more unverified qubits and to argument qubits of the plurality of qubits (Page 64, code 4.3, CNOT | (quint[-1], ancilla), Control (eng, ancilla)),
wherein said simulating comprises simulating the testing quantum circuit using a state vector simulator (Page 39, Sec 2.7.3, using standard state vector simulator),
wherein the testing quantum circuit comprises an inverse circuit subsequently to the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute),
wherein the inverse circuit is an inverse of the quantum circuit, wherein said inspecting comprises inspecting final states of the one or more unverified qubits that are outputted from said simulating using reduced density-matrices (Page 50, Code 3.1, Compute(eng), Uncompute(eng)).
Regarding claim 47. Steiger teaches the method of Claim 29, comprising iteratively performing said generating, said simulating and said inspecting, until a confidence threshold is complied with (Page 58, sec 4.3, iterative phase estimations, with j iterations determines the phase with accuracy and with an error probability).
Regarding claim 48. Steiger teaches the method of Claim 29, comprising performing said generating once, and performing said inspecting multiple times, until a confidence threshold of final states is complied with (Page 61, Code 4.2, multiple measurements to estimate phase).
Regarding claim 49. Steiger teaches the method of Claim 29, wherein the testing quantum circuit comprises an inverse circuit subsequently to the quantum circuit component, wherein the inverse circuit is an inverse of the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute) (Page 50, Code 3.1, compute, uncompute).
Regarding claim 50. Steiger teaches the method of Claim 29, comprising determining whether the one or more unverified qubits comply with the auxiliary property based on said inspecting (Page 37, fig 2.1, entangle operation corresponds to applying a Hadamard gate to the first qubit, followed by CNOT gates on all other qubits).
Regarding claim 51. Steiger teaches the method of Claim 29, further comprising compiling an executable quantum circuit based on said verifying (Page 64, code 4.3, modular adder),
wherein said compiling comprises utilizing the one or more unverified qubits as auxiliary qubits in case that said verifying indicates that the one or more unverified qubits comply with the auxiliary property (Page 64, code 4.3, ancilla qubits are allocated, Control (eng, ancilla)).
Regarding claim 52. Steiger teaches the method of Claim 29, wherein the auxiliary property is complied with by the unverified qubit if, for each proper initial state of the plurality of qubits, the unverified qubit is outputted from the quantum circuit in its initial state (Page 65, code 4.4, eng.flush()) (Page 19, eng.flush(), entire circuit has passed through all compiler engines and is executed by the back-end, before accessing a measurement).
Regarding claim 53. Steiger teaches an apparatus comprising a processor and coupled memory, said processor being adapted to:
obtain an original quantum circuit (Page 7, fig 2.1, high level, low level, instructions having a plurality of cycles),
wherein the original quantum circuit manipulates a plurality of qubits over a plurality of cycles (Page 14, Fig 2.4, circuit) (Page 36, Fig 2.10, Back-ends) (Page 36, Sec 2.7.2, quantum circuits at the level of gates);
obtain one or more auxiliary qubit indications indicating one or more unverified qubits within the plurality of qubits of the quantum circuit (Page 22, Fig 2.7, having ancilla qubit) (Page 59, Fig 4.1, ancilla qubit in state, measured and reset to state);
generate a testing quantum circuit (Page 36, fig 2.10, after optimization), the testing quantum circuit comprising:
a quantum circuit component that comprises all elements of the original quantum circuit (Page 36, fig 2.10, CNOT mapping);
the plurality of qubits (Page 36, fig 2.10, multiple qubits); and
testing components external to the original quantum circuit (Page 36, fig 2.10, measure) (Page 23, Table 2.1, H, X), the testing components comprising:
one or more quantum state setters (Page 36, fig 2.10, |0>), wherein the one or more quantum state setters are configured to set one or more initial states to the plurality of qubits (Page 36, fig 2.10, |0>, H); and
one or more inspectors (Page 36, fig 2.10, measure);
simulate, by a simulator, the testing quantum circuit (Page 36, sec 2.7.2, simulation of quantum circuits) (Page 38, Code, CNOT, simulator=eng.backend);
inspect, by the one or more inspectors, states of the plurality of qubits from said simulation (Page 38, Code, print, simulator.get_probability) (Page 18, sec 2.5.1, Measure | qubit1); and
verify, based on the inspecting, that the one or more unverified qubits comply with an auxiliary property by determining whether the one or more initial states provided to the one or more unverified qubits remains unchanged at an output of the testing quantum circuit (Page 19, measurement of qubit1, into state 0 or 1) (Page 20, Par 2, perform a measurement on any qubits that are currently in a superposition state before those go out of scope) (Page 37, fir 2.11, measurement outcome).
Regarding claim 54. Steiger teaches the apparatus of Claim 53,
wherein the testing quantum circuit further comprises one or more inverse quantum state setters (Page 31, Fig 2.8, Compute, Action, Uncompute) (Page 31, Code, Compute (eng): U | qureg, V | qureg, Uncompute (eng)),
wherein the one or more quantum state setters are operatively coupled to the plurality of qubits before being manipulated by the quantum circuit (Page 40, Fig 2.13, state 0, A, B,),
wherein the one or more inverse quantum state setters are operatively coupled to the plurality of qubits after being manipulated by the quantum circuit component (Page 31, Code, Compute (eng): U | qureg, V | qureg, Uncompute (eng)),
wherein the one or more inverse quantum state setters are configured to reverse the one or more initial states (Page 59, Fig 4.1, reset to state 0).
Regarding claim 56. Steiger teaches a computer program product comprising a non-transitory computer readable medium retaining program instructions, which program instructions when read by a processor (Page 10, sec 2.3, classical host computer, software stack running on the host computer), cause the processor to:
obtain an original quantum circuit (Page 7, fig 2.1, high level, low level, instructions having a plurality of cycles), wherein the quantum circuit manipulates a plurality of qubits over a plurality of cycles (Page 14, Fig 2.4, circuit) (Page 36, Fig 2.10, Back-ends) (Page 36, Sec 2.7.2, quantum circuits at the level of gates);
obtain one or more auxiliary qubit indications indicating one or more unverified qubits within the plurality of qubits of the quantum circuit (Page 22, Fig 2.7, having ancilla qubit) (Page 59, Fig 4.1, ancilla qubit in state, measured and reset to state);
generate a testing quantum circuit (Page 36, fig 2.10, after optimization), the testing quantum circuit comprises:
a quantum circuit component(Page 36, fig 2.10, CNOT mapping);
the plurality of qubits (Page 36, fig 2.10, multiple qubits); and
testing components external to the original quantum circuit (Page 36, fig 2.10, measure) (Page 23, Table 2.1, H, X), the testing components comprising:
one or more quantum state setters (Page 36, fig 2.10, |0>), wherein the one or more quantum state setters are configured to set one or more initial states to the plurality of qubits (Page 36, fig 2.10, |0>, H); and
one or more inspectors (Page 36, fig 2.10, measure);
simulate, by a simulator, the testing quantum circuit (Page 36, sec 2.7.2, simulation of quantum circuits) (Page 38, Code, CNOT, simulator=eng.backend);
inspect, by the one or more inspectors, states of the plurality of qubits from said simulation (Page 38, Code, print, simulator.get_probability) (Page 18, sec 2.5.1, Measure | qubit1); and
verify, based on the inspecting, that the one or more unverified qubits comply with an the auxiliary property by determining whether the one or more initial states provided to the one or more unverified qubits remains unchanged at an output of the testing quantum circuit (Page 19, measurement of qubit1, into state 0 or 1) (Page 20, Par 2, perform a measurement on any qubits that are currently in a superposition state before those go out of scope) (Page 37, fir 2.11, measurement outcome).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 34, 35, 39 and 45 are rejected under 35 U.S.C. 103 as being unpatentable over Damian Silvio Steiger, NPL, “Software and Algorithms for Quantum Computing”, Published: 2018 (hereafter Steiger), in views of Janusz JACAK, US 2023/0205490 A1, (hereafter JACAK).
Regarding claim 34. Steiger teaches the method of Claim 33,
wherein the one or more quantum state setters comprise a setter that is operatively coupled to one or more target qubits (Page 59, Fig 4.1, H, U),
wherein the one or more target qubits are manipulated by the testing quantum circuit (Page 59, Fig 4.1, QFT, R()),
wherein the qubit pairs comprise disjoint pairs of a first target qubit and a second target qubit of the one or more target qubits (Page 44, sec 3.1, Disjoint pairs of neighboring qubits can execute operations in parallel) (Page 79, Par 1, Subspaces into A and B are such that the states in these subspaces are encoded in disjoint sets of qubits),
wherein the first target qubit is comprised by the plurality of qubits and the second target qubit is comprised by the one or more additional qubits (Page 59, Fig 4.1, state qubits, and ancilla) (Page 40, fig 2.13, quantum circuit, phi, A, B).
Steiger does not teach wherein the setter is configured to set maximally-entangled states to qubit pairs.
JACAK teaches wherein the setter is configured to set maximally-entangled states to qubit pairs, (Par 93, maximally entangles 2 qubit bell states).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of JACAK to solve for maximally entangles states because enables private quantum random number generation, thus allowing an external party to freely and publicly verify the randomness of the generated sequence (JACAK, abstract).
Regarding claim 35. Steiger teaches the method of Claim 33,
wherein the qubit pairs comprise disjoint pairs of a first target, qubit and a second target qubit (Page 44, sec 3.1, Disjoint pairs of neighboring qubits can execute operations in parallel) (Page 79, Par 1, Subspaces into A and B are such that the states in these subspaces are encoded in disjoint sets of qubits),
wherein the first target qubit is comprised by the plurality of qubits and the second target qubit is comprised by the one or more additional qubits (Page 59, Fig 4.1, state qubits, and ancilla) (Page 40, fig 2.13, quantum circuit, phi, A, B),
wherein the first target qubit comprises a dirty auxiliary qubit of the one or more unverified qubits or an argument qubit of the plurality of qubits (Page 21, Dirty qubits, dirty ancilla qubits),
wherein the testing quantum circuit comprises an inverse circuit subsequently to the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute),
wherein the inverse circuit is an inverse of the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute) (Page 50, Code 3.1, compute, uncompute),
wherein said simulating comprises simulating the testing quantum circuit using a quantum simulator (Page 36, Sec 2.7.2, high performance quantum simulator), and
wherein said inspecting comprises performing measurements of the states of the unverified qubits after being manipulated by the quantum circuit component and by the inverse circuit (Page 50, Code 3.1, Compute(eng), Uncompute(eng)).
Steiger does not teach wherein the one or more quantum state setters are configured to set maximally-entangled states to qubit pairs.
JACAK teaches wherein the one or more quantum state setters are configured to set maximally-entangled states to qubit pairs, (Par 93, maximally entangles 2 qubit bell states).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of JACAK to solve for maximally entangles states because enables private quantum random number generation, thus allowing an external party to freely and publicly verify the randomness of the generated sequence (JACAK, abstract).
Regarding claim 39. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters comprise a setter that is operatively coupled to one or more target qubits (Page 59, Fig 4.1, H, U),
wherein the one or more target qubits are manipulated by the testing quantum circuit (Page 59, Fig 4.1, QFT, R()),
Steiger does not teach wherein the setter is configured to set maximally-mixed states to each of the one or more target qubits.
JACAK teaches wherein the setter is configured to set maximally-mixed states to each of the one or more target qubits, (Par 93, maximally entangles 2 qubit bell states).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of JACAK to solve for maximally entangles states because enables private quantum random number generation, thus allowing an external party to freely and publicly verify the randomness of the generated sequence (JACAK, abstract).
Regarding claim 45. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters are configured to set highly-entangled states to dirty auxiliary qubits of the one or more unverified qubits (Page 56, CNOT | (psi, b1)),
wherein said simulating comprises simulating the testing quantum circuit using a density matrix simulator (Page 36, sec 2.7.2, high performance quantum simulator, high performance density matrix simulator) (Page 37, Measurement outcomes, with respective probabilities) (Page 38, code, get_probability),
wherein said inspecting comprises inspecting final states of the one or more unverified qubits that are outputted from said simulating using reduced density-matrices (Page 50, Code 3.1, Compute(eng), Uncompute(eng)).
Steiger does not teach wherein the one or more quantum state setters are configured to set maximally-mixed states to argument qubits of the plurality of qubits.
JACAK teaches wherein the one or more quantum state setters are configured to set maximally-mixed states to argument qubits of the plurality of qubits, (Par 93, maximally entangles 2 qubit bell states).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of JACAK to solve for maximally entangles states because enables private quantum random number generation, thus allowing an external party to freely and publicly verify the randomness of the generated sequence (JACAK, abstract).
Claims 46 and 55 are rejected under 35 U.S.C. 103 as being unpatentable over Damian Silvio Steiger, NPL, “Software and Algorithms for Quantum Computing”, Published: 2018 (hereafter Steiger), in views of Pednault et al. US 2019/0095561 A1 (hereafter Pednault).
Regarding claim 46. Steiger teaches the method of Claim 29,
wherein the one or more quantum state setters comprise one or more loop contractions between dirty auxiliary qubits of the one or more unverified qubits before and after being manipulated by the quantum circuit component (Page 53, LocalOptimizer) (Page 36, fig 2.10, after optimization),
wherein the one or more quantum state setters comprise one or more loop contractions between argument qubits of the plurality of qubits before and after being manipulated (Page 28, loops and classical control instructions, Loop(eng, 10)),
wherein said simulating comprises simulating the testing quantum circuit using a tensor network simulator (Page 39, Sec 2.7.3, using standard state vector simulator),
wherein the testing quantum circuit comprises an inverse circuit subsequently to the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute),
wherein the inverse circuit is an inverse of the quantum circuit component (Page 50, Code 3.1, Compute(eng), Uncompute(eng)),
wherein the testing quantum circuit comprises a tensor network (Page 32, All(measure) | qureg, tensor(measure) is equivalent),
Steiger does not teach wherein said inspecting comprises contracting the tensor network and verifying that it contracts to a value of
2
A
R
G
+
2
∙
A
U
X
, wherein ARG is a number of the argument qubits and AUX is a number of the dirty auxiliary qubits.
Pednault wherein said inspecting comprises contracting the tensor network and verifying that it contracts to a value of
2
A
R
G
+
2
∙
A
U
X
(Pednault, Fig 8B, complex adds 2n+4 bytes of memory), wherein ARG is a number of the argument qubits and AUX is a number of the dirty auxiliary qubits (Pednault, Par 54, 7x7 array of qubits, 49 possible states, for a 8 byte floating point, qubit state information).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of Pednault to contract to a value of bytes of memory because it allow simulation of sub-circuit independently using an entangled tensor index (Pednault, abstract) and compare the actual outputs of a quantum computing device to the ideal (Pednault, Par 3).
Regarding claim 55. Steiger teaches the apparatus of Claim 53,
wherein the one or more quantum state setters comprise one or more loop contractions between dirty auxiliary qubits of the one or more unverified qubits before and after being manipulated by the quantum circuit component (Page 53, LocalOptimizer) (Page 36, fig 2.10, after optimization),
wherein the one or more quantum state setters comprise one or more loop contractions between argument qubits of the plurality of qubits before and after being manipulated (Page 28, loops and classical control instructions, Loop(eng, 10)),
wherein said simulating comprises simulating the testing quantum circuit using a tensor network simulator (Page 39, Sec 2.7.3, using standard state vector simulator),
wherein the testing quantum circuit comprises an inverse circuit subsequently to the quantum circuit component (Page 31, fig 2.8, compute, action, uncompute),
wherein the inverse circuit is an inverse of the quantum circuit component (Page 50, Code 3.1, Compute(eng), Uncompute(eng)),
wherein the testing quantum circuit comprises a tensor network (Page 32, All(measure) | qureg, tensor(measure) is equivalent),
Steiger does not teach wherein said inspecting comprises contracting the tensor network and verifying that it contracts to a value of
2
A
R
G
+
2
∙
A
U
X
, wherein ARG is a number of the argument qubits and AUX is a number of the dirty auxiliary qubits.
Pednault wherein said inspecting comprises contracting the tensor network and verifying that it contracts to a value of
2
A
R
G
+
2
∙
A
U
X
(Pednault, Fig 8B, complex adds 2n+4 bytes of memory), wherein ARG is a number of the argument qubits and AUX is a number of the dirty auxiliary qubits (Pednault, Par 54, 7x7 array of qubits, 49 possible states, for a 8 byte floating point, qubit state information).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Steiger to incorporate the teachings of Pednault to contract to a value of bytes of memory because it allow simulation of sub-circuit independently using an entangled tensor index (Pednault, abstract) and compare the actual outputs of a quantum computing device to the ideal (Pednault, Par 3).
Conclusion
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/A.C./ Examiner, Art Unit 2189
/REHANA PERVEEN/ Supervisory Patent Examiner, Art Unit 2189