DETAILED ACTION
Claims 1 through 17 originally filed 13 June 2022. By amendment received 30 December 2025; claims 1 and 3 through 17 are amended. By amendment received 8 June 2026 and entered 7 July 2026; claims 1 and 14 through 16 are amended. Claims 1 through 17 are addressed by this action.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 8 June 2026 has been entered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments have been fully considered; they are addressed below.
Applicant argues that the cited prior art does not teach or render obvious the amended features of the claims. This argument is persuasive and all prior art rejections are withdrawn. However, upon further search and consideration, Jayaraman (US Patent 5,985,686) has been located which, in combination with the previously cited art, renders obvious that which is now claimed. As such, new rejections have been formulated as set forth below.
As such, all claims are addressed as follows:
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1 through 5, 7, 9, 11 through 14, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Babic et al. (Babic, US Patent 5,977,604) in view of Jayaraman (US Patent 5,985,686).
Regarding claim 1, Babic discloses, "A first substrate" (col. 7, lines 41-54 and Fig. 5B, pt. 16). "[The first substrate] includes a semiconductor layer" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 44, 66, and 76). "[The semiconductor layer] including an active layer; and a first distributed Bragg reflector (DBR) layer" (col. 7, lines 41-54 and Fig. 5B, pts. 44 and 66). "A second substrate that includes a constriction layer and a second DBR layer" (col. 7, lines 20-40, col. 8, lines 41-44, and Fig. 5H, pts. 10, 60, and 82). "Wherein the constriction layer is in contact with the second DBR layer in the second substrate" (col. 7, lines 37-40 and 61-65 and Fig. 5H, pts. 60, 74, and 78). "The constriction layer includes: a constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 74, 78, and 80, where undercut region 78 and isolating layer 80 form the constriction region). "An injection region between a first portion of the constriction region and a second portion of the constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 78, 80, and 82, where etch mesa 82 forms the injection region that is between portions of the constriction region created by isolating layer 80 and undercut area 78). "The injection region has a conductivity higher than that of the constriction region" (col. 8, lines 41-44 and Fig. 5H, pts. 78, 80, and 82). "The second substrate is in contact with the first substrate" (col. 8, lines 9-12 and Fig. 5G, pts. 10, 16, 76, and 82). "The constriction layer is adjacent to the semiconductor layer" (col. 8, lines 9-12 and Fig. 5H, pts. 76 and 78). Babic does not explicitly disclose, "An outer peripheral region on an outer periphery of the constriction region." "The outer peripheral region including a same material as that of the injection region." Jayaraman discloses, "An outer peripheral region on an outer periphery of the constriction region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). "The outer peripheral region including a same material as that of the injection region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Babic with the teachings of Jayaraman. In view of the teachings of Babic regarding a VCSEL, the additional inclusion peripheral areas surrounding the confining structure as well as the alternate construction of the VCSEL as an array as taught by Jayaraman would enhance the teachings of Babic by providing additional support and attachment area for the attached structure as well as by allowing the production of higher output power than available to a single emission device.
Regarding claim 2, Babic discloses, "Wherein the constriction region and the injection region have a refractive index difference" (col. 7-8, lines 39-40 and 67-3 and Fig. 5H, pts. 78, 80, and 82, where these materials each have different refractive indices).
Regarding claim 3, Babic discloses, "Wherein the constriction region has a ring shape that surrounds the injection region" (col. 8, lines 45-47 and Fig. 5J, pt. 82).
Regarding claim 4, Babic discloses, "Wherein the constriction region is a gap in the constriction layer" (col. 7-8, lines 67-1 and Fig. 5I, pt. 78).
Regarding claim 5, Babic discloses, "Wherein the injection region includes a conductive material" (col. 7, lines 39-40 and Fig. 5I, pts. 74 and 82). "The constriction region includes a material obtained by application of non-conductive treatment to the conductive material" (col. 7-8 and lines 66-3 and Fig. 5I, pts. 74, 80, and 82).
Regarding claim 7, Babic discloses, "Wherein the first substrate further includes a first base material" (col. 7, lines 41-54 and Fig. 5B, pt. 16). "The semiconductor layer is on the first DBR layer" (col. 7, lines 41-54 and Fig. 5B, pts. 66 and 76). "The first DBR layer is on the first base material" (col. 7, lines 41-54 and Fig. 5B, pts. 16 and 66). "The first base material includes GaAs" (col. 4, lines 6-8 and Fig. 5B, pt. 16). "Formation of the semiconductor layer and the first DBR layer on the first base material is based on crystal growth on the first base material" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 66, and 76). "Formation of the constriction layer and the second DBR layer is based on crystal growth on a second base material" (col. 7, lines 30-39 and Fig. 5A, pts. 10, 60, and 74). "[The second base material] including GaAs" (col. 7, lines 32-33 and Fig. 5A, pt. 10).
Regarding claim 9, Babic discloses, "Wherein the first substrate further includes a first base material" (col. 7, lines 41-54 and Fig. 5B, pt. 16). "The semiconductor layer is on the first DBR layer" (col. 7, lines 41-54 and Fig. 5B, pts. 66 and 76). "The first DBR layer is on the first base material" (col. 7, lines 41-54 and Fig. 5B, pts. 16 and 66). "Formation of the semiconductor layer and the first DBR layer on the first base material is based on crystal growth on the first base material" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 66, and 76). "Formation of the constriction layer and the second DBR layer is based on crystal growth on a second base material" (col. 7, lines 30-39 and Fig. 5A, pts. 10, 60, and 74). "[The second base material] including InP" (col. 3, lines 52-55 and Fig. 5A, pt. 10).
The combination of Babic and Jayaraman does not explicitly disclose, "The first base material includes GaAs." It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the first substrate of GaAs so as to allow growth of a reflector within a GaAs based material system, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 11, Babic discloses, "Wherein the first DBR layer is one of a first semiconductor DBR or a first dielectric DBR" (col. 7, lines 46-47 and Fig. 5I, pt. 66). "The second DBR layer is one of a second semiconductor DBR or a second dielectric DBR" (col. 7, lines 36-37 and Fig. 5I, pt. 60).
Regarding claim 12, Babic discloses, "Wherein the vertical cavity surface emitting laser element is configured to emit a laser beam from a side of the second DBR layer" (col. 7, lines 18-22 and Fig. 5I, pt. 10).
Regarding claim 13, Babic discloses, "Wherein the vertical cavity surface emitting laser element is configured to emit a laser beam from a side of the first DBR layer" (col. 7, lines 18-22 and Fig. 5I, pt. 72).
Regarding claim 14, Babic discloses, "[The first substrate] includes a semiconductor layer" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 44, 66, and 76). "[The semiconductor layer] including an active layer and a first distributed Bragg reflector (DBR) layer" (col. 7, lines 41-54 and Fig. 5B, pts. 44 and 66). "A second substrate that includes a constriction layer and a second DBR layer" (col. 7, lines 20-40, col. 8, lines 41-44, and Fig. 5H, pts. 10, 60, and 82). "Wherein the constriction layer is in contact with the second DBR layer in the second substrate" (col. 7, lines 37-40 and 61-65 and Fig. 5H, pts. 60, 74, and 78). "The constriction layer includes a constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 74, 78, and 80, where undercut region 78 and isolating layer 80 form the constriction region). "An injection region between a first portion of the constriction region and a second portion of the constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 78, 80, and 82, where etch mesa 82 forms the injection region that is between portions of the constriction region created by isolating layer 80 and undercut area 78). "The injection region has a conductivity higher than that of the constriction region" (col. 8, lines 41-44 and Fig. 5H, pts. 78, 80, and 82). "The second substrate is in contact with the first substrate" (col. 8, lines 9-12 and Fig. 5G, pts. 10, 16, 76, and 82). "The constriction layer is adjacent to the semiconductor layer" (col. 8, lines 9-12 and Fig. 5H, pts. 76 and 78). Babic does not explicitly disclose, "A plurality of arranged vertical cavity surface emitting laser elements." "Wherein each vertical cavity surface emitting laser element of the plurality of arranged vertical cavity surface emitting laser elements includes a first substrate." "An outer peripheral region on an outer periphery of the constriction region." "The outer peripheral region including a same material as that of the injection region." Jayaraman discloses, "A plurality of arranged vertical cavity surface emitting laser elements" (col. 4, lines 62-68 and Fig. 2). "Wherein each vertical cavity surface emitting laser element of the plurality of arranged vertical cavity surface emitting laser elements includes a first substrate" (col. 4, lines 62-68, col. 6, lines 56-59, and Figs. 2 and 6, pt. 58). "An outer peripheral region on an outer periphery of the constriction region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). "The outer peripheral region including a same material as that of the injection region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Babic with the teachings of Jayaraman for the reasons provided above regarding claim 1.
Regarding claim 16, Babic discloses, "Forming a first substrate" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 44, 66, and 76). "[The first substrate] includes a semiconductor layer" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 44, 66, and 76). "[The semiconductor layer] including an active layer and a first distributed Bragg reflector (DBR) layer" (col. 7, lines 41-54 and Fig. 5B, pts. 44 and 66). "Forming a second substrate that includes a constriction layer and a second DBR layer" (col. 7, lines 20-40, col. 8, lines 41-44, and Fig. 5H, pts. 10, 60, and 82). "Wherein the constriction layer is in contact with the second DBR layer in the second substrate" (col. 7, lines 37-40 and 61-65 and Fig. 5H, pts. 60, 74, and 78). "The constriction layer includes a constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 74, 78, and 80, where undercut region 78 and isolating layer 80 form the constriction region). "An injection region between a first portion of the constriction region and a second portion of the constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 78, 80, and 82, where etch mesa 82 forms the injection region that is between portions of the constriction region created by isolating layer 80 and undercut area 78). "An outer peripheral region on an outer periphery of the constriction region" (col. 8, lines 41-44 and Fig. 5H, pts. 78, 80, and 82). "Bonding the first substrate and the second substrate" (col. 8, lines 9-12 and Fig. 5G, pts. 10, 16, 76, and 82). "Wherein the constriction layer is adjacent to the semiconductor layer" (col. 8, lines 9-12 and Fig. 5H, pts. 76 and 78). Babic does not explicitly disclose, "The outer peripheral region including a same material as that of the injection region." "The injection region has a conductivity higher than that of the constriction region." Jayaraman discloses, "The outer peripheral region including a same material as that of the injection region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). "The injection region has a conductivity higher than that of the constriction region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Babic with the teachings of Jayaraman for the reasons provided above regarding claim 1.
Regarding claim 17, Babic discloses, "Wherein the forming of the second substrate further includes forming the constriction region and the injection region using photolithography" (col. 7, lines 55-65 and Figs. 5C and 5D, pts. 28, 74, and 78).
Claims 6, 8, 10, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Babic, in view of Jayaraman, and further in view of Chirovsky et al. (Chirovsky, US Patent 6,169,756).
Regarding claim 6, The combination of Babic and Jayaraman does not explicitly disclose, "Wherein the injection region includes GaAs." "The constriction region includes a GaAs fluoride." Chirovsky discloses, "Wherein the injection region includes GaAs" (col. 7, lines 1-7 and Fig. pts. 18.2 and 18.6). "The constriction region includes a GaAs fluoride" (col. 7, lines 1-7 and Fig. pt. 18.3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Babic and Jayaraman with the teachings of Chirovsky. In view of the teachings of Babic regarding a VCSEL device including a current constriction region, the alternate construction of the constriction region as a fluoride doped GaAs region, the alternate material selections for the active region, and the additional inclusion of a circuit to which the device is mounted as taught by Chirovsky would enhance the teachings of Babic and Jayaraman by allowing the constriction region to be provided with a flat bonding region, the production of alternate emission wavelengths, and the ability to attach the device to a larger system.
Regarding claim 8, The combination of Babic and Jayaraman does not explicitly disclose, "Wherein the active layer has a quantum well structure in which a barrier layer and a quantum well layer are in an alternate arrangement." "The barrier layer includes GaAs." "The quantum well layer includes InGaAs." Chirovsky discloses, "Wherein the active layer has a quantum well structure in which a barrier layer and a quantum well layer are in an alternate arrangement" (col. 5, lines 20-25). "The barrier layer includes GaAs" (col. 5, lines 40-47). "The quantum well layer includes InGaAs" (col. 5, lines 40-47). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Babic and Jayaraman with the teachings of Chirovsky for the reasons provided above regarding claim 6.
Regarding claim 10, Babic does not explicitly disclose, "The quantum well layer includes one of InGaAs, InGaAsP, or AlGaInAs." Jayaraman discloses, "The quantum well layer includes one of InGaAs, InGaAsP, or AlGaInAs" (col. 7, lines 5-9). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Babic with the teachings of Jayaraman for the reasons provided above regarding claim 1.
The combination of Babic and Jayaraman does not explicitly disclose, "Wherein the active layer has a quantum well structure in which a barrier layer and a quantum well layer are in an alternate arrangement." "The barrier layer includes InP." Chirovsky discloses, "Wherein the active layer has a quantum well structure in which a barrier layer and a quantum well layer are in an alternate arrangement" (col. 5, lines 20-25). "The barrier layer includes InP" (col. 5, lines 40-47). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Babic and Jayaraman with the teachings of Chirovsky for the reasons provided above regarding claim 6.
Regarding claim 15, Babic discloses, "A vertical cavity surface emitting laser element mountable on the circuit substrate" (Fig. 5I). "Wherein the vertical cavity surface emitting laser element includes a first substrate" (col. 7, lines 41-54 and Fig. 5B, pt. 16). "[The first substrate] includes a semiconductor layer" (col. 7, lines 41-54 and Fig. 5B, pts. 16, 44, 66, and 76). "[The semiconductor layer] including an active layer and a first distributed Bragg reflector (DBR) layer" (col. 7, lines 41-54 and Fig. 5B, pts. 44 and 66). "A second substrate that includes a constriction layer and a second DBR layer" (col. 7, lines 20-40, col. 8, lines 41-44, and Fig. 5H, pts. 10, 60, and 82). "Wherein the constriction layer is in contact with the second DBR layer in the second substrate" (col. 7, lines 37-40 and 61-65 and Fig. 5H, pts. 60, 74, and 78). "The constriction layer includes a constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 74, 78, and 80, where undercut region 78 and isolating layer 80 form the constriction region). "An injection region between a first portion of the constriction region and a second portion of the constriction region" (col. 8, lines 41-44 and Fig. 5I, pts. 78, 80, and 82, where etch mesa 82 forms the injection region that is between portions of the constriction region created by isolating layer 80 and undercut area 78). "The injection region has a conductivity higher than that of the constriction region" (col. 8, lines 41-44 and Fig. 5H, pts. 78, 80, and 82). "The second substrate is in contact with the first substrate" (col. 8, lines 9-12 and Fig. 5G, pts. 10, 16, 76, and 82). "The constriction layer is adjacent to the semiconductor layer" (col. 8, lines 9-12 and Fig. 5H, pts. 76 and 78). Babic does not explicitly disclose, "An outer peripheral region on an outer periphery of the constriction region." "The outer peripheral region including a same material as that of the injection region." Jayaraman discloses, "An outer peripheral region on an outer periphery of the constriction region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). "The outer peripheral region including a same material as that of the injection region" (col. 7, lines 50-54 and Fig. 6, pts. 64 and 70, where the region of 64 outside of annulus 70 corresponds to the outer peripheral region). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Babic with the teachings of Jayaraman for the reasons provided above regarding claim 1.
The combination of Babic and Jayaraman does not explicitly disclose, "A circuit substrate." Chirovsky discloses, "A circuit substrate" (col. 5, lines 48-55). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Babic and Jayaraman with the teachings of Chirovsky for the reasons provided above regarding claim 6.
Conclusion
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/SEAN P HAGAN/Examiner, Art Unit 2828
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