Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Arguments
Applicant’s arguments filed 01/28/2026 have been fully considered but they are not persuasive.
The applicant argues that An et al. does not disclose a bottom-gate bottom contact structure as amended in claims 1. The examiner respectfully disagrees. An et al. (figures 2-7I) discloses a display panel as claimed including a gate electrode disposed on the substrate, wherein the protruding structure is further configured as the gate electrode of the thin film transistor (03); a gate insulating layer (04) covering the first surface, the first side wall, and the second side wall of the protruding structure; and an active layer (05) covering one side of the gate insulating layer away from the substrate and extending to cover the gate insulating layer on the first side wall and the second side wall of the protruding structure. The examiner merely relies on Zhou et al. (figures 1-7) for the teaching of wherein the source and drain electrode layer (504a and 504b) is disposed between the gate insulating layer (105) and the active layer (503). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify layers as taught by Zhou et al. in order to shorten the processing time and improve the production efficiency. The applicant should note that although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In addition, the test for obviousness is not whether the features of the reference may be bodily incorporated into the other to produce the claimed subject matter but simply what the references make obvious to one of the ordinary skill in the art. In re Bozek, 163 USPQ 545, (CCPA 1969); In re Richman, 165 USPQ 509, (CCPA 1970); In re Beckum, 169 USPQ 47, (CCPA 1971); In re Sneed, 710 F.2d 1544, 218 USPQ 385.
The applicant argues that An et al. does not disclose a bottom-gate bottom contact structure as amended in claims 13. The examiner respectfully disagrees. An et al. (figures 2-7I) discloses a display panel as claimed including a protruding structure (05) disposed on the substrate, wherein the protruding structure comprises a first surface on one side away from the substrate, and a first side wall and a second side wall respectively extending to the substrate from two opposite ends of the first surface (figure 7I); and a source and drain electrode layer (06 and 07) disposed on the protruding structure, wherein the source and drain electrode layer comprises a source electrode and a drain electrode spaced apart from each other, and both the source electrode and the drain electrode extend from one of the first side wall and the second side wall to another of the first side wall and the second side wall through the first surface (figures 2 and 7I); an active layer (05) disposed on the substrate, wherein the protruding structure is further configured the active layer of the thin film transistor. The examiner merely relies on Zhou et al. (figures 1-7) for the teaching of wherein the source and drain electrode layer (504a and 504b) is disposed between the gate insulating layer (105) and the active layer (503). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify layers as taught by Zhou et al. in order to shorten the processing time and improve the production efficiency. The applicant should note that although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In addition, the test for obviousness is not whether the features of the reference may be bodily incorporated into the other to produce the claimed subject matter but simply what the references make obvious to one of the ordinary skill in the art. In re Bozek, 163 USPQ 545, (CCPA 1969); In re Richman, 165 USPQ 509, (CCPA 1970); In re Beckum, 169 USPQ 47, (CCPA 1971); In re Sneed, 710 F.2d 1544, 218 USPQ 385.
The claim language therefore does not patentably distinguish over the applied reference[s], and the previous rejections are maintained.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 13, 16, 18 are rejected under 35 U.S.C. 103 as being unpatentable over An et al. (CN 106024909) in view of Zhou et al. (US 2021/0074735).
Regarding claim 1, An et al. (figures 2-7I) discloses a display panel with narrow bezels, having a display area and a non-display area surrounding the display area and comprising:
a substrate (see at least abstract); and
at least one thin film transistor (see at least claim 13) disposed on the substrate and in the non-display area;
wherein the at least one thin film transistor comprises:
a protruding structure (03) disposed on the substrate, wherein the protruding structure comprises a first surface on one side away from the substrate, and a first side wall and a second side wall respectively extending to the substrate from two opposite ends of the first surface (figure 7I); and
a source and drain electrode layer (06 and 07) disposed on the protruding structure, wherein the source and drain electrode layer comprises a source electrode and a drain electrode spaced apart from each other, and both the source electrode and the drain electrode extend from one of the first side wall and the second side wall to another of the first side wall and the second side wall through the first surface (figures 2 and 7I);
a gate electrode disposed on the substrate, wherein the protruding structure is further configured as the gate electrode of the thin film transistor (03);
a gate insulating layer (04) covering the first surface, the first side wall, and the second side wall of the protruding structure; and
an active layer (05) covering one side of the gate insulating layer away from the substrate and extending to cover the gate insulating layer on the first side wall and the second side wall of the protruding structure.
An et al. discloses the limitations as shown in the rejection of claim 1 above. However, An et al. is silent regarding wherein the source and drain electrode layer is disposed between the gate insulating layer and the active layer. Zhou et al. (figures 1-7) teaches wherein the source and drain electrode layer (504a and 504b) is disposed between the gate insulating layer (105) and the active layer (503). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify layers as taught by Zhou et al. in order to shorten the processing time and improve the production efficiency.
Regarding claim 13, An et al. (figures 2-7I) discloses a display panel with narrow bezels, having a display area and a non-display area surrounding the display area and comprising:
a substrate (see at least abstract); and
at least one thin film transistor (see at least claim 13) disposed on the substrate and in the non-display area;
wherein the at least one thin film transistor comprises:
a protruding structure (05) disposed on the substrate, wherein the protruding structure comprises a first surface on one side away from the substrate, and a first side wall and a second side wall respectively extending to the substrate from two opposite ends of the first surface (figure 7I); and
a source and drain electrode layer (06 and 07) disposed on the protruding structure, wherein the source and drain electrode layer comprises a source electrode and a drain electrode spaced apart from each other, and both the source electrode and the drain electrode extend from one of the first side wall and the second side wall to another of the first side wall and the second side wall through the first surface (figures 2 and 7I);
an active layer (05) disposed on the substrate, wherein the protruding structure is further configured the active layer of the thin film transistor.
An et al. discloses the limitations as shown in the rejection of claim 13 above. However, An et al. is silent regarding the source and drain electrode layer disposed on one side of the active layer away from the substrate; a gate insulating layer covering one side of the source and drain electrode layer away from the substrate and extending to cover the source and drain electrode layer on the first side wall and the second side wall of the protruding structure; and a gate electrode covering one side of the gate insulating layer away from the substrate and extending to cover the gate insulating layer on the first side wall and the second side wall of the protruding structure. Zhou et al. (figures 1-7) teaches the source and drain electrode layer disposed on one side of the active layer away from the substrate; a gate insulating layer covering one side of the source and drain electrode layer away from the substrate and extending to cover the source and drain electrode layer on the first side wall and the second side wall of the protruding structure; and a gate electrode covering one side of the gate insulating layer away from the substrate and extending to cover the gate insulating layer on the first side wall and the second side wall of the protruding structure (105, 503, 504a and 504b). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify layers as taught by Zhou et al. in order to shorten the processing time and improve the production efficiency.
Regarding claim 16, An et al. (figures 2-7I) discloses a black matrix layer disposed on the substrate (see step S606; figure 7C; the gate electrode is made from Cu, MoAlMo, or Mo); wherein a material of the black matrix layer is same as a material of the protruding structure, and the protruding structure protrudes from a surface of the black matrix layer away from the substrate.
Regarding claim 18, An et al. (figures 2-7I) discloses wherein a material of the black matrix layer comprises one of a black photosensitive resin or an opaque metal.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable An et al. in view of Zhou et al.; further in view of Oh et al. (US 2016/0336419).
Regarding claim 2, Powell discloses the limitations as shown in the rejection of claim 1 above. However, Powell is silent regarding wherein a height of the protruding structure is less than 3 µm. Oh et al. (figures 9A-10) teaches wherein a height of the protruding structure is less than 3 µm (see at least paragraph 0056). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode as taught by Oh et al. in order to prevent or reduce disconnection of an active layer caused at the time of the crystallization the active layer by changing the position of a gate electrode and/or adjusting the gradient of the gate electrode.
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (The prior art taught carbon monoxide concentrations of “about 1-5%” while the claim was limited to “more than 5%.” The court held that “about 1-5%” allowed for concentrations slightly above 5% thus the ranges overlapped.). Similarly, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of “having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium” as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium.). See MPEP § 2144.05.
Claims 3-7, 9, 11-12, 14-15, 19, 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over An et al. in view of Zhou et al.; further in view of Sugawara et al. (US 2020/0006396).
Regarding claim 3, An et al. discloses the limitations as shown in the rejection of claim 1 above. However, An et al. is silent regarding wherein in a cross-section perpendicular to the substrate, a shape of the protruding structure is trapezoidal. Sugawara et al. (figure 3D) discloses wherein in a cross-section perpendicular to the substrate, a shape of the protruding structure is trapezoidal. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the gate electrode as taught by Sugawara et al. in order to increase the channel mobility of an oxide semiconductor TFT while keeping the off current low and achieve an oxide semiconductor TFT with which it is possible to improve the ON characteristic (e.g., the channel mobility) while suppressing a decrease in the OFF characteristic.
Regarding claim 4, An et al. discloses the limitations as shown in the rejection of claim 3 above. However, An et al. is silent regarding the included angles. Sugawara et al. (figure 3D) discloses wherein in the cross-section perpendicular to the substrate, an included angle between the first side wall of the protruding structure and a bottom side of the protruding structure adjacent to the substrate ranges from 300 to 600, which is close to applicant's claimed range. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize utilizing a value close to applicant's claimed range, since it has been held that where the general condition of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. Further, it has been held that a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap by are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (The prior art taught carbon monoxide concentrations of “about 1-5%” while the claim was limited to “more than 5%.” The court held that “about 1-5%” allowed for concentrations slightly above 5% thus the ranges overlapped.). Similarly, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of “having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium” as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium.). See MPEP § 2144.05.
Regarding claim 5, Sugawara et al. (figure 3D) discloses wherein in the cross-section perpendicular to the substrate, an included angle between the second side wall of the protruding structure and the bottom side of the protruding structure adjacent to the substrate ranges from 300 to 600 .
Regarding claim 6, Sugawara et al. (figure 3D) discloses wherein in the cross-section perpendicular to the substrate, the included angles between the first side wall of the protruding structure and the bottom side of the protruding structure adjacent to the substrate and between the second side wall of the protruding structure and the bottom side of the protruding structure adjacent to the substrate are equal.
Regarding claim 7, Sugawara et al. (figure 3D) discloses wherein materials of the source electrode and the drain electrode comprise one or more of molybdenum, aluminum, copper, nickel, chromium, indium zinc oxide, or indium tin oxide (see at least paragraph 0065).
Regarding claim 9, Sugawara et al. (figure 3D) discloses wherein the source and drain electrode layer is disposed on one side of the active layer away from the substrate.
Regarding claim 11, Sugawara et al. (figure 3D) discloses wherein a material of the gate electrode comprises one or more of molybdenum, aluminum, copper, nickel, chromium, indium zinc oxide, or indium tin oxide (see at least paragraph 0058).
Regarding claim 12, Sugawara et al. (figure 3D) discloses wherein a material of the gate insulating layer comprises one or more of silicon oxide, silicon nitride, or aluminum oxide (see at least paragraph 0059).
Regarding claim 14, An et al. discloses the limitations as shown in the rejection of claim 13 above. However, An et al. is silent regarding wherein a material of the gate electrode comprises one or more of molybdenum, aluminum, copper, nickel, chromium, indium zinc oxide, or indium tin oxide. Sugawara et al. (figure 3D) discloses wherein a material of the gate electrode comprises one or more of molybdenum, aluminum, copper, nickel, chromium, indium zinc oxide, or indium tin oxide (see at least paragraph 0058). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode as taught by Sugawara et al. in order to increase the channel mobility of an oxide semiconductor TFT while keeping the off current low and achieve an oxide semiconductor TFT with which it is possible to improve the ON characteristic (e.g., the channel mobility) while suppressing a decrease in the OFF characteristic.
Regarding claim 15, Sugawara et al. (figure 3D) discloses wherein a material of the gate insulating layer comprises one or more of silicon oxide, silicon nitride, or aluminum oxide (see at least paragraph 0059).
Regarding claim 19, Sugawara et al. (figure 3D) discloses wherein the source electrode is a strip-shaped source electrode, the drain electrode is a strip-shaped drain electrode, and the drain electrode and the source electrode are parallel to each other (figure 2).
Regarding claim 21, An et al. discloses the limitations as shown in the rejection of claim 13 above. However, An et al. is silent regarding wherein in a cross-section perpendicular to the substrate, a shape of the protruding structure is trapezoidal. Sugawara et al. (figure 3D) discloses wherein in a cross-section perpendicular to the substrate, a shape of the protruding structure is trapezoidal. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the gate electrode as taught by Sugawara et al. in order to increase the channel mobility of an oxide semiconductor TFT while keeping the off current low and achieve an oxide semiconductor TFT with which it is possible to improve the ON characteristic (e.g., the channel mobility) while suppressing a decrease in the OFF characteristic.
Regarding claim 7, Sugawara et al. (figure 3D) discloses wherein materials of the source electrode and the drain electrode comprise one or more of molybdenum, aluminum, copper, nickel, chromium, indium zinc oxide, or indium tin oxide (see at least paragraph 0065).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable An et al. in view of Zhou et al.; further in view of Lee et al. (US 2018/0011357).
Regarding claim 20, An et al. discloses the limitations as shown in the rejection of claim 1 above. However, An et al. is silent regarding a U-shaped electrode. Lee et al. (figures 1-3) teaches wherein the source electrode is a U-shaped source electrode and has a first source electrode branch and a second source electrode branch being parallel to each other and spaced apart, and a third source electrode branch connected the first source electrode branch and the second source electrode branch; and the drain electrode is a strip-shaped drain electrode, and the drain electrode is parallel to the first source electrode branch and is located between the first source electrode branch and the second source electrode branch. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode as taught by Lee et al. in order to achieve a thin-film transistor (TFT) having an improved charging rate.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable An et al. in view of Zhou et al.; further in view of Oh et al. (US 2016/0336419).
Regarding claim 21, An et al. discloses the limitations as shown in the rejection of claim 13 above. However, An et al. is silent regarding wherein a height of the protruding structure is less than 3 µm. Oh et al. (figures 9A-10) teaches wherein a height of the protruding structure is less than 3 µm (see at least paragraph 0056). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode as taught by Oh et al. in order to prevent or reduce disconnection of an active layer caused at the time of the crystallization the active layer by changing the position of a gate electrode and/or adjusting the gradient of the gate electrode.
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (The prior art taught carbon monoxide concentrations of “about 1-5%” while the claim was limited to “more than 5%.” The court held that “about 1-5%” allowed for concentrations slightly above 5% thus the ranges overlapped.). Similarly, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of “having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium” as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium.). See MPEP § 2144.05.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAUREN NGUYEN whose telephone number is (571)270-1428. The examiner can normally be reached on Monday - Thursday, 8:00 AM -6:00 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Carruth, can be reached at 571-272-9791. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAUREN NGUYEN/Primary Examiner, Art Unit 2871