Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 6, 2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the fourth paragraph of 35 U.S.C. 112:
a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 15 and 35 are rejected under 35 U.S.C. 112, fourth paragraph, because it fails to further limit the claim(s) the depend from. In the instant case, it is well known that alpha phase tantalum exists only in body-centered cubic crystal structure.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3,5,10,14-16,27,28,30,35 is/are rejected under 35 U.S.C. 103 as being unpatentable over Morohashi, S, et al., ‘Fabrication of a Tantalum-Based Josephson Junction for an X-Ray Detector’, Japanese Journal of Applied Physics, Vol. 39, Part 1, No. 6A, pp. 3371-3377, a reference cited by Applicant; URADE, Y. et al., "Microwave characterization of tantalum superconducting resonators silicon substrate with niobium buffer layer", APL Materials, 12, (2024), a reference cited by Applicant; and Solano et al (PG Pub 2011/0253906 A1).
Regarding claim 1, Morohashi teaches a device for forming a superconducting radiation detector (fig. 7), comprising: a substrate (Si substrate, fig. 7) having a first surface; and a patterned layer adjacent the substrate and comprising tantalum in an alpha phase (bcc tantalum, pp. 3375, right column), wherein the patterned layer forms at least a part of a structure.
Morohashi does not teach the tantalum to be in an alpha phase. Morohashi teaches the tantalum to be a body-center (bcc) tantalum (pp. 3375, right column). It is well known that body-center tantalum is in an alpha phase (Urade: Introduction, left column).
Morohashi does not teach the device is for forming a qubit or the patterned layer is for storing a quantum state.
In the same field of endeavor, Solano teaches a radiation detector comprising qubits for carrying out radiation detection (abstract).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make the superconducting radiation detector to comprise a superconducting qubit for the benefit of carrying out radiation detection.
Furthermore, it would have been obvious to the skilled in the art before the effective filing date of the invention to make the patterned layer for storing a quantum state, for the known benefit of maintaining the detected radiation signal for readout.
Regarding claim 2, Morohashi teaches the device of claim 1, wherein the patterned layer forms at least a portion of a circuit component (fig. 7) comprising the tantalum in the alpha phase.
Regarding claim 3, Morohashi teaches the device of claim 2, wherein the circuit component comprises one or more of a capacitor, an inductor, or a Josephson junction (abstract).
Regarding claim 5, Morohashi in view of Solano teaches the device of claim 1, wherein the structure comprises one or more of a qubit (abstract in Solano), a transmon qubit, a X monan Xmon qubit, a three-dimensional transmon qubit, a fluxionium qubit, or a zero-pi qubit.
Regarding claim 10, Morohashi teaches the device of claim 1, wherein the substrate comprises one or more of sapphire or silicon (fig. 7).
Regarding claim 14, Morohashi in view of Solano teaches the device of claim 1, wherein the patterned layer forms a plurality of superconducting qubits (abstract or Morohashi and abstract of Solano).
Regarding claim 15, Morohashi teaches the device of claim 1, wherein the tantalum in the alpha phase comprises tantalum having a body-centered cubic crystal structure (Urade: Introduction, left column; Morohashi: pp.3375, right column).
Regarding claim 16, Morohashi in view of Urade and Solano teaches (see claim 1) the method for producing a superconducting qubit, comprising: providing a substrate having a first surface; and forming a patterned layer adjacent the substrate and comprising tantalum in an alpha phase, wherein the patterned layer forms at least a part of a structure for storing a quantum state.
Regarding claim 27, Morohashi teaches the method of claim 16, wherein forming the patterned layer comprises forming at least a portion of a circuit component comprising the tantalum in the alpha phase (fig. 7).
Regarding claim 28, Morohashi teaches the method of claim 27, wherein the circuit component comprises one or more of a capacitor, an inductor, or a Josephson junction (abstract).
Regarding claim 30, Solano teaches the method of claim 16, wherein the structure comprises one or more of a qubit (abstract), a transmon qubit, a X mon an Xmon qubit, a three-dimensional transmon qubit, a fluxionium qubit, or a zero-pi qubit.
Regarding claim 35, Morohashi teaches the method of claim 16, wherein the tantalum in the alpha phase comprises tantalum having a body-centered cubic crystal structure (Urade: Introduction, left column; Morohashi: pp.3375, right column).
Claim(s) 4,6,7,29,31,32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Morohashi, S, et al., ‘Fabrication of a Tantalum-Based Josephson Junction for an X-Ray Detector’, Japanese Journal of Applied Physics, Vol. 39, Part 1, No. 6A, pp. 3371-3377, a reference cited by Applicant; URADE, Y. et al., "Microwave characterization of tantalum superconducting resonators silicon substrate with niobium buffer layer", APL Materials, 12, (2024), a reference cited by Applicant; and Solano et al (PG Pub 2011/0253906 A1); as applied to claims 1 and 16 above, and further in view of Versluis et al (PG Pub 2021/0279134 A1).
Regarding claim 4, the previous combination remains as applied in claim 1.
The previous combination does not teach the patterned layer forms one or more electrical circuit components configured to store the quantum state based on enabling non-harmonic energy levels for forming qubit states.
In the same field of endeavor, Versluis teaches one or more electrical circuit components (fig. 14A) configured to store the quantum state based on enabling non-harmonic energy levels (paragraph [0017]) for forming qubit states, for the benefit of enabling two energy states to be used as qubit states (paragraph [0017]).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make the patterned layer to form one or more electrical circuit components configured to store the quantum state based on enabling non-harmonic energy levels for forming qubit states, for the benefit of enabling two energy states to be used as qubit states.
Regarding claims 6 and 7, Brink does not teach the one or more additional layers comprise a Josephson junction.
Versluis teaches one or more additional layers (split Josephson junction, fig. 14A, paragraph [0017]) that form one or more electric components (split Josephson junction, paragraph [0017]) wherein the patterned layer and the one or more additional layers form an electrical circuit configured to form energy levels for storing the quantum state (paragraph [0017]), for the benefit of enabling two energy states to be used as qubit states (paragraph [0017]).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to include one or more additional layers that form one or more electric components, wherein the patterned layer and the one or more additional layers form an electrical circuit configured to form energy levels for storing the quantum state, for the benefit of enabling two energy states to be used as qubit states (paragraph [0017]) by including a split Josephson junction.
Regarding claim 7, Versluis teaches the device of claim 6, wherein the one or more additional layers comprise a Josephson junction (split Josephson junction, paragraph [0017]).
Regarding claim 29, Brink in view of Versluis (see claim 3) teaches the method of claim 16, wherein forming the patterned layer comprising forming one or more electrical circuit components configured to cause the quantum state to be stored based on enabling non-harmonic energy levels for forming qubit states.
Regarding claim 31, Brink in view of Versluis (see claim 6) teaches the method of claim 16, further comprising forming one or more additional layers that form one or more electric components, wherein the patterned layer and the one or more additional layers form an electrical circuit configured to form energy levels for storing the quantum state.
Regarding claim 32, Versluis teaches the method of claim 31, wherein the one or more additional layers comprise a Josephson junction (split Josephson junction, paragraph [0017]).
Claim(s) 8,9,33,34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Morohashi, S, et al., ‘Fabrication of a Tantalum-Based Josephson Junction for an X-Ray Detector’, Japanese Journal of Applied Physics, Vol. 39, Part 1, No. 6A, pp. 3371-3377, a reference cited by Applicant; URADE, Y. et al., "Microwave characterization of tantalum superconducting resonators silicon substrate with niobium buffer layer", APL Materials, 12, (2024), a reference cited by Applicant; and Solano et al (PG Pub 2011/0253906 A1); as applied to claims 1 and 16 above, and further in view of Jeffrey et al (US Patent 10,720,563 B1).
Regarding claims 8 and 33, the previous combination remains as applied in claims 1 and 16.
The previous combination does not teach a relaxation time of the quantum state comprises one or more of at least 150 µs, at least 200 µs, or at least 300 µs.
In the same field of endeavor, Jeffrey teaches increasing the relaxation time increases the quality of the qubit (column 2, lines 46-61).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a relaxation time of the quantum state to comprise one or more of at least 150 µs, at least 200 µs, or at least 300 µs, for the benefit of increasing the quality of the qubit.
Regarding claims 9 and 34, the previous combination remains as applied in claims 1 and 16.
The previous combination does not teach a relaxation time of the quantum state is in a range of one or more of 150 µs to 317 µs or 200 µs to 317 µs.
In the same field of endeavor, Jeffrey teaches the relaxation time is based on fault tolerance of the quantum computations (column 2, lines 46-61).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to optimize the relaxation time of the quantum state to be in a range of one or more of 150 µs to 317 µs or 200 µs to 317 µs, for examples, according to the fault tolerance of the quantum computations in a specific use.
Claim(s) 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Morohashi, S, et al., ‘Fabrication of a Tantalum-Based Josephson Junction for an X-Ray Detector’, Japanese Journal of Applied Physics, Vol. 39, Part 1, No. 6A, pp. 3371-3377, a reference cited by Applicant; URADE, Y. et al., "Microwave characterization of tantalum superconducting resonators silicon substrate with niobium buffer layer", APL Materials, 12, (2024), a reference cited by Applicant; and Solano et al (PG Pub 2011/0253906 A1); as applied to claim 1 above, and further in view of Brink (PG Pub 2018/0358538 A1); and Lisenfeld, J. et al., ‘Electric field spectroscopy of material defects in transmon qubits’, arXiv:1909.09749, (2019).
Top of Form
Regarding claim 11, the previous combination remains as applied in claim 1.
The previous combination does not teach the device of claim 1, wherein the first surface contains at least one of. less than 6 atomic percent carbon as measured by X-ray photoelectron spectroscopy (XPS) or less than 0.1 atomic percent zinc as measured by X-ray photoelectron spectroscopy (XPS).
In the same field of endeavor, Brink teaches to form the elements (above substrate 108, fig. 9) on the first surface (of substrate 108) in a vacuum environment. Brink teaches in such vacuum environment any element other than the materials to be deposited is removed (paragraph [0003]), for the known benefit of reducing contaminants (fig. 1 of Lisenfeld) that limit device coherence (pp. 1, left column of Lisenfeld).
Thus, it would have been obvious to make the first surface contains least one of: less than 6 atomic percent carbon as measured by any method, including X-ray photoelectron spectroscopy (XPS) or less than 0.1 atomic percent zinc as measured by any method, including X-ray photoelectron spectroscopy (XPS), for the known benefit of reducing contaminants that limit device coherence.
Regarding claim 12, the previous combination does not teach the device of claim 1, wherein the first surface has an average roughness less than 0.1 nm as measured by atomic force microscopy.
Brink teaches to make the surface of the substrate smooth to achieve uniformity of material deposited (paragraph [0003]).
Lisenfeld teaches substrate surface damage (fig. 1) limits device coherence (pp. 1, left column of Lisenfeld).
Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make the first surface to have an average roughness less than 0.1 nm as measured by atomic force microscopy, for the benefit of achieving uniformity of material deposited and increasing device coherence.
Allowable Subject Matter
Claim 13 and 26 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Prior art does not teach
“the structure is free of niobium” (claims 13 and 26).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-36 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FEIFEI YEUNG LOPEZ whose telephone number is (571)270-1882. The examiner can normally be reached M-F: 8am to 4pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FEIFEI YEUNG LOPEZ/Primary Examiner, Art Unit 2899