Prosecution Insights
Last updated: July 17, 2026
Application No. 17/778,555

ELECTRONICS CIRCUIT BOARD DESIGN TOOL

Final Rejection §103
Filed
May 20, 2022
Priority
Nov 22, 2019 — AU 2019904417 +1 more
Examiner
DOSHER, JULIE GRACE
Art Unit
3715
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Slim Circuits Pty Ltd.
OA Round
2 (Final)
35%
Grant Probability
At Risk
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants only 35% of cases
35%
Career Allowance Rate
6 granted / 17 resolved
-34.7% vs TC avg
Strong +79% interview lift
Without
With
+78.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
23 currently pending
Career history
44
Total Applications
across all art units

Statute-Specific Performance

§101
5.1%
-34.9% vs TC avg
§103
88.8%
+48.8% vs TC avg
§112
6.1%
-33.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 17 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments The previous objection to claim 7 is withdrawn in light of the amendments to the claims (filed 02/26/2026). Applicant’s arguments with respect to the rejection(s) of claims 1, 2, 4-6, 8, and 10 under 35 U.S.C. § 102 (Remarks, filed 02/26/2026, pp. 5-7) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, as necessitated by amendments, a new ground(s) of rejection is made in view of the previously cited art Oda under 35 U.S.C. § 103. See rejection of claims as presented in detail below. Regarding the previous citation of Oda with regards to claim 7, Applicant argues “Oda does not cure the deficiencies of amended claim 1. In particular, Oda indicates component locations but does not indicate how to connect the components to form a predefined electronic circuit” (Remarks, filed 02/26/2026, p. 7). Examiner respectfully disagrees. Amended claim 1 merely recites, inter alia, “indicia indicative of a type or position of electrical components to be connected with the electronics prototyping breadboard through corresponding ones of the guide apertures to form the predefined electronic circuit.” Examiner directs Applicant’s attention to figures 1-3 and page 2 of Oda’s specification, which teaches indicia which indicates the proper position of various electrical components, which are connected through specified guide apertures to form predefined electronic circuits. See rejection of claim 1 in detail below. Furthermore, this limitation is directed to non-functional printed matter, the content of which cannot distinguish the claimed product from the prior art. See MPEP § 2112.01-III. Applicant’s arguments with respect to the rejection of the remaining claims under 35 U.S.C. § 103 (Remarks, field 02/26/2026, p. 7) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-9 and 18-24 are rejected under 35 U.S.C. 103 as being unpatentable over Oda. Regarding Claim 1, Oda discloses a substantially planar non-conductive substrate (figs. 1-3: planar substrate/template 1; p. 2: “a thin plastic film or paper sheet is put on the top of a ready-made solderless breadboard;” Examiner notes that the substrate can be made of adapted to be positioned on an electronics prototyping breadboard to form a predefined electronic circuit corresponding to the design tool (figs. 2-3: substrate/template 1 positioned on prototyping breadboard 2; abstract: “A template for electronic circuit learning that can be easily handled by beginners and young people of electronic circuits;” p. 2: “the required number of electronic component terminal holes are formed on the thin plastic or durable paper sheet to cover the component mounting surface of the solderless breadboard”); a plurality of guide apertures disposed in the substrate at locations corresponding to predefined electrical inputs of the electronics prototyping breadboard such that electronic components are able to be connected to the breadboard through respective ones of the guide apertures to form the predefined electronic circuit (p. 2: “the required number of electronic component terminal holes are formed on the thin plastic or durable paper sheet to cover the component mounting surface of the solderless breadboard and use it according to the mounting location of each electronic component;” figs. 1-2); and indicia printed on a surface of the substrate (fig. 3: indicia printed on substrate/template 1), the indicia indicative of a type or position of electrical connections or components to be connected with the electronics prototyping breadboard through corresponding ones of the guide apertures to form the predefined electronic circuit (p. 2: “the electronic components required for the electronic circuit to be assembled are printed according to the parts mounting portion on the sheet surface;” figs. 2-3; Examiner notes the indicia indicates the needed position of electrical components to be connected through the guide apertures). Regarding Claim 2, Oda further discloses outer dimensions of the substrate are matched to a typical electronics prototyping breadboard such that, when edges of the substrate is aligned with edges of the electronics prototyping breadboard, the guide apertures align with corresponding electrical inputs of the electronics prototyping breadboard (figs. 1-2: the edges of substrate/template 1 align with the edges of breadboard 2 with guide apertures/holes aligning with inputs of the breadboard so that the user may insert electrical components 4, 8, 10, 12, 14; p. 2: “the required number of electronic component terminal holes are formed on the thin plastic or durable paper sheet to cover the component mounting surface of the solderless breadboard and use it according to the mounting location of each electronic component”). Regarding Claim 3, Oda discloses guide apertures but does not explicitly disclose that they are precision cut using a laser. However, “[e]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). See MPEP § 2113-I. Therefore, the step of the apertures being precision cut with a laser does not patentably distinguish the claimed apparatus from the prior art because the claimed substrate comprising apertures is the same as or obvious from the template comprising apertures as disclosed by Oda. Regarding Claims 4-7 and 18-24, each and every limitation recites only nonfunctional printed matter. Where the only difference between a prior art product and a claimed product is printed matter that is not functionally related to the product, the content of the printed matter will not distinguish the claimed product from the prior art. In re Ngai, 367 F.3d 1336, 1339, 70 USPQ2d 1862, 1864 (Fed. Cir. 2004). See MPEP § 2112.01-III. Regarding Claim 8, Oda further discloses the substrate is formed of a polymer material (p. 2: “a thin plastic film… is put on the top of a ready-made solderless breadboard;” Examiner notes plastic is inherently/necessarily a polymer). Regarding Claim 9, Oda further discloses the substrate is formed of a paper-based material (p. 2: “a… paper sheet is put on the top of a ready-made solderless breadboard”). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Oda as applied to claim 1 above, and further in view of Poulain. Regarding Claim 10, Oda discloses a thin substrate (p. 2: “a thin plastic film or paper sheet) but does not explicitly disclose the precise thickness. However, Poulain discloses the substrate has a thickness of between 0.095 mm and 3 mm, inclusive (col. 6, lines 29-30: “The overall dimensions of the templates 20 are… 2 mm in thickness”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a 2 mm thick substrate/template as disclosed by Poulain as the substrate/template of Oda because Oda already discloses the substrate/template should be thin, and choosing an exact thickness would be a mere design choice and would help maintain consistency between various substrates. Furthermore, the substrate being so thin would contribute to its lightweight nature (Poulain, col. 6, lines 25-30). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIE DOSHER whose telephone number is (571) 272-4842. The examiner can normally be reached Monday - Friday, 10 a.m. - 6 p.m. ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dmitry Suhol can be reached at (571) 272-4430. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.G.D./Examiner, Art Unit 3715 /DMITRY SUHOL/Supervisory Patent Examiner, Art Unit 3715
Read full office action

Prosecution Timeline

May 20, 2022
Application Filed
Aug 26, 2025
Non-Final Rejection mailed — §103
Feb 26, 2026
Response Filed
Jun 09, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 4 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
35%
Grant Probability
99%
With Interview (+78.6%)
3y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 17 resolved cases by this examiner. Grant probability derived from career allowance rate.

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