DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/19/2026 has been entered.
Response to Arguments
Applicant argues in page 7:
“Klein discloses writing in the RAM memory 118 data from a data holding register 336 (C8 L37-40). Such a writing operation implicitly discloses opening the memory row containing the memory location indicated by the output signals A31-A3. Nevertheless, Klein is silent about when the memory row is opened. According to the state of the art, a memory row is opened after the memory programming has been requested, the destination address in memory being read from/after the programming instruction is fetched in the system's execution pipeline. As a result, Klein does not disclose opening the memory row before the programming operation is requested.” over claim 1.
Examiner respectfully disagrees. Klein teaches the argued feature in (Fig. 1, Col 8 lines 35-39,). In the cited section, the memory row/register is first read, which opens the memory row. Then, the same memory row/register is written to, thus the write/programming operation occurs after the memory row was previously opened for reading.
Applicant argues in pages 7-8:
“… according to the state of the Art in this matter, the memory row is opened and the charge pump charged only after a programming command is received by the memory controller for this charge pump. Therefore, these operations start only after the data to be written in memory has been generated by the security process computing it, after it has become ready to be written, and after the corresponding programming instruction has been fetched. In Cornwell, [0036] describes the commands to be sent by the CPU to the memory, which are only classical commands "Read", "Write"... or commands specific to the invention pertaining to the interleaving of charge pumps, which are transmitted only while a programming operation is already being performed and which do not change the order of the operations performed by a given charge pump. It does not disclose any command instructing to open a memory row or charge a pump independently of a programming.” over claim 1.
Cornwell does disclose in (para [0027]) an automatic cyclical operational policy that actively alters the workflow of the charge pumps to perform the memory operation at any given time non-stopping. Cornwell does disclose does not explicitly disclose requesting said programming operation of said memory area.
However, Lee teaches in para (Para [0119]-[0123]) that requesting said programming operation of said memory area.
In combination of Cornwell and Lee, the charge pumps cycle sequentially (one charging, one writing) are operate independently across separate arrays to fulfill the host's request efficiently.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 7, 8 are rejected under 35 U.S.C. 103 as being unpatentable over Klein (US6401199B1), in view of Cornwell (US20110273934A1), in view of LEE (US 20200176062 A1).
Regarding claim 1, Klein teaches a method for executing a security related process comprising at least a first operation and a subsequent programming operation of a memory area in a first memory row of a first memory of a system (ROM) and using as input data stored in a second memory of said system (RAM) (Fig. 1, Col 8 lines 35-39, the state machine generates output signals to cause eight 8-bit bytes to be read from the ROM 104 and transferred into the data holding register 336. In step 506, the state machine 321 causes the contents of the data holding register 336 to be written to the RAM 118 at the address contained in the decrementing counter 322. Col 8 lines 35-39. Col 1 lines 51-53, once ROM shadowing has been completed, the CPU then begins to execute the firmware routines from the system RAM.), wherein said first memory is a non-volatile memory (Fig. 1, Col 2 lines 6-7, the firmware routines are stored as ROM data 102 in a ROM 104. Wherein ROM is a non-volatile memory.), said method comprising, when the execution of said security related process is triggered:
opening (S2) the first memory row (Col 7 lines 55- 67 – Col 8 lines 1-19. Col 8 lines 35-39, the state machine generates output signals to cause eight 8-bit bytes to be read from the ROM 104 and transferred into the data holding register 336. In step 506, the state machine 321 causes the contents of the data holding register 336 to be written to the RAM 118 at the address contained in the decrementing counter 322. The cited portions show a read operation performed, which opens the memory row for reading and then, a write operation is performed to the same location that was read, thus the write operation occurs after the memory row was opened for reading).
Klein does not explicitly disclose said system comprises a first memory charge pump (108);
charging (S3) said first memory charge pump;
performing (S5) said programming operation of said memory area in said opened first memory row using said charged charge pump.
Cornwell does disclose said system comprises a first memory charge pump (108) (Para [008] lines 1-4. Para [0024] lines 1-4, FIG. 1, the system 100 includes a NAND flash memory die 102 and a host device 104. The NAND flash memory die 102 includes one or more NAND flash arrays 106 a, 106 b, and 106 c, control logic 108, a voltage regulator 109, and one or more charge pumps.);
charging (S3) said first memory charge pump (Para [0027] lines 1-3, the charge pump interleaving policy can specify that a first charge pump charges while a second charge pump performs a write operation on the NAND flash array.),
performing (S5) said programming operation of said memory area in said opened first memory row using said charged charge pump (Para [0027] lines 1-10, For example, the charge pump interleaving policy can specify that a first charge pump charges while a second charge pump performs a write operation on the NAND flash array 106 a, and as each completes their respective operations, the charge pumps switch operations, thereby cycling between writing and charging modes. The charge pump interleaving policy may also specify that charge pumps should operate without interleaving. For example, the interleaving policy may specify that each charge pump be used on a separate NAND flash array or on different parts of the same array.).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein with the teachings of Cornwell to include said system comprises a first memory charge pump (108); charging (S3) said first memory charge pump; performing (S5) said programming operation of said memory area in said opened first memory row using said charged charge pump in order to generate high operation voltages for programming flash memory cells.
Klein in view of Cornwell does not explicitly disclose using as input security data stored in a second memory;
performing (S4) said first operations of the security related process, based on said data from the second memory,
requesting said programming operation of said memory area.
LEE does disclose using as input security data stored in a second memory (Para [0008], a memory device including: a second memory region, in which security data is stored. The memory device is configured to perform a data operation on the second memory region.);
performing (S4) said first operations of the security related process, based on said data from the second memory (Para [0008]. Fig. 3. Para [0036]: memory controller (200) requests a read or write operation in the protected security region of the memory array (310), the security management circuit (370) intercepts the command. It then compares the provided password (PW) with a pre-stored guard key in second memory.),
requesting said programming operation of said memory area (Para [0119]-[0123]: The host 100 may generate a data operation request for the second memory region 314 of the memory cell array 310 in the memory device 300 (S510). The host 100 may provide the data operation request to the memory controller 200.)
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein in view of Cornwell with the teachings of LEE to include using as input security data stored in a second memory; performing (S4) said first operations of the security related process, based on said data from the second memory, requesting said programming operation of said memory area in order to prevents unauthorized reading, modifying, or deleting sensitive data operations.
Regarding claim 2, Klein in view of Cornwell and in view of LEE in view of Hain view of Ha teaches the method of claim 1 (Klein Col 8 lines 35-39. Col 1 lines 51-53), comprising, copying (S1) said security data from the first memory to the second memory before charging the first memory charge pump or opening the first memory row (Klein Fig. 1, Col 3 lines 63-66, the present invention provides a method that employs a ROM shadowing circuit (“RSC”) to copy firmware routines from the ROM to the RAM during computer system initialization. Cornwell Para [0027] lines 17-18, the charge pumps can charge simultaneously before performing operations.).
Regarding claim 7, Klein teaches a non-transitory computer readable medium storing executable computer code (Col 2 lines 6-7) that when executed by a system comprising at least one processor (Fig. 1, CPU 106), a first memory (Fig. 1, Col 2 lines 6-7, the firmware routines are stored as ROM data 102 in a ROM 104.), and a second memory (Fig. 1, Col 2 lines 10-11, the system controller 114 then stores the data 116 in the RAM 118 via a memory bus 120.).
Klein does not explicitly disclose a first memory charge pump.
Cornwell does disclose a first memory charge pump (Para [008] lines 1-4. Para [0024] lines 1-4, FIG. 1, the system 100 includes a NAND flash memory die 102 and a host device 104. The NAND flash memory die 102 includes one or more NAND flash arrays 106 a, 106 b, and 106 c, control logic 108, a voltage regulator 109, and one or more charge pumps.) .
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein with the teachings of Cornwell to include said system comprises a first memory charge pump (108); charging (S3) said first memory charge pump; performing (S5) said programming operation of said memory area in said opened first memory row using said charged charge pump in order to generate high operation voltages for programming flash memory cells.
Klein in view of Cornwell does not explicitly disclose using as input security data stored in a second memory;
performing (S4) said first operations of the security related process, based on said data from the second memory,
requesting said programming operation of said memory area
LEE does disclose using as input security data stored in a second memory (Para [0008], a memory device including: a second memory region, in which security data is stored. The memory device is configured to perform a data operation on the second memory region.);
performing (S4) said first operations of the security related process, based on said data from the second memory (Para [0008]. Fig. 3. Para [0036]: memory controller (200) requests a read or write operation in the protected security region of the memory array (310), the security management circuit (370) intercepts the command. It then compares the provided password (PW) with a pre-stored guard key in second memory.),
requesting said programming operation of said memory area (Para [0119]-[0123]: The host 100 may generate a data operation request for the second memory region 314 of the memory cell array 310 in the memory device 300 (S510). The host 100 may provide the data operation request to the memory controller 200.)
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein in view of Cornwell with the teachings of LEE to include using as input security data stored in a second memory; performing (S4) said first operations of the security related process, based on said data from the second memory, requesting said programming operation of said memory area in order to prevents unauthorized reading, modifying, or deleting sensitive data operations.
Regarding claim 8, Klein teaches system comprising a processor (Fig. 1, CPU 106), a first memory (Fig. 1, Col 2 lines 6-7, the firmware routines are stored as ROM data 102 in a ROM 104.), and a second memory (Fig. 1, Col 2 lines 10-11, the system controller 114 then stores the data 116 in the RAM 118 via a memory bus 120.).
Klein does not explicitly disclose a first memory charge pump.
Cornwell does disclose a first memory charge pump (Para [008] lines 1-4. Para [0024] lines 1-4, FIG. 1, the system 100 includes a NAND flash memory die 102 and a host device 104. The NAND flash memory die 102 includes one or more NAND flash arrays 106 a, 106 b, and 106 c, control logic 108, a voltage regulator 109, and one or more charge pumps.).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein with the teachings of Cornwell to include said system comprises a first memory charge pump (108); charging (S3) said first memory charge pump; performing (S5) said programming operation of said memory area in said opened first memory row using said charged charge pump in order to generate high operation voltages for programming flash memory cells.
Klein in view of Cornwell does not explicitly disclose using as input security data stored in a second memory;
performing (S4) said first operations of the security related process, based on said data from the second memory,
requesting said programming operation of said memory area
LEE does disclose using as input security data stored in a second memory (Para [0008], a memory device including: a second memory region, in which security data is stored. The memory device is configured to perform a data operation on the second memory region.);
performing (S4) said first operations of the security related process, based on said data from the second memory (Para [0008]. Fig. 3. Para [0036]: memory controller (200) requests a read or write operation in the protected security region of the memory array (310), the security management circuit (370) intercepts the command. It then compares the provided password (PW) with a pre-stored guard key in second memory.),
requesting said programming operation of said memory area (Para [0119]-[0123]: The host 100 may generate a data operation request for the second memory region 314 of the memory cell array 310 in the memory device 300 (S510). The host 100 may provide the data operation request to the memory controller 200.)
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein in view of Cornwell with the teachings of LEE to include using as input security data stored in a second memory; performing (S4) said first operations of the security related process, based on said data from the second memory, requesting said programming operation of said memory area in order to prevents unauthorized reading, modifying, or deleting sensitive data operations.
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Klein (US6401199B1), in view of Cornwell (US20110273934A1), in view of LEE (US 20200176062 A1), in view of RUBY LEE (US 20220269759 A1).
Regarding claim 3, Klein in view of Cornwell and in view of LEE in view of Ha teaches the method of claim 1.
Klein in view of Cornwell in view of KIM does not explicitly disclose wherein, said system comprising a hardware security sensor or being configured for executing a software countermeasure, said programming operation comprises writing, in said first memory, permanent security counters logging some abnormal behavior detected by said hardware security sensor or said software countermeasure.
RUBY LEE does disclose wherein, said system comprising a hardware security sensor or being configured for executing a software countermeasure, said programming operation comprises writing, in said first memory, permanent security counters logging some abnormal behavior detected by said hardware security sensor or said software countermeasure (Para [0085]).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Klein in view of Cornwell and in view of LEE in view of Hawith the teachings of RUBY LEE to include wherein, said system comprising a hardware security sensor or being configured for executing a software countermeasure, said programming operation comprises writing, in said first memory, permanent security counters logging some abnormal behavior detected by said hardware security sensor or said software countermeasure in order to store the sensor measurements to memory first, then read back from memory to the CPU or GPU for software impostor detection.
Regarding claim 4, Klein in view of Cornwell and in view of LEE in view of Ha and view of RUBY LEE teaches the method according to claims 3, wherein said second memory (104) is among a cache memory, a Random Access memory (RAM), a Non Volatile memory (NVM) or a Read Only memory (ROM) (Klein Fig. 1, Col 2 lines 10-11, the system controller 114 then stores the data 116 in the RAM 118 via a memory bus 120.).
Regarding claim 5, Klein in view of Cornwell and in view of LEE in view of Ha and view of LEE teaches the method according to claims 4, wherein said first memory charge pump is charged at a predetermined frequency such that it induces no visible spike of the current consumption of the system (Cornwell Para [0008] lines 1-3, in one general aspect, a first charge pump is charged to at least a predetermined level, and a first operation is performed using a charge stored in the first charge pump after it reaches the predetermined level. Para [0038]. Para [0022] lines 16-22, by lowering the peak current draw, battery power may be preserved. Thus, such an interleaving policy may be preferred when a portable device is operating on battery power and/or when the battery has a low level of remaining charge. In some implementations, power efficiency can also be improved by simply limiting or controlling the rate of charging or current draw.).
Conclusion
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/JUDY BAZNA/ Examiner, Art Unit 2495
/FARID HOMAYOUNMEHR/ Supervisory Patent Examiner, Art Unit 2495
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