DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/30/2025 has been entered.
Response to Amendment
The amendment filed on 12/30/2025 has been entered. Claim 1 has been amended. Claims 1-3, 7-15 and 17 are under examination. Claims 4-6 and 16 remain withdrawn from consideration as being directed to a non-elected invention. Should claim 1 be found allowable, claims 4-6 and 16 will be rejoined and fully examined for patentability. See MPEP § 821.04.
Response to Arguments
Applicant's arguments filed 12/30/2025 have been fully considered but are moot in view of the new ground(s) of rejection necessitated by Applicant's amendment. The rejection of claim 1 under 35 U.S.C. 102 over Yoon is withdrawn.
Applicant argues that the opening 116 of Hong is neither between two TFTs of the pixel 111 nor at a position corresponding to the island region. Hong is not relied upon for either limitation. Kim teaches a pixel circuit comprising a first transistor Tdr and a second transistor Tsw with the opening between them in a plan view (Kim, Fig. 7), and because the pixel circuit of Hong is disposed in the island region, the first opening is located between the first transistor and the second transistor of that pixel circuit is at a position corresponding to the island region. One cannot show nonobviousness by attacking references individually where the rejection is based upon a combination of references. See MPEP § 2145(IV).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1–3, 7–15, and 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ),
second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject
matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the
applicant), regards as the invention.
Claim 1 recites “the pixel circuit” in lines 13 and 19. Because the claim recites “a plurality of sub-pixels, each sub-pixel comprising…a pixel circuit” in line 11, a plurality of pixel circuits are present and the singular recitation lacks antecedent basis. It is unclear whether the limitation applies to one pixel circuit or to the pixel circuit of each sub-pixel.
Claim 1 recites “a position of the buffer layer corresponding to the island region.” There is insufficient antecedent basis for this limitation because the claim recites “a plurality of island regions.”
Claims 2–3, 7–14, and 17 are also rejected as being dependent on rejected claim 1. Claim 15 is rejected as reciting the display substrate of claim 1.
Appropriate correction is required.
Claim Interpretation
Claim 1 recites that "the first opening in the buffer layer is between orthographic projections of the first transistor and the second transistor on the buffer layer." Claim 1 does not require that the entirety of the first opening lie between the recited projections, nor does it exclude overlap between the first opening and the transistors; claim 7 separately recites such non-overlap. For purposes of examination, the limitation is interpreted as requiring that at least a portion of an orthographic projection of the first opening on the buffer layer be located between the orthographic projections of the first transistor and the second transistor on the buffer layer. See MPEP § 2111.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 7-8, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Hong et al. (US20180052493A1) in view of Kim et al. (US10622432B2).
Regarding claim 1, Hong teaches a display substrate having a plurality of island regions (Fig. 4, island 112), bridge regions (Fig. 4, bridge region 114) and clearance regions (Fig. 4, peripheral area PA), the bridge regions being disposed around the island regions, the display substrate comprising:
at least one base, each of the at least one base comprising a sub-base (Fig. 11, carrier substrate 140) and a buffer layer (Fig. 11, substrate 120), wherein the sub-base comprises a first surface and a second surface opposite to each other, and the buffer layer is disposed on a side of the second surface of the sub-base away from the first surface (Fig. 11 & Para [0085], substrate 120 fixed to the carrier substrate 140); and in the at least one base, the sub-base of any base has a same orientation (Fig. 11);
a plurality of sub-pixels (Fig. 4, pixel 111) on a side of the buffer layer of an outermost base of the at least one base away from the sub-base of the outermost base, each sub--pixel comprising a light-emitting device and a pixel circuit, wherein each island region is provided with at least one of the sub-pixels (Para [0054], pixel 111 is disposed in each of the island 112); and
a plurality of signal lines connected to the pixel circuit, wherein the plurality of signal lines are distributed in the bridge regions (Para [0055], pixels 111 disposed in the islands 112 can be driven by receiving power and electrical signals through the wires disposed in the bridge 114);
wherein
the buffer layer of the at least one base has a first opening (Fig. 11, opening 116 extending through the substrate 120).
Hong further teaches that a set of openings including a first opening and a second opening is provided in the insulating layer, and that a first transistor of a first pixel is positioned between the first opening and the second opening in a plan view (Para [0085]).
Hong does not explicitly teach that the first opening is provided at a position of the buffer layer corresponding to the island region, that the pixel circuit comprises a first transistor and a second transistor, and that the first opening in the buffer layer is between orthographic projections of the first transistor and the second transistor on the buffer layer.
However, Kim teaches the pixel circuit comprises a first transistor and a second transistor (Fig. 3A, a pixel circuit unit including a driving transistor TR2 controlling the light emitting element OLED and a switching transistor TR1 switching the driving transistor TR2; Fig. 4, a first transistor Tdr and a second transistor Tsw provided in each pixel), and
the first opening in the buffer layer is between orthographic projections of the first transistor and the second transistor on the buffer layer (Fig. 7, the first gate insulating layer GI1, the second gate insulating layer GI2 and the second buffer layer BFL2 are patterned in an island shape to be disposed only in a partial region of the substrate SUB on which the first transistor Tdr is provided, and an opening exposing a surface of the first buffer layer BFL1 is provided on the substrate SUB on which the second transistor Tsw is provided, such that the opening is located between the first transistor Tdr and the second transistor Tsw in a plan view).
Kim further teaches that the island insulating pattern and the opening provided on the substrate structurally reduce the stress applied to the display device by an external impact and the stress applied to the display device when the display device is folded, thereby minimizing the generation of cracks in the first buffer layer BFL1 (Fig. 7), while the first transistor Tdr remains covered by the island insulating pattern.
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the invention, to arrange the first opening of Hong between the first transistor and the second transistor as taught by Kim, in order to reduce stress on the brittle inorganic layer and minimize cracks, as described by Kim. Hong teaches that rolling, folding, bending, and/or stretching may damage the display panel due to accumulation of physical breakage or fatigue (Para [0002]). Because the pixel circuit of Hong is disposed in the island region (Para [0054]), the first opening located between the first transistor and second transistor of that pixel circuit is at a position of the buffer layer corresponding to the island region.
Regarding claim 2, Hong in view of Kim teaches the display substrate according to claim 1, wherein the first opening comprises a plurality of first sub-openings (Fig. 4, dumbbell-shaped sub-openings) and a plurality of second sub--openings (Fig. 4, dumbbell-shaped sub-openings) arranged at intervals along a first direction (Para [0080]), and
wherein an extending direction of the plurality of first sub-openings intersects with an extending direction of the plurality of second sub-openings (Fig. 4).
Regarding claim 3, Hong in view of Kim teaches the display substrate according to claim 2, wherein the plurality of first sub-openings are connected to the plurality of second sub-openings to form the first opening, and the first opening has a first side and a second side opposite to each other in the first direction (Fig. 4 & Para [0062]),
the first side has a plurality of first peaks and a plurality of first valleys; and the second side has a plurality of second peaks and a plurality of second valleys (Fig. 4 &Para [0062]), wherein
the first peaks and the second valleys are arranged in one-to-one correspondence, and the second peaks and the first valleys are arranged in one--to-one correspondence (Fig. 4 & Para [0062]), and
any one of the first peaks is close to a second valley between two second peaks on two sides of the first peak, with respect to a connection line between the two second peaks (Fig. 4 & Para [0062]).
Regarding claim 7, Hong in view of Kim teaches the display substrate according to claim 1, wherein the pixel circuits comprise a plurality of transistors (TFT), and orthographic projections of the plurality of transistors on the buffer layer do not overlap the first opening (Fig. 11 & Para [0085], transistors formed on the substrate 120 between Hong’s first opening and the second opening).
Regarding claim 8, Hong in view of Kim teaches the display substrate according to any one of claim 1, wherein the first opening penetrates a corresponding buffer layer (Fig. 11 & Para [0087], opening 116 extend not only through the insulating layers 130 but also through the substrate 120, so that the carrier substrate 140 may be exposed).
Regarding claim 15, Hong in view of Kim teaches a display apparatus (Para [0067], display apparatus 1), comprising the display substrate according to claim 1 (Para [0002], a flexible display panel can be included in a rollable display device, a foldable display device, a bendable display device, and/or a stretchable display device).
Claims 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hong (US20180052493A1) in view of Kim (US10622432B2) as applied to claim 1 above, and further in view of Zhao et al. (US20220285464A1).
Regarding claim 9, Hong in view of Kim teaches the display substrate according to claim 1 respectively, but does not teach at least one inorganic film layer laminated with the buffer layer of the outermost base of the at least one base, wherein the at least one inorganic film layer has a second opening provided at a position of the at least one inorganic film layer corresponding to the island region.
However, Zhao teaches at least one inorganic film layer laminated with the buffer layer of the outermost base of the at least one base (Fig. 9 & Para [0059], encapsulation layer 012 may be a single-layer or multi-layer structure formed from an inorganic compound), wherein the at least one inorganic film layer has at least one second opening provided at a position of the at least one inorganic film layer corresponding to the island region (Para [0057], at least one groove W).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the invention, to modify the display substrate of Hong in view of Kim by integrating the alternative structure of the display panel disclosed by Zhao (US20220285464A1). The combination of these familiar elements can lower the probability of cracking in the display panel by reducing stress, as described in paragraph [0051] of Zhao.
Regarding claim 10, Hong in view of Kim and Zhao teaches the display substrate according to claim 9, wherein an orthographic projection of the second opening on the buffer layer has an overlap region with the first opening (Fig. 9 & Para [0087], grooves W are on the surface of the encapsulation layer 012 distal from the display film layer, and the orthographic projections of the grooves W on the base layer 011 overlap the openings of the base layer).
Regarding claim 11, Hong in view of Kim and Zhao teaches the display substrate according to claim 10, wherein the second opening and the first opening are provided in one-to-one correspondence, and have a same shape (Para [0057], base layer 011 and the encapsulation layer 012 are in a rectangular shape).
Regarding claim 12, Hong in view of Kim and Zhao teaches the display substrate according to claim 10, wherein the second opening penetrates a corresponding inorganic film layer (Fig. 8 & Para [0087], at least one groove W is on a surface of the encapsulation layer 012).
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Hong (US20180052493A1) in view of Kim (US10622432B2) as applied to claim 1 above, and further in view of Ebisuno et al. (US20250143082A1).
Regarding claim 13, Hong in view of Kim teaches the display substrate according to claim 1 respectively, but does not teach the sub--base of any one of the at least one base is a flexible base; the at least one base comprises a first base and a second base, the first base comprises a first sub-base and a first buffer layer, and the second base comprises a second sub-base and a second buffer layer; and wherein a thickness of the second sub-base is 40% to 60% of a thickness of the first sub-base.
However, Ebisuno teaches the sub--base of any one of the at least one base is a flexible base (Para [0075]); the at least one base comprises a first base (Fig. 9, second base layer 105 and third barrier layer 106) and a second base (Fig. 9, first base layer 101 and second barrier layer 104), the first base comprises a first sub-base (Fig. 9, second base layer 105) and a first buffer layer (Fig. 9, third barrier layer 106), and the second base comprises a second sub-base (Fig. 9, first base layer 101) and a second buffer layer (Fig. 9, second barrier layer 104); and
Wherein
a thickness of the second sub-base is 40% to 60% of a thickness of the first sub-base (Para [0203]).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the invention, to modify the display substrate of Hong in view of Kim by integrating the alternative structure of the display substrate disclosed by Ebisuno (US20250143082A1). The combination of these familiar elements can reduce infiltration of a foreign material, moisture, and/or ambient air from below the substrate 100 and may provide a flat surface on the substrate, as described in paragraph [0157] of Ebisuno.
Regarding claim 14, Hong in view of Kim teaches the display substrate according to claim 1, wherein each of the at least one base has corner regions, and the island regions, the bridge regions and the clearance regions are provided in the corner regions (Figs. 1 and 7-10, area C located at a corner of the display area DA, in which the islands 112, the bridges 114 and the openings 116 are provided), but does not explicitly teach that the base is a rigid base.
However, Ebisuno teaches the base is a rigid base (Fig. 9 & Para [0075]).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the invention, to modify the display substrate of Hong in view of Kim by forming the base as a rigid base as taught by Ebisuno (US20250143082A1), in order to reduce infiltration of a foreign material, moisture, and/or ambient air from below the substrate and to provide a flat surface on the substrate, as described in paragraph [0157] of Ebisuno.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Hong (US20180052493A1) in view of Kim (US10622432B2) and Zhao (US20220285464A1) as applied to claim 10 above, and further in view of Zeng et al. (US20190333940A1).
Regarding claim 17, Hong in view of Kim and Zhao teaches the display substrate according to claim 10, wherein the second opening has a depth less than a thickness of the corresponding inorganic film layer (Para [0055]-[0057]), but does not specify the second opening has a depth less than half a thickness of the corresponding inorganic film layer.
However, Zeng teaches the second opening has a depth less than half a thickness of the corresponding inorganic film layer (Fig. 2 & Para [0047]).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the invention, to modify the display substrate of Hong in view of Kim and Zhao by integrating the alternative structure of the array substrate disclosed by Zeng (US20190333940A1). The combination of these familiar elements can prevent breakage of the film by reducing bending stress, as described in paragraph [0039] of Zeng.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAHAE KIM whose telephone number is (571)270-1844. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached on (571) 271-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/JAHAE KIM/Examiner, Art Unit 2897
