Prosecution Insights
Last updated: April 19, 2026
Application No. 17/789,835

ELECTRONIC ANTENNA MODULE OPTIMISED FOR A CHIP CARD WITH A DUAL COMMUNICATION INTERFACE

Final Rejection §103
Filed
Jun 29, 2022
Examiner
HABIB, ASIFA
Art Unit
2876
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Smart Packaging Solutions
OA Round
4 (Final)
77%
Grant Probability
Favorable
5-6
OA Rounds
2y 7m
To Grant
92%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
269 granted / 350 resolved
+8.9% vs TC avg
Moderate +15% lift
Without
With
+14.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
18 currently pending
Career history
368
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
51.4%
+11.4% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
16.2%
-23.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 350 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Amendment received on 09/02/2025. Claims 9-16 have been newly added. Claims 1-16 are currently pending. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 5, 6, and 8-16 are rejected under 35 U.S.C. 103 as being obvious over Le Loc’h et al. 2016/0330841 in view of Kato et al. 2016/0353619. Regarding claim 1, Le Loc’h discloses an electronic module (electronic module 10) for a chip card, comprising a substrate (card body 51-52), wherein the substrate comprising: on a first face, a terminal block (contact pads 12) of standardized electrical contacts according to the ISO 7816 standard [FIG 3] [FIG 5] [043]; and on a second face: first connection wells (reservations/orifices 13) positioned opposite at least one of said standardized electrical contacts [FIG 1-3] [043]; second connection wells (reservations/orifices 13) positioned opposite at least one of said standardized electrical contacts [FIG 1-3] [043]; an antenna (antenna 40/54/55) of the electronic module configured to couple or communicate with an external antenna (the antenna of the reader) [FIG 1-3] [FIG 5] [043]; a microelectronic chip (electronic component 15) that is protected by an encapsulating area (protective resin 16) [FIG 5] and provided with a contact communication interface and a contactless communication interface that is provided with two terminals (conductive path 20) configured to connect to the two ends of the antenna (antenna 40) and arranged inside the encapsulated area [FIG 4-5] [043] [063]; wherein the first connection wells and the second connection wells comprise holes in the substrate through which electrical connections between the terminal block of standardized electrical contacts and the contact communication interface are made [FIG 5] [043], and wherein the electrical connections are configured to facilitate communication between contacts of a chip card reader corresponding to the ISO 7816 standard that are in contact with the terminal block of standardized electrical contacts; and the microelectronic chip [43]. However Le Loc’h fails to explicitly disclose comprises two distinct windings of turns extending between its two ends, these two windings being configured so that a first winding of turns starts from a first end, is would around first connection wells, and join the second winding of turns, which is would around second connection wells, and extends as far as the second end of the antenna, and wherein the connection wells comprise holes in the substrate through which electrical connections are made. Kato discloses two distinct windings of turns extending between its two ends, these two windings being configured so that a first winding of turns starts from a first end, is wound around first connection wells, and join the second winding of turns, which is wound around second connection wells, and extends as far as the second end of the antenna [FIG 16B], and wherein the connection wells comprise holes in the substrate through which electrical connections are made [FIG 17A][ 131]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Le Loc’h in view of Kato as Kato discloses using carrier tapes which allows for “Preferred embodiments of the present invention improve the handleability of a component used in a new method for connecting an electronic component and a connection object.” [012] Regarding claim 2, Le Loc’h in view of Kato discloses all of the limitations of claim 1.Kato further discloses said windings of turns are coplanar [FIG 16B]. Regarding claim 5, Le Loc’h in view of Kato discloses all of the limitations of claim 1. Kato further discloses the two windings of turns of the antenna are connected in series and are wound in opposite directions [FIG 16B]. Regarding claim 6, Le Loc’h in view of Kato discloses all of the limitations of claim 5. Kato further discloses through the turns of the antenna located between said first connection wells and said second connection wells, the electrical current flows in opposite directions [FIG 16B]. Regarding claim 8, Le Loc’h in view of Kato discloses all of the limitations of claim 1. Le Loc’h further discloses a chip card with a contact and contactless dual communication interface, an electrical module [002]. Regarding claim 9, Le Loc’h in view of Kato discloses all of the limitations of claim 1. Le Loc’h further discloses the electrical connections between the terminal block of standardized electrical contacts and the contact communication interface comprise a connection wire (wire 44) that passes through one of the first connection wells or one of the second connection wells [60] [FIG 1-3] [FIG 5]. Regarding claim 10, Le Loc’h in view of Kato discloses all of the limitations of claim 9. Le Loc’h further discloses the connection wire is welded to an ISO 7816 contact of the terminal block of standard electrical contacts according to the ISO 7816 standard [040]. Regarding claim 11, Le Loc’h in view of Kato discloses all of the limitations of claim 9. Le Loc’h further discloses the connection wire is electrically connected to a terminal of the contact communication interface of the microelectronic chip. Regarding claim 12, Le Loc’h in view of Kato discloses all of the limitations of claim 11. Le Loc’h further discloses the terminal of the contact communication interface of the microelectronic chip is a GND (ground) terminal [57]. Regarding claim 13, Le Loc’h in view of Kato discloses all of the limitations of claim 11. Le Loc’h further discloses the terminal of the contact communication interface of the microelectronic chip is a I/O (communication signal) terminal. [57]. Regarding claim 14, Le Loc’h in view of Kato discloses all of the limitations of claim 11. Le Loc’h further discloses the terminal of the contact communication interface of the microelectronic chip is a VCC (electric power supply) terminal [057]. Regarding claim 15, Le Loc’h in view of Kato discloses all of the limitations of claim 11. Le Loc’h further discloses the terminal of the contact communication interface of the microelectronic chip is an RST (reset) terminal [057]. Regarding claim 16, Le Loc’h in view of Kato discloses all of the limitations of claim 11. Le Loc’h further discloses the terminal of the contact communication interface of the microelectronic chip is a CLK (clock) terminal [057]. Claims 3-4 are rejected under 35 U.S.C. 103 as being obvious over Le Loc’h et al. 2016/0330891 in view of Kato et al. 2016/0353619 as applied to claims 1-2, 5-6,8-16 above, and in further view of Yun et al. 2019/0086968. Regarding claim 3, Le Loc’h in view of Kato discloses all of the limitations of claim 1. However both fail to disclose the two windings of turns are connected in series and are wound in the same direction. Yun discloses the two windings of turns are connected in series and are wound in the same direction [FIG 2]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Le Loc’h and Kato in view of Yun as it is well known in the art to design antenna structures to suit the needs of the system. Regarding claim 4, Le Loc’h in view of Kato and Yun discloses all of the limitations of claim 3. Yun further discloses though the turns of the antenna located between said first connection wells and said second connection wells, the electric current of the antenna flows in the same direction [FIG 2]. Claim 7 is rejected under 35 U.S.C. 103 as being obvious over Le Loc’h et al. 2016/0330891 in view of Kato et al. 2016/0353619, as applied to claims 1-2, 5-6, 8-16 above, and in further view of Calvas et al. 2020/0394484 (herein referred to as ‘484). Regarding claim 7, Le Loc’h in view of Kato discloses all of the limitations of claim 1. However, neither Le Loc’h nor Kato discloses the inductance of the antenna is between 1 and 2.3 microhenres and the chip has a capacitance of between 17 and 70 picofarads. Calvas ‘484 discloses the inductance of the antenna is between 1 and 2.3 microhenres and the chip has a capacitance of between 17 and 70 picofarads [31]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Le Loc’h and Kato in view of Calvas ‘484 as Calvas 476 discloses, “ This especially allows the self-inductance value that is most suitable, depending on the input capacitance of the chip used, to be chosen. This option therefore makes it possible to obtain a module that may be used more flexibly, to assemble physically a number of different types of chip, and to select the electrical properties of the antenna via connection of a suitable number of antenna turns.” [59] Thus allowing for the ideal selection of inductance and capacitance of Calvas ‘484. Response to Arguments Applicant’s arguments with respect to claims 1-8 have been considered but are moot because the new ground of rejection does not rely on the combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The Applicant has amended claim 1 (and its dependencies) and thus overcoming the prior art rejection of Calvas in view of Kato. However, upon further search and consideration, the Examiner has provided a new U.S.C. 103 rejection of Le Loc’h in view of Kato, please see above for citations. Thus, all pending claims are rejected. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASIFA HABIB whose telephone number is (571)270-7032. The examiner can normally be reached 10-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steve Paik can be reached on 571-272-2404. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ASIFA HABIB/Examiner, Art Unit 2876 /STEVEN S PAIK/Supervisory Patent Examiner, Art Unit 2876
Read full office action

Prosecution Timeline

Jun 29, 2022
Application Filed
May 31, 2024
Non-Final Rejection — §103
Sep 04, 2024
Response Filed
Sep 27, 2024
Final Rejection — §103
Jan 16, 2025
Interview Requested
Jan 27, 2025
Applicant Interview (Telephonic)
Jan 28, 2025
Examiner Interview Summary
Feb 19, 2025
Request for Continued Examination
Feb 20, 2025
Response after Non-Final Action
May 29, 2025
Non-Final Rejection — §103
Aug 21, 2025
Interview Requested
Aug 28, 2025
Applicant Interview (Telephonic)
Aug 30, 2025
Examiner Interview Summary
Sep 02, 2025
Response Filed
Dec 15, 2025
Final Rejection — §103
Apr 14, 2026
Examiner Interview Summary
Apr 14, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
77%
Grant Probability
92%
With Interview (+14.7%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 350 resolved cases by this examiner. Grant probability derived from career allow rate.

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