Prosecution Insights
Last updated: October 02, 2026
Application No. 17/790,380

DISPLAY PANEL MOTHERBOARD, METHOD FOR TESTING DISPLAY PANEL MOTHERBOARD AND DISPLAY PANEL

Non-Final OA §102§103
Filed
Jan 31, 2025
Priority
May 13, 2022 — CN 202210524559.9 +1 more
Examiner
HAWKINS, DOMINIC E
Art Unit
Tech Center
Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
658 granted / 757 resolved
+26.9% vs TC avg
Moderate +12% lift
Without
With
+12.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
16 currently pending
Career history
766
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
60.2%
+20.2% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 757 resolved cases

Office Action

§102 §103
Detailed Action The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 of U.S. Application 17/790,380 filed on June 30, 2022 are presented for examination. Information Disclosure Statement The information disclosure statement (IDS) submitted on 03/22/2023 and 10/28/2024 has been considered by the examiner. Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 17-19 are rejected under 35 U.S.C. 102(a1) as being unpatentable over Weishi et al (CN113643636). Regarding claim 17, Weishi discloses a display panel (shown in figs 1-4) comprising: a display panel main body (10) provided with a signal input end (using 3); a testing portion (testing stage) provided with a test signal end (112), wherein the test portion comprises a testing circuit (combination of the components) connected between the test signal end and the signal input end (shown in figs 1-3 as the components are between the signal end and test signal end); and a circuit board disposed on the testing portion (pars 26 and 30 discloses having circuit board having signal traces) , wherein the circuit board is electrically connected to the signal input end of the display panel main body (par 32 discloses display panel is provided by the circuit board). Regarding claim 18, Weishi discloses wherein the testing circuit comprises a signal line, an end of the signal line (3) is connected to the test signal end (112), and another end (ends of 11/12) of the signal line is connected to the main body of the display panel, so as to form a signal channel (channels of 140) between the test signal end and the signal input end (shown in figs 2 and 3 of having a signal line between the test signal end and input end). Regarding claim 19, Weishi discloses wherein the testing circuit further comprises a control switch connected to the signal line, the test portion is further provided with a signal control end, the signal control end is electrically connected to the control switch, and the signal control end is configured for controlling the control switch to be on or off after receiving a control signal (par 8 and 9 discloses controlling terminal of active switches. Therefore, a control switch). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1-10, 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Weishi et al (CN113643636) in view of Jianqiang et al (CN201051368). PNG media_image1.png 439 681 media_image1.png Greyscale PNG media_image2.png 445 684 media_image2.png Greyscale Prior Art: Weishi Regarding claim 1, Weishi discloses a display panel motherboard (shown in figs 1-4) comprising: a display region (shown in fig 1), wherein the display region comprises a plurality of display panel main bodies (10) disposed side by side, and the plurality of display panel main bodies are each provided with a signal input end (3); and a testing region (testing phase) formed with a testing circuit (combination of the components), wherein the testing circuit comprises a first signal end (113) and a control circuit (par 5 discloses control signal output. Therefore, there is a control circuit), a signal channel (shown at 11 and 12) is formed between the first signal end and the signal input end of each of the plurality of display panel main bodies (shown in figs 1-4), so that the first signal end controls a corresponding one of the plurality of display panel main bodies to display after receiving a first control signal (pars 23-28 discloses using signal by 113 to start or display based on need. Par 31 discloses controlling components of the display); the control circuit is connected to the signal channel between the first signal end and the plurality of signal input ends (shown in figs 2 and 3 as between the first signal end and the plurality of signal ends. Weishi does not fully disclose so as to control the signal channel between the first signal end and at least a portion of the plurality of signal input ends of the plurality of display panel main bodies to be on or off. However, Jianqiang discloses so as to control the signal channel between the first signal end and at least a portion of the plurality of signal input ends of the plurality of display panel main bodies to be on or off (abstract discloses cutting off based on conditions and par 21 discloses testing multiple LCDs panels. Therefore, would control the signal channel to be turned on and off). It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to combine Weishi in view of Jianqiang in order to improve testing while increasing speed and reducing cost. Regarding claim 2, Weishi discloses wherein the control circuit comprises a control switch connected to the signal channel and a second signal end electrically connected to the control switch, and the second signal end is configured for controlling a corresponding control switch to be on or off after receiving a second control signal (par 8 and 9 discloses controlling terminal of active switches. Therefore, a control switch). Regarding claim 3, Weishi discloses wherein the control circuit comprises a plurality of connection lines, an end of each of the plurality of connection lines is connected to the first signal end, and another end of each of the plurality of connection lines are connected to the plurality of signal input ends of the plurality of display panel main bodies in a one-to-one correspondence to form the signal channel between the first signal end and the signal input end of each of the plurality of display panel main bodies; and at least a portion of the plurality of connection lines is connected to the control switch (as shown in figs 1-4 as a plurality of connections are connected to the control switch). Regarding claim 4, Weishi discloses wherein a number of a plurality of the control switches is equal to a number of the plurality of display panel main bodies and each of the plurality of connection lines is connected to one of the pluralities of control switches (shown in figs 1-4 as control switches to the bodies of the display panel). Regarding claim 5, Weishi discloses wherein the control switch comprises a control end, a first connection end, and a second connection end, the second signal end is connected to the control end, and the first connection end of the control switch is connected to the first signal end, and the second connection end of the control switch is connected to the signal input end of each of the plurality of display panel main bodies in a one-to-one correspondence (shown in figs 1-4 as displays are connecting in a plurality of display panels). Regarding claim 6, Weishi discloses wherein the control circuit comprises a main line (140) connected to the first signal end (113), and a plurality of connection nodes are provided on the main line (shown in figs 1-4); the control circuit further comprises a plurality of branch lines (shown in figs 2 and 3), an end of each of the plurality of branch lines is connected to the plurality of connection nodes in one-to-one correspondence, and another end of each of the plurality of branch lines is connected to the signal input ends of the plurality of display panel main bodies in one-to-one correspondence (shown in figs 2 and 3), so as to form the signal channel between the first signal end and the signal input end of each of the plurality of display panel main bodies; at least a portion of the main line between the two adjacent connection nodes is connected to the control switch (shown in figs 1-4 as connection nodes is connected to the control). Regarding claim 7, Weishi discloses wherein a number of a plurality of the control switches is equal to a number of the plurality of display panel main bodies, and the main line between any two adjacent connection nodes is connected to the plurality of control switches, and the main line between any one of the connection nodes and the first signal end is connected to the plurality of control switches (par 9 discloses active switches; par 23-27 discloses a plurality of signal channels and high to low wiring based on intended need. Therefore, they are connected to switches). Regarding claim 8, Weishi discloses wherein the control circuit comprises a plurality of the second signal ends (111) and a plurality of the control switches, and a number of the second signal ends is equal to a number of the plurality of control switches, and the plurality of second signal ends are electrically connected to the plurality of control switches in a one-to-one correspondence (par 9 discloses active switches. Therefore, will be a plurality of signal ends); based on intended need. Therefore, they are connected to switches). Regarding claim 9, Weishi discloses wherein the plurality of display panel main bodies are arranged side by side in a first direction, and in the first direction, the first signal end and the plurality of second signal ends are located on a same side of the display region (shown in fig 1 as having the display bodies on opposite side of a display region). Regarding claim 10, Weishi discloses wherein, in the first direction, the plurality of second signal ends are distributed on two opposite sides of the display region (shown in fig 1 as having the display bodies on opposite side of a display region). Regarding claim 14, Weishi discloses wherein the display panel motherboard comprises a plurality of the display regions and a plurality of the testing regions, the plurality of display regions and the plurality of testing regions are in a one-to-one correspondence; the plurality of display regions are arranged side by side along a second direction, and an angle is between the second direction and the first direction (shown in figs 1-4 as able to a test area and par 15 discloses testing phase high level signal and low level signal line controls). Regarding claim 15, Weishi discloses wherein the first direction is perpendicular to the second direction (par 20 discloses orientation and positional does not have to be in any particular configuration. Therefore, the first and second direction can be perpendicular). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Weishi et al (CN113643636) in view of Jianqiang et al (CN201051368) in further view of Tao et al (USPGPub 20220301467). Regarding claim 16, Weishi discloses wherein providing the display panel motherboard; inputting the first control signal through the first signal end of the display panel motherboard, and controlling the signal channel between the first signal end and the signal input end of each of the plurality of display panel main bodies on the display panel motherboard to be on through the control circuit on the display panel motherboard, so that the plurality of display panel main bodies display (pars 23-28 discloses using signal by 113 to start or display based on need. Par 31 discloses controlling components of the display). Weishi does not fully disclose determining whether one of the plurality of display panel main bodies displays abnormally in the plurality of display panel main bodies; if one of the plurality of display panel main bodies displays abnormally in the plurality of display panel main bodies, the control circuit controlling the signal channel between the first signal end and a portion of the plurality of signal input ends of the plurality of display panel main bodies to be off, so that corresponding ones of the plurality of display panel main bodies are to be off; and determining whether one of the plurality of display panel main bodies displays abnormally in remaining ones of the plurality of display panel main bodies. However, Tao discloses determining whether one of the plurality of display panel main bodies displays abnormally in the plurality of display panel main bodies; if one of the plurality of display panel main bodies displays abnormally in the plurality of display panel main bodies, the control circuit controlling the signal channel between the first signal end and a portion of the plurality of signal input ends of the plurality of display panel main bodies to be off, so that corresponding ones of the plurality of display panel main bodies are to be off; and determining whether one of the plurality of display panel main bodies displays abnormally in remaining ones of the plurality of display panel main bodies (par 62 discloses displaying abnormalities and turning the 30 on and off based on intending use. Therefore, controlling the signal and determining whether the panels are abnormal). It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to combine Weishi in view of Jianqiang in further view of Tao in order to determine properties of a display panel. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Weishi et al (CN113643636) in view of Ma et al (USPGPub 20240028157). Regarding claim 20, Weishi discloses wherein the display panel comprises a thin-film transistor layer, the thin-film transistor layer comprises a first thin-film transistor, and the first thin-film transistor is located in the display panel main body (par 35 discloses being a thin film transistor). Weishi does not fully disclose the first thin-film transistor comprises a metal layer, and the signal line and the metal layer of the first thin-film transistor are disposed in a same layer. However, Ma discloses the first thin-film transistor comprises a metal layer, and the signal line and the metal layer of the first thin-film transistor are disposed in a same layer (par 118 discloses T1-T3 having metal film and control signal line SCN may be on the same layer as the source. Therefore, the metal and the signal line are disposed on the same layer).It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to combine Weishi in view of Ma in order to control the transistor for switching purposes. Allowable Subject Matter Claims 11-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 11, the prior art of record taken alone or in combination fail to teach or suggest a display panel motherboard comprising: wherein the testing circuit further comprises a third signal end, and the third signal end is electrically connected to any one of the signal input end of the plurality of display panel main bodies, so that the third signal end controls a corresponding one of the plurality of display panel main bodies to display after receiving a third control signal in combination with the other limitation s of the claim. Claims 12 and 13 are also objected to as they depend on claim 11. Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee et al (USPGPub 20190392743): discloses detecting cracks in a display. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOMINIC E HAWKINS whose telephone number is (571)272-2647. The examiner can normally be reached Monday-Friday 7:30am-5:00pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at (571) 272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DOMINIC E HAWKINS/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Jan 31, 2025
Application Filed
Aug 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+12.1%)
2y 2m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 757 resolved cases by this examiner. Grant probability derived from career allowance rate.

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