That The present application, filed on or after 16 March 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is in response to Applicant’s submission filed on 2 January 2026. THIS ACTION IS NON-FINAL.
In response to the restriction requirement, Applicant’s election without traverse of the instant application in the reply filed on 20 January 2026 is acknowledged.
Status of Claims
Claims 1-28 are pending.
Claims 1-13, 23-27 are withdrawn
Claims 28-29 are cancelled.
Claim 14-22 are rejected under 35 U.S.C. 101 for being directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Claims 16, 18-20 are objected to.
There is no art rejection for claims 14-22.
Claim Objections
Claims 16, 18-20 are objected to because of the following informalities: the term “parallel processing hardware device” not appeared in this claim group. This term is construed to be “parallel processing device”, which appeared in independent claim 14. Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Judicial Exception
Claims 14-22 of the claimed invention are directed to a judicial exception, an abstract idea, without significantly more.
(Independent Claims) With regards to claim 14,
Step 1: The claim recites a process, which falls into one of the statutory categories.
Step 2A – Prong 1: the claim, in part, recites
“…. perform matrix multiplication between the input matrix and a sparse weight matrix to generate an output matrix, wherein the sparse weight matrix has size Mx K, the input matrix has size K x N, and the output matrix has size Mx N … for each row of the M rows of the output matrix, determining a plurality of tiles that each include one or more elements from the row;
assigning, for each tile of each row, the tile to a respective one of a plurality of thread blocks …;
determining, for each particular tile of each row r of the M rows of the output matrix, a plurality of first values in a plurality of first columns in the input matrix, comprising:
for each element in the particular tile:
identifying a position i of the element in the row r of the output matrix, and
identifying a first column that is the ith column of the input matrix;
and for each non-zero element in the particular row in the sparse weight matrix:
identifying a position j of the non-zero element in the row r of the sparse weight matrix, and
identifying a first value in each first column of the input matrix that is in position j in the first column; and
…. to compute, for each particular tile of each particular row r of the M rows of the output matrix, respective values for each element in the particular tile …, the computing comprising:
multiplying, for each first column corresponding to the particular tile, i) a vector of the first values in the first column and ii) a vector of the non-zero elements of the particular row r in the sparse weight matrix… (mental process and/or math concept), as drafted, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, other than reciting generic computer elements, nothing in the claim element precludes the step from practically being performed in the mind. For example, but for the language about generic computer elements, “perform matrix multiplication”, “determining”, “assigning”, ”identifying”, “to compute”, “multiplying”, in the limitation citied above encompasses identifying / arranging / processing matrix data elements for computation, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Step 2A – Prong 2: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of: (a) generic computer elements (like “parallel processing device to implement / compute …”, “thread blocks of the parallel processing device, wherein each thread block comprises a plurality of warps and each warp of each thread block comprises a plurality of threads”, “using the respective thread block to which the particular tile was assigned”, “using a particular thread of a particular warp of the respective thread block to which the particular tile was assigned”, etc.), which is mere instructions to implement an abstract idea using generic computing device, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)); (b) “… to receive an input matrix”, which is insignificant extra solution activity of pre-solution data gathering (MPEP.2106.05(g)). Accordingly, at Step 2A, prong two, the additional elements individually or in combination do not integrate the judicial exception into a practical application. The claim is directed to an abstract idea.
Step 2B Analysis: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above, the additional element of generic computer element merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). The additional element of “… to receive an input matrix” is insignificant extra solution activity of pre-solution data gathering (MPEP.2106.05(g)). The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory"). Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception. The claim is not patent eligible.
(Dependent claims)
Claims 15-22 are dependent on claim 14 and include all the limitations of claim 14. Therefore, claims 15-22 recite the same abstract ideas.
With regards to claim 15, the claim recites further limitation of “wherein each tile of a row is assigned to a different respective one of the plurality of thread blocks”, which is further process of matrix data processing, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Except citing generic computer elements to implement the abstract idea, there is no additional element showing integration into a practical application or adding something significantly more to the abstract idea. The claim is not patent eligible.
With regards to claim 16, the claim recites further limitation of “wherein assigning, for each tile of each row, the tile to a respective one of a plurality of thread blocks …. comprises: assigning a plurality of tiles to a particular thread block, assigning, for each tile of the plurality of tiles assigned to the particular thread block, the tile to a respective one of a plurality of subwarps of a respective one of the warps of the particular thread block”, which encompasses process of identifying / arranging / processing matrix data elements for computation, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas.
The claim recites additional element of “… parallel processing hardware device”, which is mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Accordingly, at Step 2A, prong two, the additional elements individually or in combination do not integrate the judicial exception into a practical application. The claim is directed to an abstract idea. As discussed above, the additional element of “… parallel processing hardware device”, which is mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception. The claim is not patent eligible.
With regards to claim 17, the claim recites further limitation of “wherein the sparse weight matrix is in a compressed sparse row (CSR) format”, which is further process of matrix data processing, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Except citing generic computer elements to implement the abstract idea, there is no additional element showing integration into a practical application or adding something significantly more to the abstract idea. The claim is not patent eligible.
With regards to claim 18, the claim recites further limitations of
“wherein computing, for each particular tile of each particular row r of the M rows of the output matrix, respective values for each element in the particular tile using the respective thread block to which the particular tile was assigned comprises:
loading a row offset of the particular row r in the sparse weight matrix;
calculating a row length of the particular row r in the sparse weight matrix; and
decrementing the row offset to an address that is aligned with a vector width of the parallel processing hardware device, wherein multiplying, for each first column corresponding to the particular tile, i) a vector of the first values in the first column and ii) a vector of the non-zero elements of the particular row r in the sparse weight matrix, using a particular thread of a particular warp of the respective thread block to which the particular tile was assigned comprises: masking non-zero elements from a previous row that is before the particular row r in the sparse weight matrix”, which is further process of matrix data processing, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Except citing generic computer elements to implement the abstract idea, there is no additional element showing integration into a practical application or adding something significantly more to the abstract idea. The claim is not patent eligible.
With regards to claim 19, the claim recites further limitation of
“wherein: … assigning, for each tile of each row, the tile to a respective one of a plurality of thread blocks … comprises:
assigning the tiles so that each streaming multiprocessor of the plurality of streaming multiprocessors of the parallel processing hardware device processes approximately a same number of non-zero elements of the sparse weight matrix”, which encompasses process of identifying / arranging / processing matrix data elements for computation, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas.
The claim recites additional element of “each thread block is processed by a respective streaming multiprocessor of a plurality of streaming multiprocessors of the parallel processing hardware device”, “… parallel processing hardware device”, which is mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Accordingly, at Step 2A - Prong two, the additional elements individually or in combination do not integrate the judicial exception into a practical application. The claim is directed to an abstract idea.
As discussed above, the additional element of “each thread block is processed by a respective streaming multiprocessor of a plurality of streaming multiprocessors of the parallel processing hardware device”, “… parallel processing hardware device”, which is mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception. The claim is not patent eligible.
With regards to claim 20, the claim recites further limitation of “wherein assigning the tiles so that each streaming multiprocessor of the plurality of streaming multiprocessors of the parallel processing hardware device processes approximately a same number of non-zero elements of the sparse matrix comprises: sorting the tiles according to the number of non-zero elements of the row of the sparse matrix corresponding to the tiles; and assigning each tile to a respective thread block in a snake pattern”, which is further process of matrix data processing, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Except citing generic computer elements to implement the abstract idea, there is no additional element showing integration into a practical application or adding something significantly more to the abstract idea. The claim is not patent eligible.
With regards to claim 21, the claim recites further limitation of “… approximating, for each tile, an amount of work required to compute values for the tile; generating a plurality of groups of tiles according to the approximated amounts of work; and assigning, for each group of tiles, each tile in the group to the same thread block”, which is further process of matrix data processing, which is based on observation, evaluation, judgement, and/or opinion, that could be performed by human using paper / pen / calculator. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Except citing generic computer elements to implement the abstract idea, there is no additional element showing integration into a practical application or adding something significantly more to the abstract idea. The claim is not patent eligible.
With regards to claim 22, the claim recites additional element of: (a) “causing parallel processing device to …”, which is mere instructions to implement an abstract idea using generic computing device, or merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)) ; (b) “… to obtain values for a plurality non-zero elements in each of a plurality of rows of the sparse matrix using a single vector memory instruction”, these steps are recited at a high level of generality and amounts to extra-solution activity of pre-solution data gathering (MPEP.2106.05(g)). Accordingly, at Step 2A, prong two, the additional elements individually or in combination do not integrate the judicial exception into a practical application. The claim is directed to an abstract idea.
As discussed above, the additional element of the additional element of generic computer element merely uses a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). The additional element of “… to obtain values for a plurality non-zero elements in each of a plurality of rows of the sparse matrix using a single vector memory instruction”, is insignificant extra solution activity of pre-solution data gathering (MPEP 2106.05(g)). The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory"). Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception. The claim is not patent eligible.
Allowable Subject Matter Analysis
Claims 14-22 include allowable subject matter since when reading the claims in light of the specification, as per, MPEP §2111.01 or Toro Co. v. White Consolidated Industries Inc., 199F.3d 1295, 1301, 53 USPQ2d 1065, 1069, 1069 (Fed.Cir. 1999), none of the references of record alone or in combination disclose or suggest the combination of limitations specified in claims 14-22.
In interpreting the claims, in light of the specification filed on 8 July 2022, the Examiner finds the claimed invention to be patentably distinct from the prior arts of record.
Regarding the amended independent claims, the primary reason for the allowance is the inclusion of the specific claimed process & structure of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
None of the cited prior art references, singly or in combination, fully teaches all limitations of independent claim 14.
Regarding the dependent claims, which include all the limitations of the independent claims, are also allowed.
The followings are references close to the invention claimed:
Daga et al., US-PATENT NO.9697176B2 [hereafter Daga] teaches efficient processing of sparse matrix multiplication on GPUs. However Daga does not teach the specific claimed process of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
Maiyuran et al., US-PATENT NO.11204977B2 [hereafter Maiyuran] teaches efficient sparse matrix multiplication on systolic arrays. However Daga does not teach the specific claimed process of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
Young et al., US-PATENT NO.11829321B2 [hereafter Young] teaches parallel processing on systolic arrays. However Young does not teach the specific claimed process of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
Prabhakar et al., US-PATENT NO.12248788B2 [hereafter Prabhakar] teaches data partitioning for distributed processing. However Prabhakar does not teach the specific claimed process of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
Hong et al., “Efficient sparse-matrix multi-vector product on GPUs”, HPDC’18, June 11-15, 2018 [hereafter Hong] teaches multi-vector product for sparse matrix using GPUs. However Hong does not teach the specific claimed process of identifying and partitioning matrix elements & indexing schemes to process the sparse matrixes in multiple processes.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TSU-CHANG LEE whose telephone number is 571-272-3567. The fax number is 571-273-3567.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Omar Fernandez Rivas, can be reached 571-272-2589.
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/TSU-CHANG LEE/
Primary Examiner, Art Unit 2128
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