Prosecution Insights
Last updated: May 29, 2026
Application No. 17/794,034

SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS

Non-Final OA §102§103
Filed
Jul 20, 2022
Priority
Feb 03, 2020 — JP 2020-016454 +1 more
Examiner
YASMEEN, NISHATH
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
4 (Non-Final)
77%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
362 granted / 471 resolved
+8.9% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
17 currently pending
Career history
488
Total Applications
across all art units

Statute-Specific Performance

§103
89.5%
+49.5% vs TC avg
§102
7.4%
-32.6% vs TC avg
§112
2.5%
-37.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 471 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on 7/20/22, 8/2/22, 7/31/23, 9/16/25 are being considered by the examiner. Status of Claims This office action is in response to “Claims filed on 1/8/2026”. Applicant's amendments of claims 1, 7; cancellation of claims 4 and 10 with the same reply have been entered by the Examiner. Upon entry of the amendments, claims 1-3, 5-9, 11-12 are pending wherein claims 1 and 7 are independent. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Note applicable to all claims being rejected in this Office action: Examiner notes that the limitations "overlap", "layer", "portion" “adjacent” are being interpreted broadly in accordance with MPEP. Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification. The claim presently discloses a structural limitation (i.e. overlap, layer, portion, contact) that is taught by prior art of record, therefore, the limitation is considered met by the prior art of record. Additionally, Merriam Webster dictionary defines the above limitations as “to occupy the same area in part”, “one thickness lying over or under another”, “an often limited part of a whole” “near by” respectively. Further note the limitation “contact” is being interpreted to include "direct contact" (no intermediate materials, elements or space disposed there between) and "indirect contact" (intermediate materials, elements or space disposed there between). Claim(s) 1-3, 6-9, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo et al (US 2018/0152644 A1 hereinafter Kondo) in view of Dote, Aki (US 2018/0366445 A1 hereinafter Dote). Regarding Claim 1, Kondo discloses in Figs 1-3B, 15: A solid-state imaging device comprising: a light-receiving substrate (11) including a plurality of light-receiving circuits provided with photoelectric conversion elements (PD12a, b); a circuit board (12) that is directly bonded to and entirely in contact (indirect contact – see note above for interpretation of “contact”) with the light-receiving substrate and includes a plurality of address event detection circuits that detect individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits, wherein at least some of the photoelectric conversion elements that output voltages to the address event detection circuits are directly adjacent (note that adjacent is being interpreted broadly to mean “nearby” as seen in note above and hence directly adjacent is interpreted to mean to other of the photoelectric conversion elements that output voltages to the address event detection circuits; and a plurality of first connections (13 between solder bumps and a pad as shown in Fig 1) provided at a joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the address event detection circuits corresponding to each other [0039-0041]. Additionally, Examiner notes that the limitations “that detects individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits” and “that output voltages to the address event detection circuits” recite functional/operational characteristics of the device. According to Section 2114 of the MPEP, "While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429,1431-32 (Fed. Cir. 1997) (The absence of a disclosure in a prior art reference relating to function did not defeat the Board’s finding of anticipation of claimed apparatus because the limitations at issue were found to be inherent in the prior art reference); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original)". Moreover, according to Section 2112.III of the MPEP, "Where applicant claims a composition in terms of a function, property or characteristic and the composition of the prior art is the same as that of the claim but the function is not explicitly disclosed by the refe2111rence, the examiner may make a rejection under both 35 U.S.C. 102 and 103, expressed as a 102/103 rejection. “There is nothing inconsistent in concurrent rejections for obviousness under 35 U.S.C. 103 and for anticipation under 35 U.S.C. 102.” In re Best, 562 F.2d 1252, 1255 n.4, 195 USPQ 430, 433 n.4 (CCPA 1977). This same rationale should also apply to product, apparatus, and process claims claimed in terms of function, property or characteristic. Therefore, a 35 U.S.C. 102/103 rejection is appropriate for these types of claims as well as for composition claims {underlined for emphasis}." Kondo does not disclose: wherein at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein at least one of the plurality of first connections includes a first pad of a first material of the first substrate that is directly bonded to a second pad of the first material of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. `Regarding Claim 2, Kondo and Dote disclose: The solid-state imaging device according to claim 1, Kondo discloses in Figs 1-3B, 15 wherein the plurality of first connections is located between the plurality of light-receiving circuits and the plurality of address event detection circuits corresponding to each other [0049-0051]. Regarding Claim 3, Kondo and Dote disclose: The solid-state imaging device according to claim 1. Kondo does not disclose: wherein the first pad is formed at a bonding plane of the light-receiving substrate and the second pad is formed at a bonding plane of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein the first pad is formed at a bonding plane of the first substrate and the second pad is formed at a bonding plane of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that the first pad is formed at a bonding plane of the light-receiving substrate and the second pad is formed at a bonding plane of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. Regarding Claim 6, Kondo and Dote disclose: The solid-state imaging device according to claim 1, Kondo discloses in Figs 1-3B, 15: further comprising: a plurality of third connections (13) provided at the joint between the light-receiving substrate (11) and the circuit board to (12) connect the photoelectric conversion elements (PD) and a power supply voltage (VDD), wherein at least one of the plurality of third connections is shared by two or more of the photoelectric conversion elements (PD). Examiner notes that since the plurality of connections as seen in Figs 1, 3A and 3B along with the photoelectric conversion elements and the power supply voltage belong to the same display circuit (see Fig 3B) and since the pixels are interconnected, the atleast one of the plurality of third connections are shared by the photoelectric conversion elements [0057]. Regarding Claim 7, Kondo discloses in Figs 1-3, 15: An imaging apparatus comprising: a lens [0103, 0138]; a solid-state imaging device (1); and circuitry configured to control the solid-state imaging device [0043], wherein the solid-state imaging device includes a light-receiving substrate (11) including a plurality of light-receiving circuits provided with photoelectric conversion elements; a circuit board (12) that is directly bonded to and entirely in contact (indirect contact – see note above for interpretation of “contact”) with the light-receiving substrate and includes a plurality of address event detection circuits that detect individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits, wherein at least some of the photoelectric conversion elements that output voltages to the address event detection circuits are directly adjacent (note that adjacent is being interpreted broadly to mean “nearby” as seen in note above and hence directly adjacent is interpreted to mean to other of the photoelectric conversion elements that output voltages to the address event detection circuits; and a plurality of first connections (13) provided at a joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the address event detection circuits corresponding to each other [0039-0041] and signal processing circuitry configured to perform signal processing on output of the solid-state imaging device [0048]. Kondo does not disclose: wherein at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein at least one of the plurality of first connections includes a first pad of a first material of the first substrate that is directly bonded to a second pad of the first material of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. Regarding Claim 8, Kondo and Dote disclose: The imaging apparatus according to claim 7, Kondo discloses in Figs 1-3, 15: wherein the plurality of first connections is located between the plurality of light-receiving circuits and the plurality of address event detection circuits corresponding to each other [0049-0051]. Regarding Claim 9, Kondo and Dote disclose: The solid-state imaging device according to claim 7. Kondo does not disclose: wherein the first pad is formed at a bonding plane of the light-receiving substrate and the second pad is formed at a bonding plane of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein the first pad is formed at a bonding plane of the first substrate and the second pad is formed at a bonding plane of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that the first pad is formed at a bonding plane of the light-receiving substrate and the second pad is formed at a bonding plane of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. Regarding Claim 12, Kondo and Dote disclose: The imaging apparatus according to claim 7, Kondo discloses in Figs 1-3B, 15 further comprising: a plurality of third connections (13) provided at the joint between the light-receiving substrate (11) and the circuit board to (12) connect the photoelectric conversion elements (PD) and a power supply voltage (VDD), wherein at least one of the plurality of third connections being shared by two or more of the photoelectric conversion elements (PD). Examiner notes that since the plurality of connections as seen in Figs 1, 3A and 3B along with the photoelectric conversion elements and the power supply voltage belong to the same display circuit (see Fig 3B) and since the pixels are interconnected, the atleast one of the plurality of third connections are shared by the photoelectric conversion elements [0057]. Claim(s) 5 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo et al (US 2018/0152644 A1 hereinafter Kondo) in view of Dote, Aki (US 2018/0366445 A1 hereinafter Dote) and further in view of Otani et al (US 2017/0111547 A1 hereinafter Otani). Regarding Claim 5, Kondo and Dote disclose: The solid-state imaging device according to claim 1. Kondo and Dote do not disclose: wherein the circuit board further includes a plurality of gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits, and the solid-state imaging device further comprises a plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other. However, Otani in a similar device discloses a gradation acquisition circuit that relives the unevenness in density in the image sensor [0112, 0056]. Examiner notes that the combined device of Kondo and Otani would have the gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits. Additionally, the plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other. Examiner notes that since the plurality of connections as seen in Figs 1, 3A and 3B of Kondo along with the photoelectric conversion elements and the light receiving circuits belong to the same display circuit (see Fig 3B) and since the pixels are electrically interconnected. References Kondo, Dote and Otani are analogous art because they both are directed to image sensor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo and Dote with the specified features of Otani because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo, Dote and Otani so that the circuit board further includes a plurality of gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits, and the solid-state imaging device further comprises a plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other as taught by Otani in Kondo’s and Dote’s device since, this provides for a image sensor in a printer device with improved unevenness in density within the printing surface. Regarding Claim 11, Kondo and Dote disclose: The imaging apparatus according to claim 7. Kondo and Dote do not disclose: wherein the circuit board further includes a plurality of gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits, and the solid-state imaging device further comprises a plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other. However, Otani in a similar device discloses a gradation acquisition circuit that relives the unevenness in density in the image sensor [0112, 0056]. Examiner notes that the combined device of Kondo, Dote and Otani would have the gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits. Additionally, the plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other. Examiner notes that since the plurality of connections as seen in Figs 1, 3A and 3B of Kondo along with the photoelectric conversion elements and the light receiving circuits belong to the same display circuit (see Fig 3B) and since the pixels are electrically interconnected. References Kondo, Dote and Otani are analogous art because they both are directed to image sensor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo and Dote with the specified features of Otani because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo, Dote and Otani so that the circuit board further includes a plurality of gradation acquisition circuits that acquires individual gradations in light incident on the photoelectric conversion elements of the plurality of light-receiving circuits, and the solid-state imaging device further comprises a plurality of second connections provided at the joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the gradation acquisition circuits corresponding to each other as taught by Otani in Kondo’s and Dote’s device since, this provides for a image sensor in a printer device with improved unevenness in density within the printing surface. Claim(s) 1, 7 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo et al Fig 11 (US 2018/0152644 A1 hereinafter Kondo11) in view of Dote, Aki (US 2018/0366445 A1 hereinafter Dote). Regarding Claim 1, Kondo11 discloses in Figs 1-3B, 11: A solid-state imaging device comprising: a light-receiving substrate (11) including a plurality of light-receiving circuits provided with photoelectric conversion elements (PD12a, b); a circuit board (12) that is directly bonded to and entirely in contact with the light-receiving substrate (11) and includes a plurality of address event detection circuits that detect individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits, wherein at least some of the photoelectric conversion elements that output voltages to the address event detection circuits are directly adjacent (note that adjacent is being interpreted broadly to mean “nearby” as seen in note above and hence directly adjacent is interpreted to mean to other of the photoelectric conversion elements that output voltages to the address event detection circuits; and a plurality of first connections (13 between solder bumps and a pad as shown in Fig 1) provided at a joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the address event detection circuits corresponding to each other [0039-0041]. Additionally, Examiner notes that the limitations “that detects individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits” and “that output voltages to the address event detection circuits” recite functional/operational characteristics of the device. According to Section 2114 of the MPEP, "While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429,1431-32 (Fed. Cir. 1997) (The absence of a disclosure in a prior art reference relating to function did not defeat the Board’s finding of anticipation of claimed apparatus because the limitations at issue were found to be inherent in the prior art reference); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original)". Moreover, according to Section 2112.III of the MPEP, "Where applicant claims a composition in terms of a function, property or characteristic and the composition of the prior art is the same as that of the claim but the function is not explicitly disclosed by the refe2111rence, the examiner may make a rejection under both 35 U.S.C. 102 and 103, expressed as a 102/103 rejection. “There is nothing inconsistent in concurrent rejections for obviousness under 35 U.S.C. 103 and for anticipation under 35 U.S.C. 102.” In re Best, 562 F.2d 1252, 1255 n.4, 195 USPQ 430, 433 n.4 (CCPA 1977). This same rationale should also apply to product, apparatus, and process claims claimed in terms of function, property or characteristic. Therefore, a 35 U.S.C. 102/103 rejection is appropriate for these types of claims as well as for composition claims {underlined for emphasis}." Kondo does not disclose: wherein at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein at least one of the plurality of first connections includes a first pad of a first material of the first substrate that is directly bonded to a second pad of the first material of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. Regarding Claim 7, Kondo discloses in Figs 1-3, 11: An imaging apparatus comprising: a lens [0103, 0138]; a solid-state imaging device (1); and circuitry configured to control the solid-state imaging device [0043], wherein the solid-state imaging device includes a light-receiving substrate (11) including a plurality of light-receiving circuits provided with photoelectric conversion elements; a circuit board (12) that is directly bonded to and entirely in contact with the light-receiving substrate (11) and includes a plurality of address event detection circuits that detect individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits, wherein at least some of the photoelectric conversion elements that output voltages to the address event detection circuits are directly adjacent (note that adjacent is being interpreted broadly to mean “nearby” as seen in note above and hence directly adjacent is interpreted to mean to other of the photoelectric conversion elements that output voltages to the address event detection circuits; and a plurality of first connections (13) provided at a joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the address event detection circuits corresponding to each other [0039-0041] and signal processing circuitry configured to perform signal processing on output of the solid-state imaging device [0048]. Kondo does not disclose: wherein at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board. However, Dote in a similar semiconductor device teaches in Fig 8B and 11B: wherein at least one of the plurality of first connections includes a first pad of a first material of the first substrate that is directly bonded to a second pad of the first material of the second substrate [0070-0071]. References Kondo and Dote are analogous art because they both are directed to packaging of semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Kondo with the specified features of Dote because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Kondo and Dote so that at least one of the plurality of first connections includes a first pad of a first material of the light-receiving substrate that is directly bonded to a second pad of the first material of the circuit board as taught by Dote in Kondo’s device since, hybrid bonding of metal to metal paves way for denser bond pads on a die. Response to Arguments Applicant's arguments filed 1/8/2026 have been fully considered but they are not persuasive. With regards to claims 1 and 7, Applicant argues in para 3 of page 8 that “For example, the Office Action identifies the first substrate 11 of Kondo as corresponding to the claimed light-receiving substrate and the second substrate 12 of Kondo as corresponding to the claimed circuit board (Office Action, p. 3). However, the first substrate 11 of Kondo is not directly bonded to and entirely in contact with the second substrate 12 because they are separated by the connecting parts 13 as illustrated in Fig. 1 of Kondo. Therefore, it is believed that Kondo does not disclose or suggest the amended features of Claim 1.”. In response, the Office respectfully disagrees and as shown in the rejection above, the substrates 11 and 12 as taught by Kondo in Fig 15 are “in contact” since they are indirectly in contact with one another. See Note above for the interpretation of “contact”. Additionally, claims 1 and 7 are also being rejected over Kondo in Fig 11. The substrates 11 and 12 in Fig 11 are in contact with no intervening layers/structures. Hence claims stand rejected over Kondo in view of Dote. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NISHATH YASMEEN whose telephone number is (571)270-7564. The examiner can normally be reached Mon-Fri 9AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NISHATH YASMEEN/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Show 5 earlier events
Oct 21, 2025
Request for Continued Examination
Oct 23, 2025
Response after Non-Final Action
Oct 30, 2025
Non-Final Rejection mailed — §102, §103
Jan 08, 2026
Response Filed
Jan 26, 2026
Final Rejection mailed — §102, §103
Feb 17, 2026
Response after Non-Final Action
May 01, 2026
Request for Continued Examination
May 06, 2026
Response after Non-Final Action

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Prosecution Projections

4-5
Expected OA Rounds
77%
Grant Probability
86%
With Interview (+9.5%)
2y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
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