Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20190172646 and hereinafter Kim ‘646) in view of Kim et al. (US 20140290993 and hereinafter Kim ‘993).
In regards to claim 1, Kim ‘646 discloses a broadband capacitor comprising: a dielectric (110 – FIG. 7; [0031]) having an upper surface, a lower surface, a first side surface (leftward surface of 110 as seen in FIG. 7), a second side surface (rightward surface of 110 as seen in FIG. 7) facing the first side surface, a third side surface, and a fourth side surface facing the third side surface (seen in FIGs. 1-2);
a first external electrode (131 – FIG. 7; [0032]) disposed on the first side surface of the dielectric, and extending to the upper surface, lower surface, third side surface, and fourth side surface of the dielectric (seen in FIGs. 1-2);
a second external electrode (132 – FIG. 7; [0032]) disposed on the second side surface of the dielectric, and extending to the upper surface, lower surface, third side surface, and fourth side surface of the dielectric (seen in FIGs. 1-2);
a laminate (active region of 110 between regions 112 & 113 as seen in FIG. 7 and described in [0033]) disposed inside the dielectric, and having a plurality of electrode units (121 & 122 – FIG. 7; [0034]) laminated;
an upper floating electrode (at least lowermost of upward 126 as seen in present Office Action Figure 1 (POAF1) below, noting the example electrode bolded; [0085]; it is further noted that reference character 126 in FIG. 7 appears to be a typo and should read as 125) disposed inside the dielectric and disposed above the laminate, and overlapping the first external electrode and the second external electrode (seen in FIG. 7);
a lower floating electrode (at least uppermost of downward 125 – POAF1, noting the example electrode bolded; [0085]) disposed inside the dielectric, disposed below the laminate, and overlapping the first external electrode and the second external electrode (seen in FIG. 7);
a first dummy electrode (any of electrodes 128a on different layer than at least lowermost of upward 126 as seen in POAF1, noting an example electrode bolded; [0085]; see also [0072] noting samples with a plurality of dummy electrodes) disposed inside the dielectric and disposed above the laminate, disposed adjacent to the first side surface of the dielectric (seen in POAF1), disposed on a different layer from the upper floating electrode and the plurality of electrode units (seen in POAF1; [0072]), and connected to the first external electrode (seen in POAF1);
a second dummy electrode (any of electrodes 127a on different layer than at least uppermost of downward 125 as seen in POAF1, noting an example electrode bolded; [0085]; see also [0072] noting samples with a plurality of dummy electrodes) disposed inside the dielectric and disposed below the laminate, disposed adjacent to the first side surface of the dielectric (seen in POAF1), disposed on a different layer from the lower floating electrode and the plurality of electrode units (seen in POAF1; [0072]), and connected to the first external electrode (seen in POAF1);
a third dummy electrode (any of electrodes 128b on different layer than any of upward 126 as seen in POAF1, noting an example electrode bolded; [0085]; see also [0072] noting samples with a plurality of dummy electrodes) disposed inside the dielectric and disposed above the laminate, disposed adjacent to the second side surface of the dielectric (seen in POAF1), disposed on a different layer from the upper floating electrode and the plurality of electrode units (seen in POAF1; [0072]), and connected to the second external electrode (seen in POAF1); and
a fourth dummy electrode (any of electrodes 127b on different layer than any of downward 125 as seen in POAF1, noting an example electrode bolded; [0085]; see also [0072] noting samples with a plurality of dummy electrodes) disposed inside the dielectric and disposed below the laminate, disposed adjacent to the second side surface of the dielectric (seen in POAF1), disposed on a different layer from the lower floating electrode and the plurality of electrode units (seen in POAF1; [0072]), and connected to the second external electrode (seen in POAF1),
wherein the upper floating electrode is disposed closer to an electrode set disposed at an uppermost portion of the laminate than to the upper surface of the dielectric, and the lower floating electrode is disposed closer to an electrode set disposed at a lowermost portion of the laminate than to the lower surface of the dielectric (seen in POAF1)
wherein the plurality of electrode units includes: a first electrode set provided with a first main electrode having a first side connected to the first external electrode (seen in FIG. 7); and a second electrode set provided with a second main electrode having a first side connected to the second external electrode (seen in FIG. 7), wherein the laminate is formed by alternately laminating the first electrode set and the second electrode set (seen in FIG. 7), a second side of the first main electrode is spaced apart from the second external electrode, a second side of the second main electrode is spaced apart from the first external electrode, and a part of the first main electrode overlaps a part of the second main electrode to form an overlapping area (seen in FIG. 7), and the upper floating electrode and the lower floating electrode overlap the overlapping area between the first main electrode and the second main electrode (seen in FIG. 7).
Kim ‘646 fails to expressly disclose wherein the first electrode set further includes a first sub-electrode spaced apart from the first main electrode and disposed to face the second side of the first main electrode, and connected to the second external electrode, and the second electrode set further includes a second sub-electrode spaced apart from the second main electrode and disposed to face a second side of the second main electrode, and connected to the first external electrode.
Kim ‘993 teaches wherein the first electrode set further includes a first sub-electrode (respective 123 – FIG. 3; [0092]) spaced apart from the first main electrode and disposed to face the second side of the first main electrode (seen in FIG. 3), and connected to the second external electrode (seen in FIG. 3), and the second electrode set further includes a second sub-electrode (respective 123 – FIG. 3; [0092]) spaced apart from the second main electrode and disposed to face a second side of the second main electrode (seen in FIG. 3), and connected to the first external electrode (seen in FIG. 3).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the first electrode set further includes a first sub-electrode spaced apart from the first main electrode and disposed to face the second side of the first main electrode, and connected to the second external electrode, and the second electrode set further includes a second sub-electrode spaced apart from the second main electrode and disposed to face a second side of the second main electrode, and connected to the first external electrode, as taught by Kim ‘993, in order for the internal electrodes to be effectively protected while having improved cutting precision (Kim ‘993: [0011]).
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Figure 1: Annotated FIG. 7 of Kim ‘646 with examiner’s labels
In regards to claim 8, Kim ‘646 further discloses wherein each of the upper floating electrode and the lower floating electrode have a multi-layer structure, in which a plurality of dielectric sheets on which a plurality of respective floating electrodes are disposed, are laminated (seen in FIG. 7).
In regards to claim 10, Kim ‘646 further discloses wherein each of the first dummy electrode, the second dummy electrode, the third dummy electrode, and the fourth dummy electrode have a multi-layer structure in which a plurality of dielectric sheets on which a plurality of respective dummy electrodes is disposed are laminated (seen in FIG. 7).
Claims 4-7 and 11-15 are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘646 in view of Kim ‘993 and further in view of Berolini et al. (US 20200243261 and hereinafter Berolini ‘261).
In regards to claim 4, Kim ‘646 as modified fails to expressly disclose wherein the first electrode set further includes: a first extension electrode extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the first main electrode, and bent toward the second side of the first main electrode from a position spaced apart from the third side of the first main electrode; and a second extension electrode extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the first main electrode, and bent toward the second side of the first main electrode from a position spaced apart from the fourth side of the first main electrode.
Berolini ‘261 teaches wherein the first electrode set further includes: a first extension electrode (upward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the first main electrode (seen in FIGs. 2A & 2C), and bent toward the second side of the first main electrode from a position spaced apart from the third side of the first main electrode (seen in FIGs. 2A & 2C); and a second extension electrode (downward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the first main electrode (seen in FIGs. 2A & 2C), and bent toward the second side of the first main electrode from a position spaced apart from the fourth side of the first main electrode (seen in FIGs. 2A & 2C).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the first electrode set further includes: a first extension electrode extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the first main electrode, and bent toward the second side of the first main electrode from a position spaced apart from the third side of the first main electrode; and a second extension electrode extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the first main electrode, and bent toward the second side of the first main electrode from a position spaced apart from the fourth side of the first main electrode, as taught by Berolini ‘261, in order to provide a multilayer ceramic capacitor with a low insertion loss across a broad range of frequencies (Berolini ‘261: [0023]).
In regards to claim 5, Kim ‘646 as modified fails to expressly disclose wherein the second electrode set further includes: a third extension electrode extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the second main electrode, and bent toward the second side of the second main electrode from a position spaced apart from the third side of the second main electrode; and a fourth extension electrode extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the second main electrode, and bent toward the second side of the second main electrode from the position spaced apart from the fourth side of the second main electrode.
Berolini ‘261 teaches wherein the second electrode set further includes: a third extension electrode (upward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the second main electrode (seen in FIGs. 2A & 2C), and bent toward the second side of the second main electrode from a position spaced apart from the third side of the second main electrode (seen in FIGs. 2A & 2C); and a fourth extension electrode (downward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the second main electrode (seen in FIGs. 2A & 2C), and bent toward the second side of the second main electrode from the position spaced apart from the fourth side of the second main electrode (seen in FIGs. 2A & 2C).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the second electrode set further includes: a third extension electrode extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending from a position adjacent to the first side of the second main electrode, and bent toward the second side of the second main electrode from a position spaced apart from the third side of the second main electrode; and a fourth extension electrode extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending from the position adjacent to the first side of the second main electrode, and bent toward the second side of the second main electrode from the position spaced apart from the fourth side of the second main electrode, as taught by Berolini ‘261, in order to provide a multilayer ceramic capacitor with a low insertion loss across a broad range of frequencies (Berolini ‘261: [0023]).
In regards to claim 6, Kim ‘646 as modified fails to expressly disclose wherein the first electrode set further includes: a first expansion electrode extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the first main electrode; and a second expansion electrode extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the first main electrode.
Berolini ‘261 teaches wherein the first electrode set further includes: a first expansion electrode (upward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the first main electrode (seen in FIGs. 2A & 2C); and a second expansion electrode (downward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the first main electrode (seen in FIGs. 2A & 2C).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the first electrode set further includes: a first expansion electrode extending from a third side of the first main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the first main electrode; and a second expansion electrode extending from a fourth side of the first main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the first main electrode, as taught by Berolini ‘261, in order to provide a multilayer ceramic capacitor with a low insertion loss across a broad range of frequencies (Berolini ‘261: [0023]).
In regards to claim 7, Kim ‘646 as modified fails to expressly disclose wherein the second electrode set further includes: a third expansion electrode extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the second main electrode; and a fourth expansion electrode extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the second main electrode.
Berolini ‘261 teaches wherein the second electrode set further includes: a third expansion electrode (upward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the second main electrode (seen in FIGs. 2A & 2C); and a fourth expansion electrode (downward extension electrode from central electrode 112 as seen in FIG. 2A) extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the second main electrode (seen in FIGs. 2A & 2C).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the second electrode set further includes: a third expansion electrode extending from a third side of the second main electrode parallel to the third side surface of the dielectric and extending toward the third side surface of the dielectric from a position adjacent to the first side of the second main electrode; and a fourth expansion electrode extending from a fourth side of the second main electrode parallel to the fourth side surface of the dielectric and extending toward the fourth side surface of the dielectric from the position adjacent to the first side of the second main electrode, as taught by Berolini ‘261, in order to provide a multilayer ceramic capacitor with a low insertion loss across a broad range of frequencies (Berolini ‘261: [0023]).
In regards to claim 11, Kim ‘646 as modified further discloses one or more among a first stub electrode (128a – FIG. 7; [0085]) disposed inside the dielectric and disposed above the laminate, disposed adjacent to the first side surface of the dielectric, and connected to the first external electrode (seen in FIG. 7); a second stub electrode (127a – FIG. 7; [0085]) disposed inside the dielectric and disposed below the laminate, disposed adjacent to the first side surface of the dielectric, and connected to the first external electrode (seen in FIG. 7); a third stub electrode (128b – FIG. 7; [0085]) disposed inside the dielectric and disposed above the laminate, disposed adjacent to the second side surface of the dielectric, and connected to the second external electrode (seen in FIG. 7); and a fourth stub electrode (127b – FIG. 7; [0085]) disposed inside the dielectric and disposed below the laminate, disposed adjacent to the second side surface of the dielectric, and connected to the second external electrode (seen in FIG. 7).
Kim ‘646 as modified fails to expressly disclose the first stub electrode formed with two bends, the second stub electrode formed with two bends, the third stub electrode formed with two bends, and the fourth stub electrode formed with two bends.
Berolini ‘261 teaches the first stub electrode formed with two bends, the second stub electrode formed with two bends, the third stub electrode formed with two bends, and the fourth stub electrode formed with two bends (see FIGs. 5 and 6B and [0107]-[0108], noting stub electrodes 312 each having two bends).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the broadband capacitor of modified Kim ‘646 such that the first stub electrode formed with two bends, the second stub electrode formed with two bends, the third stub electrode formed with two bends, and the fourth stub electrode formed with two bends, as taught by Berolini ‘261, in order to provide a multilayer ceramic capacitor with a low insertion loss across a broad range of frequencies (Berolini ‘261: [0023]).
In regards to claim 12, Kim ‘646 as modified further teaches wherein each of the first stub electrode, the second stub electrode, the third stub electrode, and the fourth stub electrode have a multi-layer structure, in which a plurality of dielectric sheets on which a plurality of respective stub electrodes is disposed, are laminated (seen in Kim ‘646: FIG. 7).
In regards to claim 13, Kim ‘646 as modified further teaches wherein in the first stub electrode and the second stub electrode, a first area disposed adjacent to the first side surface of the dielectric, and connected to the first external electrode (seen in Kim ‘646: FIG. 8); a second area (upward and inward facing electrode arms of leftward 312 as seen in Berolini ‘261: FIG. 6B) connected to a first end of the first area disposed to face the third side surface of the dielectric (seen in FIG. 6B); and a third area (downward and inward facing electrode arms of leftward 312 as seen in FIG. 6B) connected to a second end of the first area disposed to face the fourth side surface of the dielectric are defined (Berolini ‘261: 312 – FIG. 6B; [0109]) (seen in FIG. 6B).
In regards to claim 14, Kim ‘646 as modified further teaches wherein in the third stub electrode and the fourth stub electrode, a first area disposed adjacent to the second side surface of the dielectric, and connected to the second external electrode (seen in Kim ‘646: FIG. 8); a second area (downward and inward facing electrode arms of rightward 312 as seen in Berolini ‘261: FIG. 6B) connected to a first end of the first area disposed to face the third side surface of the dielectric; and a third area connected to a second end of the first area disposed to face the fourth side surface of the dielectric are defined (Berolini ‘261: 312 – FIG. 6B; [0109]) (seen in FIG. 6B).
In regards to claim 15, Kim ‘646 as modified further teaches wherein the first stub electrode and the third stub electrode are disposed on a first dielectric sheet disposed above the laminate (seen in Kim ‘646: FIG. 7; see also Berolini ‘261: FIG. 5 and [0107]-[0108]), and the second stub electrode and the fourth stub electrode are disposed on a second dielectric sheet disposed below the laminate (seen in Kim ‘646: FIG. 7; see also Berolini ‘261: FIG. 5 and [0107]-[0108]).
Response to Arguments
Applicant's arguments filed 06 April 2026 have been fully considered but they are not persuasive.
In response to Applicant’s argument that there is no motivation to combine Kim ‘646 and Kim ‘993, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, the provided combination allows the internal electrodes of Kim ‘646 to be effectively protected while having improved cutting precision (Kim ‘993: [0011]).
In response to Applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “controlling the performance of a broadband capacitor”, and “tuning electrical characteristics”) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). The claims simply recite the positional relationships and structural connections of the internal and external electrodes in the capacitor. Since the cited references disclose the claimed structural limitations, they are considered to read on the claims.
As such Applicant’s arguments are unpersuasive and the rejection is maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy J Dole whose telephone number is (571)272-2229. The examiner can normally be reached M-F 6:30am-2:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Wellington can be reached at (571)272-4483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
Prosecution Insights