DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the Application filed on 05/31/2022. Claims 1-23 are pending in the case. All claims are examined and rejected accordingly.
Information Disclosure Statement
As required by MPEP 609 (c), the Applicants’ submission of the Information Disclosure Statement(s) filed on 02/06/2025 is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending.
Claim Rejections - 35 USC § 101
4. 35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Regarding Claim 17-23
Claims 17-23 are rejected under 35 U.S.C. 101 because claims 18-20 are directed to a “A computer readable storage medium” which is defined in the specification in para. [0006] as “The medium can contain instructions that, when executed by the at least one processor, cause the system to perform operations….”. Waves, and signals can contain executable instruction, hence non-statutory. Examiner also note that there is an open ended definition for a non-transitory computer-readable storage medium including instructions in para. [0055) as “… Common forms of non-transitory media include, for example, a floppy disk, a flexible disk …” that could be non-transitory medium or transitory medium. Examiner recommends that the claims be amended to “non-transitory computer readable storage medium” in order to overcome these 101 rejections.
Appropriate correction is required.
Examiner Comments
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claims 1-23 are rejected under 35 U.S.C. 103 as being unpatentable over Castrillo (Pub. No. US 20220230087 B1, Pub. Date 2022-07-21 ) in view of Aaronson (NPL: Title: Improved simulation of stabilizer circuits (Received 25 June 2004; published 30 November 2004)
Castrillo teaches a method of benchmarking a quantum device (see Castrillo: Fig.1, [0041] illustrating system for benchmarking quantum computing hardware.”), comprising:
selecting a sequence of M quantum gates from a group of quantum gates according to a probability distribution (see Castrillo: Fig.1, [0050], “a random quantum circuit of depth d (M quantum gates), the random quantum circuit generator 110 is configured to randomly sample single qubit gates from a predefined set of single qubit gates, e.g., a set of single qubit gates that can be implemented by quantum hardware 120.”), the quantum gates in the group being capable of [… ] classical simulation (see Castrillo: Fig.1, [0072], “The action of a selected observable O.sub.U=Σ.sub.zO.sub.U(z)|zcustom-charactercustom-characterz| maps each bit string or measurement outcome z to a real value O.sub.U(z). Each value O.sub.U(z) depends on the random circuit U, and the calculation of experimental values {O.sub.U(z.sub.j)} requires classical simulations of U, e.g., for a linear cross entropy observable Np.sub.U(z) where p.sub.U(z)=|custom-characterz|U|Ocustom-character.sup.2 if the initial state is |Ocustom-character, calculating the value p.sub.U(z.sub.j)=|custom-characterz.sub.j|U|Ocustom-character|.sup.2 for a specific bit string z.sub.j measured in an experiment requires a simulation of U. For a set of M measurement results {z.sub.j}”
obtaining an outcome value by applying the sequence of M quantum gates to N qubits of a quantum computing device (see Castrillo: Fig.1, [0046], “The classical processor 102 receives as input data 106 representing a quantum logic gate or quantum circuit to be benchmarked. For example, the input data 106 may include data representing an n-qubit quantum logic gate that the quantum computing hardware 104 is configured to implement. The input data 106 may also specify a type of observable to use when benchmarking the quantum logic gate or quantum circuit. Example observables are described in detail below with reference to FIGS. 2 and 3.”);
obtaining, by [… ] classical simulation, a probability of obtaining the outcome value given the application of the selected sequence of M quantum gates (see Castrillo: Fig.4, [0101], “The system performs statistical tests using the calculated distribution of random variables associated with the selected observable to obtain additional statistical information about the quantum circuit (step 404). For example, the system can validate fidelities estimated using process 200 or 300 by performing a Kolmogorov-Smirnov test using experimental data, e.g., data obtained based on Equation (6), to reject the null hypothesis that the fidelity estimates are 0. As another example, the system can determine a Kolmogorov-Smirnov p-value for the cumulative distribution function of the experimental data given the estimate of the fidelity α. A large Kolmogorov-Smirnov p-value indicates that the assumptions of the model and the estimate of alpha are correct.”)
generating an averaged probability using the obtained probability and second probabilities obtained by applying to the N qubits second sequences of M quantum gates selected from the group (see Castrillo: Fig.2: [0095], “The system determines the estimate of the fidelity {circumflex over (α)} of the random quantum circuit U using the determined estimate {circumflex over (R)}.sub.U, {circumflex over (V)}.sub.U and {circumflex over (N)}.sub.U. That is, the system solves for {circumflex over (α)} in Equation (14) using {circumflex over (R)}.sub.U, {circumflex over (V)}.sub.U and {circumflex over (N)}.sub.U. The system can then determine an average of the determined estimates for each random quantum circuit to obtain an estimate of circuit fidelity at the circuit depth d and number of qubits n.” … see also [0097] describing “system may further determine one or more properties of the random quantum circuit using individual estimations of the fidelity of a random quantum circuit {circumflex over (α)}, an average estimate of fidelity and/or additional information about the random quantum circuit obtained using the example process 400 described below with reference to FIG. 4.”); and
providing a fidelity benchmark for the M quantum gates based at least in part on the obtained probability (see Castrillo: Fig.6, [0090], “The system determines an estimate of the fidelity {circumflex over (α)} for each defined random quantum circuit (step 306). The system estimates the fidelity {circumflex over (α)} for a respective random quantum circuit by solving Equation (12) for the random quantum circuit. That is, the system estimates the expectation value Trρ.sub.UO.sub.U (left hand side of Equation 12) of the selected observable O.sub.U with respect to the output ρ.sub.U of an experimental implementation of the random quantum circuit.”)
Castrillo does not teach a method of benchmarking a quantum device comprising:
the quantum gates in the group being capable of polynomial-time classical simulation and
obtaining, by polynomial-time classical simulation, a probability of obtaining the outcome value.
However, Aaronson teaches a method of benchmarking a quantum device comprising:
the quantum gates in the group being capable of polynomial-time classical simulation ( see Aaronson: Pg.1, Section 1: stating:
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obtaining, by polynomial-time classical simulation, a probability of obtaining the outcome value (see Aaronson: Pg.3, Section III stating:
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Because both Castrillo and Aaronson are in the same/similar field of quantum computing, accordingly, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the invention, to modify the random circuit benchmarking method of Castrillo to include the randomly selected gate sequence to Clifford dates and to obtain the outcome probabilities using the polynomial time classical stabilizer simulation technique as taught by Aaronson. One would have been motivated to make such a combination in order to provide improved benchmarking process faster scalable and traceable without affection the fidelity models and results.
Regarding Claim 2,
As shown above, Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the method wherein:
providing the fidelity benchmark comprises: dividing by M a function of the averaged probability, the quotient being the fidelity benchmark (see Castrillo: Fig.2, [0075], “The system processes the estimated polarization parameter values p.sup.d to obtain an estimate of the value of the polarization parameter p of Equation (1) (step 208). For example, the system can fit the estimates p.sup.d for different depths d as an exponential decay in d and extrapolate to obtain an estimate of p for d=1. Fitting the estimates this way distinguishes the polarization parameter p for the single application of the quantum circuit from state preparation and measurement errors (SPAM). More explicitly, SPAM errors can be modeled as a constant depolarizing fidelity S, independent of d, and fitting the exponential decay of Sp.sup.d as a function of d enables the system to fit p independently of the SPAM errors.”)
Regarding Claim 3,
As shown above Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the method wherein:
providing the fidelity benchmark comprises: determining, based in part on the averaged probability, a fidelity function, an exponential decay coefficient of the fidelity function being the fidelity benchmark (see Castrillo: Fig.2, [0076], “The system can use the estimate of p for d=1 (the polarization per cycle) to determine the fidelity of the individual gate G.sub.n. For example, the system can obtain an estimate of the polarization p.sub.1,n for a single qubit gate in a circuit with n qubits from previous randomized benchmarking or cross-entropy benchmarking experiments. The system can then estimate a polarization per cycle p.sub.n for the gate G.sub.n as p/p.sub.1,n.sup.n. This polarization per cycle p.sub.n can be converted into a measure of fidelity for the gate G.sub.n using F=p.sub.n+(1−p.sub.n)/D, where D=2.sup.n represents the Hilbert space dimension.”)
Regarding Claim 4,
As shown above, Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the method wherein:
the group of quantum gates comprises a group of Clifford gates (see Aaronson: Pg.3, Section III stating [0070], We call a stabilizer circuit unitary if it does not contain measurement gates. Unitary stabilizer circuits are also known as Clifford group circuits.”
See motivation to combine in Claim 1
Regarding Claim 5,
As shown above, Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the method wherein:
the N qubits comprise superconducting circuit, trapped ion, or photonic qubits (see Castrillo: Fig.1, [0043], “The quantum computing hardware 104 includes components for performing quantum computations using quantum circuits. For example, the quantum computing hardware 104 includes a quantum system 120 and control devices 122. The quantum system 120 includes one or more multi-level quantum subsystems, e.g., qubits, that are used to perform algorithmic operations or quantum computations.”)
Regarding Claim 6,
As shown above, Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the system comprising :
N is greater than 100 (see Castrillo: Fig.1, [0031], “In addition, the presently described techniques are not restricted to particular observables, e.g., cross entropy observables, but can be applied in conjunction with different observables that can provide more accurate estimates of fidelity for a particular quantum circuit. In addition, the presently described techniques are applicable to any quantum logic gates and is not restricted to Clifford gates. In addition, the presently described techniques provide increased scalability, e.g., to 40 qubits or beyond.”)
Regarding Claim 7,
As shown above Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the system comprising :
M is greater than 20 (see Castrillo: Fig.1, [0075], “The system can fit the estimates p.sup.d for different depths d as an exponential decay in d and extrapolate to obtain an estimate of p for d=1. Fitting the estimates this way distinguishes the polarization parameter p for the single application of the quantum circuit from state preparation and measurement errors (SPAM). More explicitly, SPAM errors can be modeled as a constant depolarizing fidelity S, independent of d, and fitting the exponential decay of Sp.sup.d as a function of d enables the system to fit p independently of the SPAM errors.”)
Regarding Claim 8,
As shown above Castrillo and Aaronson and teaches all the limitations of claim 1. Castrillo further teaches the system comprising :
the N qubits comprise a transmon or fluxonium qubit (see Castrillo: Fig.1, [0043], “quantum computing hardware 104 includes and how they interact with one another is dependent on a variety of factors including the type of quantum computations that the quantum computing hardware is performing. For example, the multi-level quantum subsystems may include qubits that are realized via atomic, molecular or solid-state quantum systems. In other examples the qubits may include, but are not limited to, superconducting qubits or semi-conducting qubits.”)
Regarding independent Claim 9 and Claim 17,
Claim 9 is directed to a system claim and Claim 17 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 1 and are rejected under same rationale respectively.
Regarding claim 10 and 18,
Claim 10 is directed to a system claim and Claim 18 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 2 and are rejected under same rationale respectively.
Regarding Claim 11 and 19,
Claim 11 is directed to a system claim and Claim 19 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 3 and are rejected under same rationale respectively.
Regarding Claim 12 and 20,
Claim 12 is directed to a system claim and Claim 20 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 4 and are rejected under same rationale respectively.
Regarding Claim 13 and 21,
Claim 13 is directed to a system claim and Claim 21is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 5 and are rejected under same rationale respectively.
Regarding Claim 14 and 22,
Claim 14 is directed to a system claim and Claim 22 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 6/7 and are rejected under same rationale respectively.
Regarding Claim 15 and 22,
Claim 15 is directed to a system claim and Claim 22 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 6/7 and are rejected under same rationale respectively.
Regarding Claim 16 and 23,
Claim 16 is directed to a system claim and Claim 23 is directed to computer readable medium claim and the claims have similar/same claim limitation as Claim 8 and are rejected under same rationale respectively.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
PGPUB
NUMBER:
INVENTOR-INFORMATION:
TITLE / DESCRIPTION
US 20190354857 A1
Sallee; Philip A.
Title: BAYESIAN QUANTUM CIRCUIT FIDELITY ESTIMATION
Description: systems and apparatus for estimating the fidelity of a quantum computing system. In one aspect, a method includes defining one or more random quantum circuits, wherein a noisy experimental implementation of each random quantum circuit is approximated by a depolarizing channel with respective polarization parameter
US 20230274177A1
Endres; Manuel
Title: ESTIMATING THE FIDELITY OF QUANTUM LOGIC GATES AND QUANTUM CIRCUITS
Description: a method for method for estimating the fidelity of a quantum computing system, the method comprising: defining one or more random quantum circuits, wherein a noisy experimental implementation of each random quantum circuit is approximated by a depolarizing channel with respective polarization parameter;
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/Zelalem Shalu/Examiner, Art Unit 2145
/CESAR B PAULA/Supervisory Patent Examiner, Art Unit 2145