Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 2-4 and 10-11 have been canceled. Claims 1, 5-9, and 12-15 are pending. Claims 1, 5-9, and 12-15 have been examined and rejected.
Response to Arguments
The 35 USC 112(b) rejections of claims 2-8 have been withdrawn in light of amendments and explanations by the Applicant, see p. 10 ¶ 4.
Applicant's arguments filed 10/24/2025 regarding the 35 USC 101 rejections of claims 1-15, see pp. 8-10, have been fully considered but they are not persuasive.
The Applicant argues, see p. 9 ¶ 3, that amendments “wherein the information of the correct output waveform … at each time point” in the first limitation and “wherein the to-be-detected chip is a dynamic random access memory (DRAM)” in first and second limitations, respectively, define the method performed for a physical DRAM involving tangible operation and presentation, which make claim 1 not directed to mental process. The Examiner respectfully disagrees. Limitation “wherein the information of the correct output waveform … at each time point” further limits limitation “obtaining an excitation file … waveform of a to-be-detected signal,” which is determined to be insignificant extra-solution activity, data gathering; hence, the whole limitation is insignificant extra-solution activity, data gathering. Limitation “wherein the to-be-detected chip is a dynamic random access memory (DRAM)” also further limits limitation “simulating a to-be-detected … a simulated waveform of the to-be-detected signal,” which is determined to be a well-understood, routine in step 2B analysis; hence the whole limitation is a well-understood, routine.
The Applicant, furthermore, argues, see p. 9 ¶ 4, that the amendments as listed in this paragraph provide a detection method performing voltage-specific detection on a DRAM and subsequently displaying the detection results to user, so the amended claim 1 constitutes a practical application. The Examiner respectfully disagrees. These amendments as discussed above are only insignificant extra-solution activity and well-understood, routine.
Claim 1, hence, remains rejected under 35 USC 101.
The Applicant argues that claim 9 is eligible for the same arguments as those in claim 1. Since claim 1 remains rejected, so does claim 9.
Other claims depending on claims 1 and 9, respectively, also remain rejected.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 5-9, and 12-15 are rejected under 35 USC 101 for being directed to abstract ideas.
Claim 1 is a method claim and recites:
A signal detection method, comprising:
obtaining an excitation file, wherein the excitation file comprises information of a correct output waveform of a to-be-detected signal; wherein the information of the correct output waveform of the to-be-detected signal includes a voltage value or a logic voltage value that the to-be-detected signal should have at each time point; (insignificant extra-solution activity, data gathering MPEP 2106.05(g))
simulating a to-be-detected chip by using a specified emulator, to generate a simulation file, wherein the simulation file comprises information of a simulated waveform of the to-be-detected signal; wherein the to-be-detected chip is a dynamic random access memory (DRAM); (see Step 2B)
filtering out noise in the simulated waveform to obtain a to-be-compared file, wherein the to-be-compared file comprises information of a valid simulated waveform of the to-be-detected signal; and (mental processes can be done by pen and paper, math operations)
comparing the to-be-compared file with the excitation file to generate a detection result file; (mental processes) wherein the detection result file is displayed to a user through a display screen; (insignificant extra-solution activity, outputting data MPEP 2106.05(g))
wherein the simulated waveform comprises a simulated waveform of a data signal and a simulated waveform of a data strobe signal, and the filtering out noise in the simulated waveform to obtain a to-be-compared file comprises:
obtaining a voltage reference line of the data strobe signal, wherein the voltage reference line is a straight line in a same dimension as the simulated waveform of the data strobe signal, and a voltage value corresponding to the voltage reference line is between a maximum voltage value and a minimum voltage value of the data strobe signal; (mental processes by observation)
determining a change point of the data strobe signal based on a point of intersection between the simulated waveform of the data strobe signal and the voltage reference line; and (mental processes by observation)
deleting an invalid change point in the change point of the data strobe signal to obtain the to-be-compared file; (mental processes using pen and paper)
wherein the obtaining a voltage reference line of the data strobe signal comprises:
determining half of a sum of the maximum voltage value and the minimum voltage value of the data strobe signal as a voltage reference value; and (mental processes)
generating the voltage reference line based on the voltage reference value and the simulated waveform of the data strobe signal, wherein the voltage reference line is a straight line that is in the same dimension as the simulated waveform of the data strobe signal and whose corresponding voltage value is equal to the voltage reference value; (mental processes using pen and paper)
wherein the invalid change point comprises one or more of the following change points;
a change point of the data strobe signal in a first time period, wherein in the first time period, the data strobe signal is in a state of not strobing the data signal; and (mental processes by observation)
a point of intersection between a first change of a signal edge of the data strobe signal and the voltage reference line in a second time period, wherein in the second time period, the data strobe signal is in a state of strobing the data signal. (mental processes by observation)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: the claim recites step “simulating a to-be-detected chip by using a specified emulator … a simulated waveform of the to-be-detected signal.” Simulating a chip by using a specified emulator to generate a simulation file” is a well-understood, routine, conventional nature of the additional element, an emulator. For example, Tseng (US 2002/0152060) teaches using an emulator to perform simulation to produce a simulated waveform, see ¶ 0213, 0233. Yeh et al. (US 2010/0241414) also teaches using an emulator to perform simulation to produce a simulated output, see ¶ 0011, 0039-0041, and 0045.
Claim 5 is a method claim depending on claim 1 and recites:
The signal detection method according to claim 4, wherein the information of the correct output waveform of the to-be-detected signal is a correct logic voltage value of the data signal at each time point, and the comparing the to-be-compared file with the excitation file to generate a detection result file comprises:
calculating an average voltage value of the data signal based on a simulated waveform that is of the data signal and corresponds to adjacent valid change points of the data strobe signal; (math concepts)
converting the average voltage value of the data signal into a logic voltage value; and (mental processes)
comparing the logic voltage value with the correct logic voltage value of the data signal in the excitation file, and obtaining the detection result file. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 6 is a method claim depending on claim 1 and recites:
The signal detection method according to claim 2, before the deleting an invalid change point in the change point of the data strobe signal, the signal detection method further comprises:
checking correctness of the simulated waveform of the data strobe signal. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 7 is a method claim depending on claim 6 and recites:
The signal detection method according to claim 6, wherein the checking correctness of the simulated waveform of the data strobe signal comprises:
obtaining a quantity of correct jumps of the data strobe signal in a data strobe cycle; (mental processes can be done by pen and paper)
calculating a quantity of simulated jumps of the data strobe signal in each data strobe cycle based on the simulated waveform of the data strobe signal; and (mental processes, math operations)
comparing the quantity of simulated jumps of the data strobe signal in the data strobe cycle with the quantity of correct jumps, and generating a check result file of the data strobe signal based on a comparison result. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 8 is a method claim depending on claim 7 and recites:
The signal detection method according to claim 7, wherein the comparing the quantity of simulated jumps of the data strobe signal in the data strobe cycle with the quantity of correct jumps comprises:
when the quantity of simulated jumps of the data strobe signal in the data strobe cycle is the same as the quantity of correct jumps, determining that the simulated waveform of the data strobe signal in the data strobe cycle is normal; or (mental processes)
when the quantity of simulated jumps of the data strobe signal in the data strobe cycle is different from the quantity of correct jumps, determining that the simulated waveform of the data strobe signal in the data strobe cycle is abnormal. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 9 is a method claim and recites:
A signal detection method, comprising:
obtaining an excitation file, wherein the excitation file comprises information of a correct output waveform of a to-be-detected signal; wherein the information of the correct output waveform of the to-be-detected signal includes a voltage value or a logic voltage value that the to-be-detected signal should have at each time point; (insignificant extra-solution activity, data gathering MPEP 2106.05(g))
simulating a to-be-detected chip by using a specified emulator, to generate a simulation file, wherein the simulation file comprises information of a simulated waveform of the to-be-detected signal; wherein the to-be-detected chip is a dynamic random access memory (DRAM);
comparing the correct output waveform with the simulated waveform to obtain a candidate detection result; and (mental processes)
filtering out a result of a noise point in the candidate detection result to generate a detection result file; (mental processes can be done by pen and paper, math operations) wherein the detection result file is displayed to a user through a display screen; (insignificant extra-solution activity, outputting data MPEP 2106.05(g))
wherein the comparing the correct output waveform with the simulated waveform to obtain a candidate detection result comprises:
sampling the correct output waveform and the simulated waveform under a same sampling condition, (mental processes by observation) and comparing voltage values of the correct output waveform and the simulated waveform at each sampling time point; (mental processes)
wherein the same sampling condition comprises a sampling frequency, the sampling frequency is N times a frequency of a clock signal of the chip, and N is greater than or equal to 2. (mental processes by observation)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: the claim recites step “simulating a to-be-detected chip by using a specified emulator … a simulated waveform of the to-be-detected signal.” Simulating a chip by using a specified emulator to generate a simulation file” is a well-understood, routine, conventional nature of the additional element, an emulator. For example, Tseng (US 2002/0152060) teaches using an emulator to perform simulation to produce a simulated waveform, see ¶ 0213, 0233. Yeh et al. (US 2010/0241414) also teaches using an emulator to perform simulation to produce a simulated output, see ¶ 0011, 0039-0041, and 0045.
Claim 12 is a method claim depending on claim 9 and recites:
The signal detection method according to claim 11, wherein the comparing voltage values of the correct output waveform and the simulated waveform at each sampling time point comprises:
when voltage values of the correct output waveform and the simulated waveform at each sampling time point in a half cycle of the clock signal of the chip are not the same, determining that an error occurs on the simulated waveform of the to-be-detected signal in the half cycle of the clock signal of the chip; and (mental processes)
when voltage values of the correct output waveform and the simulated waveform at one or more sampling time points in the half cycle of the clock signal of the chip are the same, determining that no error occurs on the simulated waveform of the to-be-detected signal in the half cycle of the clock signal of the chip. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 13 is a method claim depending on claim 12 and recites:
The signal detection method according to claim 12, wherein the filtering out a result of a noise point in the candidate detection result to generate a detection result file comprises:
when a logic voltage value of at least one sampling time point in the half cycle of the clock signal of the chip is the same, determining another target sampling time point with a different logic voltage value in the half cycle as the noise point; and(mental processes)
filtering out a sampling result of the noise point to generate the detection result file. (mental processes can be done by pen and paper, math operations)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: The claim does not recite and additional element.
Claim 14 is a method claim depending on claim 9 and recites a limitation that further restricts a limitation in claim 9 determined to be part of a well-understood, routine, conventional nature of the additional element, an emulator. The claim does not recite a limitation to integrate a practical application into abstract ideas. The claim does not recite and additional element.
As per claim 15, a signal detection apparatus, configured to executing the signal detection method according to claim 1, comprising:
one or more processors; and
a storage apparatus, configured to store one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to execute operations of:
obtaining an excitation file, wherein the excitation file comprises information of a correct output waveform of a to-be-detected signal; (insignificant extra-solution activity, data gathering MPEP 2106.05(g))
simulating a to-be-detected chip by using a specified emulator, to generate a simulation file, wherein the simulation file comprises information of a simulated waveform of the to-be-detected signal;
filtering out noise in the simulated waveform to obtain a to-be-compared file, wherein the to-be-compared file comprises information of a valid simulated waveform of the to- be-detected signal; and (mental processes can be done by pen and paper, math operations)
comparing the to-be-compared file with the excitation file to generate a detection result file. (mental processes)
Step 2A, prong 1: limitations are grouped into abstract idea categories as indicated above.
Step 2A, prong 2: the claim does not recite a limitation to integrate a practical application into abstract ideas.
Step 2B: the claim recites step “simulating a to-be-detected chip by using a specified emulator … a simulated waveform of the to-be-detected signal.” Simulating a chip by using a specified emulator to generate a simulation file” is a well-understood, routine, conventional nature of the additional element, an emulator. For example, Tseng (US 2002/0152060) teaches using an emulator to perform simulation to produce a simulated waveform, see ¶ 0213, 0233. Yeh et al. (US 2010/0241414) also teaches using an emulator to perform simulation to produce a simulated output, see ¶ 0011, 0039-0041, and 0045. The claim recites additional elements, one or more processors and storage apparatus at generic level (generic computer components), which do not amount significantly more to abstract ideas.
Allowable Subject Matter
Claims 1, 5-9, and 12-15 would be allowable if rewritten to overcome the rejections under 35 U.S.C. 112(b) and 101, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As per claim 1, Yeh, Heinz, Wallace, Textbook, and other cited prior arts either alone or in combination do not teach:
a change point of the data strobe signal in a first time period, wherein in the first time period, the data strobe signal is in a state of not strobing the data signal; and
a point of intersection between a first change of a signal edge of the data strobe signal and the voltage reference line in a second time period, wherein in the second time period, the data strobe signal is in a state of strobing the data signal,
in combination with the other claimed limitations, including the parent claims. Dependent claims 5-8 and 15 are allowed due to their dependency on allowed independent claim 1.
As per claim 9, Yeh, Heinz, Wallace, Textbook, and other cited prior arts either alone or in combination do not teach:
wherein the same sampling condition comprises a sampling frequency, the sampling frequency is N times a frequency of a clock signal of the chip, and N is greater than or equal to 2.
in combination with the other claimed limitations, including the parent claims. Dependent claims 12-14 are allowed due to their dependency on allowed independent claim 9.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Cuong Van Luu whose telephone number is 571-272-8572. The examiner can normally be reached on Monday - Friday from 8:30 to 5:00.
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/CUONG V LUU/Examiner, Art Unit 2189
/REHANA PERVEEN/Supervisory Patent Examiner, Art Unit 2189
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