DETAILED ACTION
Response to Amendment
Claims 1, 7 and 11 are amended.
Claim 5 is cancelled.
Claims 1-4 and 6-13 are pending.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2 and 7-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Imai (EP 3,217,189) in view of Moore (US 2018/0102407).
Regarding Claim 1, Imai teaches a pulse ranging apparatus [0012-17], comprising: an emitting unit, configured to emit an optical pulse signal [#16 of Fig 1; 0016]; a receiving unit, configured to receive a reflected optical pulse signal by an obstacle, and convert the reflected optical pulse signal into an electrical signal [#42 of Fig 1; 0042]; a threshold comparator, configured to compare the electrical signal with a preset threshold, and to generate a pulse trigger signal according to a comparison result [Fig 7; 0057]; a time delay unit, configured to delay the pulse trigger signal by a preset time length to generate a delay trigger signal [Fig 17C; 0084]; a timing unit, configured to determine a time of flight of the optical pulse signal according to an emitting time at which the emitting unit emits the optical pulse signal, a generating time at which the delay trigger signal is generated, and a delay of the preset time length [#42, #45 of Fig 1; Fig 5; 0042; 0048]; and a distance determination unit, configured to determine a distance between the pulse ranging apparatus and the obstacle according to the time of flight of the optical pulse signal [Fig 4B; 0047-48]. Imai does not explicitly teach – but Moore does teach wherein the time delay unit comprises one of following: a first time delay circuit comprising a gate circuit and a first capacitor; a second time delay circuit comprising gate circuits connected in series [Fig 5; 0063]; and a third time delay circuit comprising a second capacitor. It would have been obvious to modify the apparatus of Imai to include a time delay circuit with plural gates in series to allow controlled selection of a delayed pulse control or calibration signal.
Regarding Claim 7, Imai teaches a pulse ranging method, applied to a pulse ranging apparatus [0012-17], comprising: emitting an optical pulse signal [#16 of Fig 1; 0016]; receiving a reflected optical pulse signal by an obstacle, and converting the reflected optical pulse signal into an electrical signal; [#42 of Fig 1; 0042] comparing the electrical signal with a preset threshold, and generating a pulse trigger signal according to a comparison result [Fig 7; 0057]; delaying the pulse trigger signal by a preset time length to generate a delay trigger signal [Fig 17C; 0084]; determining a time of flight of the optical pulse signal according to an emitting time of the optical pulse signal, a generating time of the delay trigger signal, and a delay of the preset time length [#42, #45 of Fig 1, 5; 0042; 0048]; and determining a distance between the pulse ranging apparatus and the obstacle according to the time of flight of the optical pulse signal [Fig 4B; 0047-48]. Imai does not explicitly teach – but Moore does teach wherein the time delay unit comprises one of following: a first time delay circuit comprising a gate circuit and a first capacitor; a second time delay circuit comprising gate circuits connected in series [Fig 5; 0063]; and a third time delay circuit comprising a second capacitor. It would have been obvious to modify the method of Imai to include a time delay circuit with plural gates in series to allow controlled selection of a delayed pulse control or calibration signal.
Regarding Claims 2 and 8, Imai also discloses wherein the distance determination unit further comprises a correction subunit, and the correction subunit is configured to correct the distance between the pulse ranging apparatus and the obstacle according to a pulse width of the delay trigger signal [Fig 18A, 18B; 0087-88].
Regarding Claims 9 and 10, Imai also discloses amplifying the delay trigger signal [Fig 14; 0084].
Claim(s) 3-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Imai (EP 3,217,189), and Moore (US 2018/0102407), as applied to claim 1 above, and further in view of Samukawa (US 2007/0032953) and Luo (CN 108,333,594).
Regarding Claim 3, Imai does not explicitly teach wherein the timing unit comprises a dual-channel timer, two channels of the dual-channel timer respectively time a rising edge and a falling edge of the delay trigger signal, and the timing unit determines the pulse width of the delay trigger signal according to the rising edge and the falling edge. Samukawa teaches dual-channel timer, two channels of the dual-channel timer respectively time a rising edge and a falling edge of the delay trigger signal [Fig 2C; 0070; 0117-19]. Luo teaches and the timing unit determines the pulse width of the delay trigger signal according to the rising edge and the falling edge [Fig 7]. It would have been obvious to modify the system of Imai to include a dual channel timer and determining the pulse width from a trigger signal to enable detecting an accurate distance to the reflecting object on the basis of the corrected intermediate time.
Regarding Claim 4, Imai, as modified, also teaches wherein the dual-channel timer comprises: an amplification circuit, configured to amplify the delay trigger signal [Fig 14; 0084].
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Imai (EP 3,217,189), and Moore (US 2018/0102407), as applied to claim 1 above, and further in view of Nakamura (US 2017/0273161).
Regarding Claim 6, Imai does not explicitly teach – but Nakamura does teach wherein the receiving unit comprises a PIN diode configured to convert the optical pulse signal into the electrical signal [0278]. It would have been obvious to modify the system of Imai to include a PIN photodiode performs efficient photoelectric conversion and transmission of the signal to the amplifier.
Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wu (US 2022/0338699) in view of Imai (EP 3,217,189) and Moore (US 2018/0102407).
Regarding Claim 11, Wu teaches an autonomous cleaning device [#100 of Fig 1-3; 0058-60; 0065], comprising at least one ranging apparatus [#100 of Fig 1-3; 0058-60; 0065]. Wu does not explicitly teach – but Imai does teach wherein: each pulse ranging apparatus comprises: an emitting unit, configured to emit an optical pulse signal [#16 of Fig 1; 0016]; a receiving unit, configured to receive a reflected optical pulse signal by an obstacle, and convert the reflected optical pulse signal into an electrical signal [#42 of Fig 1; 0042]; a threshold comparator, configured to compare the electrical signal with a preset threshold, and to generate a pulse trigger signal according to a comparison result [Fig 7; 0057]; a time delay unit, configured to delay the pulse trigger signal by a preset time length to generate a delay trigger signal [Fig 17C; 0084]; a timing unit, configured to determine a time of flight of the optical pulse signal according to an emitting time at which the emitting unit emits the optical pulse signal, a generating time at which the delay trigger signal is generated, and a delay of the preset time length [#42, #45 of Fig 1; Fig 5; 0042; 0048]; and a distance determination unit, configured to determine a distance between the at least one pulse ranging apparatus and the obstacle according to the time of flight of the optical pulse signal [Fig 4B; 0047-48]. Wu does not explicitly teach – but Moore does teach wherein the time delay unit comprises one of following: a first time delay circuit comprising a gate circuit and a first capacitor; a second time delay circuit comprising gate circuits connected in series [Fig 5; 0063]; and a third time delay circuit comprising a second capacitor. It would have been obvious to modify the system of Wu to include a pulse ranging apparatus with time delay, delay trigger signals to enable detecting an accurate distance to the reflecting object on the basis of the corrected intermediate time, and to include a time delay circuit with plural gates in series to allow controlled selection of a delayed pulse control or calibration signal.
Regarding Claim 12, Wu, as modified, also teaches a ranging apparatus disposed at a top of the autonomous cleaning device [#121 of Fig 3; 0063]
Claim(s) 11 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang (US 2020/0345194) in view of Imai (EP 3,217,189) and Moore (US 2018/0102407).
Regarding Claim 11, Jang teaches an autonomous cleaning device [#21a-d of Fig 1a; 0076; 0087; 0114], comprising at least one ranging apparatus [#21a-d of Fig 1a; 0076; 0087; 0114]. Wu does not explicitly teach – but Imai does teach wherein: each pulse ranging apparatus comprises: an emitting unit, configured to emit an optical pulse signal [#16 of Fig 1; 0016]; a receiving unit, configured to receive a reflected optical pulse signal by an obstacle, and convert the reflected optical pulse signal into an electrical signal; a threshold comparator, configured to compare the electrical signal with a preset threshold, and to generate a pulse trigger signal according to a comparison result; a time delay unit, configured to delay the pulse trigger signal by a preset time length to generate a delay trigger signal [Fig 17C; 0084]; a timing unit, configured to determine a time of flight of the optical pulse signal according to an emitting time at which the emitting unit emits the optical pulse signal, a generating time at which the delay trigger signal is generated, and a delay of the preset time length [#42, #45 of Fig 1; Fig 5; 0042; 0048]; and a distance determination unit, configured to determine a distance between the at least one pulse ranging apparatus and the obstacle according to the time of flight of the optical pulse signal [Fig 4B; 0047-48]. Jang does not explicitly teach – but Moore does teach wherein the time delay unit comprises one of following: a first time delay circuit comprising a gate circuit and a first capacitor; a second time delay circuit comprising gate circuits connected in series [Fig 5; 0063]; and a third time delay circuit comprising a second capacitor. It would have been obvious to modify the system of Jang to include a pulse ranging apparatus with time delay, delay trigger signals to enable detecting an accurate distance to the reflecting object on the basis of the corrected intermediate time, and to include a time delay circuit with plural gates in series to allow controlled selection of a delayed pulse control or calibration signal.
Regarding Claim 13, Jang also teaches wherein the at least one pulse ranging apparatus comprises more than one pulse ranging apparatuses disposed on a side surface of the autonomous cleaning device [#21a-d of Fig 1a; 0076; 0087; 0114].
Response to Arguments
Applicant’s arguments with respect to claims 1-4 and 6-13 have been considered but are moot because the arguments do not apply to the specific combination of the references being used in the current rejection.
In response to applicant’s arguments regarding amended independent Claims 1, 7, and 11, the examiner has cited Figure 5 and [0063] of Moore (US 2018/0102407), which describes a delay circuit having gate elements in series, since the claim limitation requires only one of those 3 listed possibilities. Additionally, referenced, but not cited document Axelsson (US 2017/0234973) teaches this limitation, as well, in [0047]. The alternative limitation of the circuit with a gate and capacitor can be found described in referenced, but not cited, document Hall (US 2018/0284227) in Figure 6 and [0045]. The last alternative limitation, with a delay circuit with a second capacitor, can be found described in referenced, but not cited, document Shinozuka (US 2019/0383917) in Fig 35 and [0263].
Applicant's remaining arguments amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES R HULKA whose telephone number is (571)270-7553. The examiner can normally be reached M-R: 9am-6pm, F: 10am-2pm.
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JAMES R. HULKA
Primary Examiner
Art Unit 3645
/JAMES R HULKA/Primary Examiner, Art Unit 3645