Office Action Predictor
Application No. 17/806,927

DOUBLY CONTROLLED iX CIRCUIT

Final Rejection §101
Filed
Jun 14, 2022
Examiner
DO, AN H
Art Unit
2853
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Microsoft Technology Licensing, LLC
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
To Grant
97%
With Interview

Examiner Intelligence

91%
Career Allow Rate
1289 granted / 1422 resolved
Without
With
+6.5%
Interview Lift
avg trend
2y 3m
Avg Prosecution
30 pending
1452
Total Applications
career history

Statute-Specific Performance

§101
11.3%
-28.7% vs TC avg
§103
24.2%
-15.8% vs TC avg
§102
42.7%
+2.7% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§101
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Information Disclosure Statement The information disclosure statement (IDS) submitted on 23 December 2025 was filed and is being considered by the examiner. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1, 2, 4-8, 10-13, 15-17 and 19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 13 (and dependent claims 15-17 and 19) recite “A method for use with a quantum computing device that includes a doubly controlled iX (CCiX) circuit and a measurement device, the method comprising: at the CCiX circuit: in a preparation stage, preparing a plurality of magic states; receiving a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state; and in an execution stage, performing a CCiX operation on the target qubit state at least in part by: with the measurement device, performing a plurality of local joint measurements, wherein at least a subset of the plurality of local joint measurements are performed between the plurality of magic states and a plurality of auxiliary qubits; and with the measurement device, performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.” Claims 13, 15-17 and 19, in view of the claim limitations, recite the abstract idea of “at the CCiX circuit: in a preparation stage, preparing a plurality of magic states; receiving a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state; and in an execution stage, performing a CCiX operation on the target qubit state at least in part by: with the measurement device, performing a plurality of local joint measurements, wherein at least a subset of the plurality of local joint measurements are performed between the plurality of magic states and a plurality of auxiliary qubits; and with the measurement device, performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.” As a whole, in view of the claim limitations, but for the computer components and systems performing the claimed functions, the broadest reasonable interpretation of the recited “at the CCiX circuit: in a preparation stage, preparing a plurality of magic states; receiving a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state; and in an execution stage, performing a CCiX operation on the target qubit state at least in part by: with the measurement device, performing a plurality of local joint measurements, wherein at least a subset of the plurality of local joint measurements are performed between the plurality of magic states and a plurality of auxiliary qubits; and with the measurement device, performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.”; therefore, the claims recite mental processes. Accordingly, the claims recite a mental process, and thus, the claims recite an abstract idea under the first prong of Step 2A. This judicial exception is not integrated into a practical application under the second prong of Step 2A. In particular, the claims recite the additional elements beyond the recited abstract idea of“[a] computer- implemented method” and “the method is carried out by one or more physical processors configured by machine-readable instructions” as recited in claim 1, individually and when viewed as an ordered combination, and pursuant to the broadest reasonable interpretation, each of the additional elements are computing elements recited at high level of generality implementing the abstract idea on a computer (i.e. apply it), and thus, are no more than applying the abstract idea with generic computer components. Moreover, aside from the aforementioned additional elements, the remaining elements of dependent claims 2, 4-8 and 10-12 do not integrate the abstract idea into a practical application because these claims merely recite further limitations that provide no more than simply narrowing the recited abstract idea. The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception under Step 2B. As noted above, the aforementioned additional elements beyond the recited abstract idea, as an order combination, are no more than mere instructions to implement the idea using generic computer components (i.e. apply it), and further, generally link the abstract idea to a field of use, which is not sufficient to amount to significantly more than an abstract idea; therefore, the additional elements are not sufficient to amount to significantly more than an abstract idea. Additionally, these recitations as an ordered combination, simply append the abstract idea to recitations of generic computer structure performing generic computer functions that are well-understood, routine, and conventional in the field as evinced by Applicant’s Specification at [0239] and [0240] (describing that the disclosure is not limited to the disclosed implementations, but, on the contrary, is intended to cover modifications and equivalent arrangements that are within the spirit and scope of the appended claims). Furthermore, as an ordered combination, these elements amount to generic computer components performing repetitive calculations, receiving or transmitting data over a network, which, as held by the courts, are well-understood, routine, and conventional. See MPEP 2106.05(d); July 2015 Update, p. 7. Moreover, aside from the aforementioned additional elements, the remaining elements of dependent claims 2, 4-8, 10-12, 15-17 and 19 do not transform the recited abstract idea into a patent eligible invention because these claims merely recite further limitations that provide no more than simply narrowing the recited abstract idea. Looking at these limitations as an ordered combination adds nothing additional that is sufficient to amount to significantly more than the recited abstract idea because they simply provide instructions to use a generic arrangement of generic computer components and recitations of generic computer structure that perform well-understood, routine, and conventional computer functions that are used to “apply” the recited abstract idea. Thus, the elements of the claims, considered both individually and as an ordered combination, are not sufficient to ensure that the claim as a whole amounts to significantly more than the abstract idea itself. Since there are no limitations in these claims that transform the exception into a patent eligible application such that these claims amount to significantly more than the exception itself, claims 1, 2, 4-8, 10-13, 15-17 and 19 are rejected under 35 U.S.C. 101 as being directed to non-statutory subject matter. Allowable Subject Matter Claim 20 is allowed over prior arts. The following is an examiner’s statement of reasons for allowance: The primary reason for the allowance of claim 20 is the inclusion of the limitations of a quantum computing device that includes: PNG media_image1.png 150 282 media_image1.png Greyscale It is these limitations found in the claims, as they are claimed in the combination of, that has not been found, taught or suggested by the prior art of record which makes these claims allowable over the prior art. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claims 3, 9, 14 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the allowance of claim 3 is the inclusion of the limitations of a quantum computing device that includes a preparation stage including: PNG media_image2.png 108 292 media_image2.png Greyscale It is these limitations found in the claims, as they are claimed in the combination of, that has not been found, taught or suggested by the prior art of record which makes these claims allowable over the prior art. The primary reason for the allowance of claim 9 is the inclusion of the limitations of a quantum computing device that includes an execution stage including: PNG media_image3.png 110 294 media_image3.png Greyscale It is these limitations found in the claims, as they are claimed in the combination of, that has not been found, taught or suggested by the prior art of record which makes these claims allowable over the prior art. The primary reason for the allowance of claim 14 is the method for use with a quantum computing device, includes: PNG media_image4.png 184 284 media_image4.png Greyscale It is these steps found in the claims, as they are claimed in the combination of, that has not been found, taught or suggested by the prior art of record which makes these claims allowable over the prior art. The primary reason for the allowance of claim 18 is the method for use with a quantum computing device, includes an execution stage including: PNG media_image5.png 88 292 media_image5.png Greyscale It is these steps found in the claims, as they are claimed in the combination of, that has not been found, taught or suggested by the prior art of record which makes these claims allowable over the prior art. Response to Arguments Applicant's arguments filed 03 November 2025 have been fully considered but they are not persuasive. Applicant argued that claims 1-20 are allowed over the current 101 rejection. However, after a thorough reviewing of these claims, the examiner only found claim 20 is allowed for the reason as stated above. Claims 1, 2, 4-8, 10-13, 15-17 and 19 still remain rejected under 101 rejection since they do not integrate an abstract idea into a practical application. Dependent claims 3, 9, 14 and 18 are objected but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims as stated above. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to AN H DO whose telephone number is (571)272-2143. The examiner can normally be reached on M-F 7:5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Stephen Meier can be reached on 571-272-2149. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AN H DO/Primary Examiner, Art Unit 2853
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Prosecution Timeline

Jun 14, 2022
Application Filed
Aug 23, 2025
Non-Final Rejection — §101
Oct 30, 2025
Examiner Interview Summary
Oct 30, 2025
Applicant Interview (Telephonic)
Nov 03, 2025
Response Filed
Dec 26, 2025
Final Rejection — §101
Mar 30, 2026
Notice of Allowance
Mar 30, 2026
Response after Non-Final Action
Apr 10, 2026
Response after Non-Final Action

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+6.5%)
2y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 1422 resolved cases by this examiner