DETAILED ACTION
This office action is in response to applicant’s response filed on April 13, 2026 in application 17/807,054.
Claims 1-20 are presented for examination. Claims 1-11, 14-20 are amended (incorrect identification, as amended for claims 12-13).
IDS submitted on June 15, 2022 was acknowledged.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Smyth et al. (US 2021/0028558) in further view of Kumar et al. (US 2011/0106401).
In regard to claim 1, Smyth et al. teach a method of performing fault detection during computations relating to a neural network comprising a first neural network layer and a second neural network layer in a data processing system (neural network employed by the system may be represented by a multilayer perceptron (MLP), para. 26, fig. 5), the method comprising:
scheduling the computations onto data processing resources for the execution of the first neural network layer and the second neural network layer (model employed for performing the feature extraction and clustering may be implemented by a neural network, para. 25), wherein the scheduling includes:
for a given one of the first neural network layer and the second neural network layer, scheduling a respective given one of a first computation and a second computation as a non-duplicated computation, in which the given one of the first computation and the second computation is at least initially scheduled to be performed only once during the execution of the given one of the first network layer and the second neural network layer (layers 520A and 520L, fig. 5, para. 26); and,
performing the computations in the data processing resources in accordance with the scheduling (performing a clustering technique, para. 29, fig. 5).
Smyth et al. does not explicitly teach but Kumar et al. teach for the other of the first neural network layer and the second neural network layer, scheduling the respective other of the first computation and the second computation as a duplicated computation, in which the other of the first computation and the second computation is at least initially scheduled to be performed at least twice during the execution of the other of the first neural network layer and the second neural network layer to provide a plurality of outputs (the pattern of input signals is repeated several times, or until the error signals are detected as being negligibly valued, para. 33)
comparing the plurality of outputs from the duplicated computation to selectively provide a fault detection operation during processing of the other of the first neural network layer and the second neural network layer (the respective weights for each layer may be determined in a training sequence … the pattern of output signals generated by the neural net, responsive to each prescribed pattern of input signals may be compared to the prescribed pattern of output signals to develop error signals, para. 33).
It would have been obvious to modify the method of Smyth et al. by adding Kumar et al. neural network estimator. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would provide a neural network estimator that can be trained to map a selected range of input signals so as to generate a desired output parameter (para. 33).
In regard to claim 2, Smyth et al. teach the method according to claim 1, comprising:
for the given one of the first neural network layer and the second neural network layer, scheduling the given one of the first computation and second computation onto a first component of a plurality of computing components, such that the given one of the first computation and the second computation is scheduled as the non-duplicated computation in which the first component performs a computation which is not scheduled to be performed by any other of the plurality of computing components (each artificial neurons processes one or more input signals and transmits the output signal to one or more neighboring artificial neurons, para. 25, fig. 5, nodes 550N); and,
for the other of the first neural network layer and the second neural network layer, scheduling the other of the first computation and the second computation onto the first component and onto a second (it is noted that the first component and onto a second component here is interpreted as the first neural network layer or the second neural network layer schedule computation onto the first component and a second component), different, component of the plurality of computing components, each of the first and second components providing a respective one of the plurality of outputs (each artificial neurons processes one or more input signals and transmits the output signal to one or more neighboring artificial neurons, para. 25, fig. 5, nodes 550A transfer output to node 560A and node 560B to provide a plurality of outputs),
In regard to claim 3, Smyth et al. teach the method of claim 2, wherein the scheduling includes, for the given one of the first neural network layer and the second neural network layer, scheduling a third computation, different to the non-duplicated, computation, onto the second component (the model employed for performing the feature extraction and clustering implemented by a neural network … where multitude of nodes call artificial neurons such that each artificial neurons processes one or more input signals and transmits the output signal to one or more neighboring artificial neurons… the output may be applying to a linear combination or may be trained by processing examples (training data sets), para. 25, fig. 5).
In regard to claim 4, Smyth et al. teach the method of claim 2, wherein the scheduling includes, for the given one of the first neural network layer and the second neural network layer, scheduling the second component to be placed in a low-power state in which no computation is performed (other hyperparameters of the model may include the number of nodes in each layer, the activation function types, etc, para. 26, it is noted that the number of nodes exceeding the number of nodes required by the model is deem inactive and equate that to a low power state).
In regard to claim 8, Smyth et al. teach the method of claim 1, wherein the first neural network layer and the second neural network layer are executed during performance of one inference or one training run of a neural network (the model for performing the feature extraction may be implemented by a neural network …. A neural network may be trained by processing examples, para. 25), each of the first neural network layer and the second neural network layer being a different layer of the neural network (an implementation could be operation performed by the same neural network, in which a first subset of layers perform the feature extraction, the second subset of layers perform the clustering, while the remaining layers perform the regression tasks, para. 30).
In regard to claim 9, Smyth et al. teach a data processing system configured to perform fault detection during computations, the data processing system comprising:
control circuitry (processing device, fig. 8, para. 41); and,
one or more computing components configured to provide data processing resources (the processing device may include one or more application processors, para. 42),
wherein the control circuitry is configured to schedule computations onto the data processing resources for execution of a first neural network layer and a second neural network layer (the processing device may receive a plurality of values … and may employ a machine learning model to perform a feature extraction, para. 45-46), including: for a given one of the first neural network layer and the second neural network layer, scheduling a respective given one of a first computation and a second computation as a non-duplicated computation, in which the given one of the first computation and the second computation is at least initially scheduled to be performed only once during the execution of the given one for the first neural network layer and the second neural network layer (layers 520A and 520L, fig. 5, para. 26).
Smyth et al. does not explicitly teach but Kumar et al. teach for the other of the first neural network layer and the second neural network layer, scheduling the respective other of the first computation and the second computation as a duplicated computation, in which the other of the first computation and the second computation is at least initially scheduled to be performed at least twice during the execution of the other of the first neural network layer and the second neural network layer to provide a plurality of outputs (the pattern of input signals is repeated several times, or until the error signals are detected as being negligibly valued, para. 33), wherein the data processing system is configured to compare the plurality of outputs from the duplicated computation with each other to selectively provide a fault detection operation during processing of the other of the first neural network layer and the second neural network layer (the respective weights for each layer may be determined in a training sequence … the pattern of output signals generated by the neural net, responsive to each prescribed pattern of input signals may be compared to the prescribed pattern of output signals to develop error signals, para. 33).
Refer to claim 1 for motivational statement.
In regard to claim 10, Smyth et al. teach a method of generating a hardware configuration addressing an operational performance target for a data processing system that is programmable to execute a first neural network layer and a second neural network layer, the method comprising:
determining a first operation for one of the first neural network layer and the second neural network layer (model employed for performing the feature extraction and clustering may be implemented by a neural network, para. 25);
determining a first fault detection operation for the other of the first neural network layer and the second neural network layer, wherein the first operation and the first fault detection operation may differ from one another and wherein a combination of the first operation and the first fault detection operation can address the operational performance target for a neural network comprising the first neural network layer and the second neural network layer (compared and the error is propagated back to the previous layers of the neural network, para. 29); and,
determining the hardware configuration for the data processing system, wherein the hardware configuration is operable to provide the first operation and the first fault detection operation (if the values exceeds the predetermined threshold value, the processing device may identify an antenna array element and/or a design parameter of the antenna array that has caused the angular resolution value to exceed … notify and take remedial action, para. 58-59).
In regard to claim 11, Smyth et al. teach the method of claim 10, further comprising providing the data processing system that comprises the hardware configuration that is operable to provide the first operation and the first fault detection operation (identify one or more sub-optimal sections of the antenna array response, and further identify the antenna array elements corresponding to the identified sub-optimal sections and design parameters that are likely to have caused the sub-optimal antenna response, para. 58).
In regard to claim 13, Smyth et al. teach the method of claim 10, wherein the data processing system comprises a neural processing unit that is programmable to execute the neural network (neural network employed by the system, para. 26, fig. 5).
In regard to claim 14, Smyth et al. teach the method of claim 10, in which determining the first operation and/or the first fault detection operation comprises:
determining a property of at least the first neural network layer (predetermined threshold, para. 57-58); and,
using the property to determine whether fault detection should be enabled, or a suitable fault detection operation that should be used, for the first neural network layer, in order to address the operational performance target for the neural network (responsive to determining that the angular resolution value exceeds the predetermined threshold value, para. 58).
In regard to claim 15, Smyth et al. teach the method of claim 10, comprising:
determining a property of at least the first neural network layer (predetermined threshold, para. 57-58); and,
configuring the first operation and/or the first fault detection operation in view of the property of at least the first neural network layer, in order to address the operational performance target for the neural network (responsive to determining that the angular resolution value exceeds the predetermined threshold value, para. 58).
In regard to claim 16, Smyth et al. teach the method of claim 10, wherein determining the first operation and/or the first fault detection operation comprises considering at least one of: the susceptibility of and impact of error of a first component of the one or more computing components; a size of the first component; a number of processing elements within the first component; an intended or potential function of the first component; and, a potential contribution of the first component, to meeting the operational performance target for the neural network (responsive to determining that the angular resolution value exceeds the predetermined threshold value, para. 58).
In regard to claim 20, Smyth et al. teach a non-transitory computer-readable storage medium comprising computer- executable instructions stored thereon which, when executed by at least one processor, cause the at least one processor to generate a hardware configuration addressing an operational performance target for a data processing system that is programmable to execute a first neural network layer and a second neural network layer (neural network employed by the system may be represented by a multilayer perceptron (MLP), para. 26, fig. 5), the instructions comprising the steps of:
determining a first operation for one of the first neural network layer and the second neural network layer (model employed for performing the feature extraction and clustering may be implemented by a neural network, para. 25);
determining the hardware configuration for the data processing system, wherein the hardware configuration is operable to provide the first operation and the first fault detection operation (if the values exceeds the predetermined threshold value, the processing device may identify an antenna array element and/or a design parameter of the antenna array that has caused the angular resolution value to exceed … notify and take remedial action, para. 58-59).
Smyth et al. does not explicitly teach but Kumar et al. teach determining a first fault detection operation for the other of the first neural network layer and the second neural network layer, wherein the first operation and the first fault detection operation may differ from one another and wherein a combination of the first operation and the first fault detection operation can address the operational performance target for a neural network comprising the first neural network and the second neural network layer (the pattern of input signals is repeated several times, or until the error signals are detected as being negligibly valued, the respective weights for each layer may be determined in a training sequence … the pattern of output signals generated by the neural net, responsive to each prescribed pattern of input signals may be compared to the prescribed pattern of output signals to develop error signals, para. 33).
Refer to claim 1 for motivational statement.
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Claims 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Smyth et al. (US 2021/0028558) in further view of Kumar et al. (US 2011/0106401) in further view of Dikici et al. (US 2023/0195831).
In regard to claim 5, Smyth et al. and Kumar et al. does not explicitly teach but Dikici et al. teach the method of claim 2, wherein the first and second components comprise multiply accumulator engines under control of central network control circuitry (the system may also comprise one or more accumulators 2204, fig. 22, para. 85, 91).
It would have been obvious to modify the method of Smyth et al. and Kumar et al. by adding Denison et al. analytical server. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would aid in performing a convolution transpose operation (abstract).
In regard to claim 6, Smyth et al. and Kumar et al. does not explicitly teach but Dikici et al. teach the method of claim 2, wherein the first and second components comprise programmable compute engines under control of central network control circuitry (the system 2200 comprises one or more convolution engines and one or more accumulators, fig. 22, para. 85).
Refer to claim 5 for motivational statement.
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Claim 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Smyth et al. (US 2021/0028558) in further view of Kumar et al. (US 2011/0106401) in further view of Dikici et al. (US 2023/0195831) in further view of Denison et al. (US 2007/0142936).
In regard to claim 7, Smyth et al., Kumar et al. and Dikici et al. does not explicitly teach but Denison et al. teach the method of claim 5, wherein at least part of the central network control circuitry is duplicated in hardware to increase resilience of the central network control circuitry (the advance control block can be executed by the controller 11A and a copy is located in the redundant controllers 11B, para. 31).
It would have been obvious to modify the method of Smyth et al., Kumar et al. and Dikici et al. by adding Denison et al. analytical server. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would provide redundancy in case primary controller 11A fails (para. 31).
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Claims 12, 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Smyth et al. (US 2021/0028558) in further view of Kumar et al. (US 2011/0106401) in further view of Zhang et al. (US 2019/0122104).
In regard to claim 12, Smyth et al. and Kumar et al. does not explicitly teach but Zhang et al. teach the method of claim 10, wherein the operational performance target relates to a resilience target for the neural network (the system can include a deep neural network builder component that can include a neural network training component and a neural network duplication component, fig. 1, para. 23).
It would have been obvious to modify the method of Smyth et al. and Kumar et al. by adding Zhang et al. building a binary neural network architecture. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would aid in building a binary neural network architecture (para. 22-23).
In regard to claim 17, Smyth et al. and Kumar et al. does not explicitly teach but Zhang et al. teach the method of claim 10, wherein determining the hardware configuration for the data processing system comprises determining whether to duplicate some or all hardware comprised within a first component of the one or more computing components (the neural network duplication component may train a copy of the first neural network to determine whether a second class exists, para. 27).
Refer to claim 12 for motivational statement.
In regard to claim 18, Smyth et al. and Kumar et al. does not explicitly teach but Zhang et al. teach the method of claim 10, wherein determining the first fault detection operation comprises determining whether a computation that a first processing element within a first component of the one or more computing components is operable to make should also be carried out in a first processing element within a different component of the one or more computing components, which can be configured to make duplicated computations with the first component (can train the copy of the first neural network to form a second neural network, para. 27).
Refer to claim 12 for motivational statement.
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Claim 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Smyth et al. (US 2021/0028558) in further view of Kumar et al. (US 2011/0106401) in further view of Denison et al. (US 2007/0142936).
In regard to claim 19, Smyth et al. and Kumar et al. does not explicitly teach but Denison et al. teach the method of claim 10, wherein determining the first fault detection operation comprises determining whether operation of a first component of the one or more computing components can be monitored without duplicating all hardware within the first component, in order to address the operational performance target for the neural network (the controller 11A may include a number of single-loop, SISO control routine, para. 31).
It would have been obvious to modify the method of Smyth et al. and Kumar et al. by adding Denison et al. analytical server. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would provide redundancy in case primary controller 11A fails (para. 31).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO 892.
Walters et al. (US 11,080,707) neural network, comparing the error output by the neural network
Haddon et al. (US 12,346,485) hidden layers of a neural network
Podder et al. (US 2018/0173495) single, bi-directional and convolutional neural network and comparable output that can be used for duplicate bug report detection
Schwanke et al. (U S5,461,698) neural network
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Yu et al. (US 12/468,946) layer of neural network and comparing threshold
Semenov (US 11,816,165) neural network output compare with training output
Gao et al. (US 2022/0398456) using a neural network
Chin et al. (US 2021/0141697) mission-critical with multi-layer fault tolerance support
Chen et al. (US 10,901,815) output layer of neural network and standard correction mode
Ting et al. (US 10,867,098) neural network modeling
Yao et al. (US 2020/0117997) neural network training
Guo et al. (US 2020/0026988) using and training deep neural networks
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LOAN TRUONG whose telephone number is 408-918-7552. The examiner can normally be reached on 10AM-6PM PST M-F.
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/Loan L.T. Truong/Primary Examiner, Art Unit 2114 Loan.truong@uspto.gov
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