Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 5, 6, 7, 13, 14, 16, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shounai (WO 2021084848 A1).
Regarding Independent Claim 1, Shounai teaches,
A power amplifier (See Figs. 13 and 14) comprising:
an input (Fig. 14, 82A) configured to receive an input signal (Fig. 14, signal at 80), and an input split (Fig. 14, 110) configured to transform the input signal into a balanced signal (Fig. 14, signals from 110);
an input driver (Fig. 14, 11E) coupled between the input and the input split (Fig. 14, 11E is coupled between 80 and 110);
an output (Fig. 13, 81) configured to provide an amplified output signal (Fig. 13, signal at 81);
a balun (Fig. 14, T1) coupled to the output (Fig. 14, T1 is coupled to 80 via switch 5);
an output driver (Fig. 14, 11C and 11D) coupled between the input driver and the balun (Fig. 14, 11C and 11D are both coupled between 11E and T1);
at least one capacitor (Fig. 14, C12) coupled to the balun (Fig. 14, T1); and
a controllable load (Fig. 13, 5) coupled to the at least one capacitor (Fig. 14, C12) and being configured to present, with the at least one capacitor (Fig. 14, C12), a variable impedance to the balun [See paragraph 2, page 14, “The non-inverting input signal amplified by the first power amplifier 11C and the inverting input signal amplified by the second power amplifier 11D are connected to the inductors L11A, L11B, the transformer T1 and the capacitor C11 while maintaining the opposite phases. Is impedance-converted. As a result, the output impedance of the differential amplifier circuit 100A is impedance-matched with the input impedance of the second switch 5 and the transmission filters 12A and 12B by the inductors L11A and L11B, the transformer T1 and the capacitor C11. In the output matching circuit 13C of the differential amplifier circuit 100A, the capacitors C12 and C13 also contribute to the impedance matching.”].
Regarding claim 2,
The power amplifier of claim 1 wherein the controllable load (Fig. 13, 5) includes a switch (Fig. 13, 5 includes a switch).
Regarding claim 5,
The power amplifier of claim 1 further comprising an interstage match between the input driver (Fig. 14, 11E) and the output driver (Fig. 14, 11C and 11D) configured such that a collector impedance of the input driver is out-of-phase with a collector impedance of the output driver [See paragraph 1-2, page 14, “In the differential amplifier circuit 100A, the high frequency signal input from the signal input terminal 82A is amplified by the amplification element 11E. The high frequency signal amplified by the amplification element 11E is subjected to non-equilibrium-balance conversion by the non-equilibrium-balance conversion circuit 110. At this time, the non-equilibrium-balanced conversion circuit 110 outputs the non-inverting input signal from the first balanced terminal, and the non-equilibrium-balanced conversion circuit 110 outputs the inverting input signal from the second balanced terminal.
The non-inverting input signal amplified by the first power amplifier 11C and the inverting input signal amplified by the second power amplifier 11D are connected to the inductors L11A, L11B, the transformer T1 and the capacitor C11 while maintaining the opposite phases. Is impedance-converted. As a result, the output impedance of the differential amplifier circuit 100A is impedance-matched with the input impedance of the second switch 5 and the transmission filters 12A and 12B by the inductors L11A and L11B, the transformer T1 and the capacitor C11. In the output matching circuit 13C of the differential amplifier circuit 100A, the capacitors C12 and C13 also contribute to the impedance matching.”].
Regarding claim 6,
The power amplifier of claim 5 wherein increasing the controllable load (Fig. 13, 5) increases a gain and a saturation power of the power amplifier [See paragraph 1, page 16, “The high frequency module 1e includes a differential amplifier circuit 100A including a first power amplifier 11C, a second power amplifier 11D, and a transformer T1. As a result, in the high frequency module 1e according to the second embodiment, it is possible to suppress a decrease in power gain.”].
Regarding claim 7,
The power amplifier of claim 6 wherein increasing the controllable load (Fig. 13, 5) increases the collector impedance of the input driver (Fig. 14, 11E) and decreases a collector impedance of the output driver (Fig. 14, 11C and 11C) [See paragraph 2, page 14, “The non-inverting input signal amplified by the first power amplifier 11C and the inverting input signal amplified by the second power amplifier 11D are connected to the inductors L11A, L11B, the transformer T1 and the capacitor C11 while maintaining the opposite phases. Is impedance-converted. As a result, the output impedance of the differential amplifier circuit 100A is impedance-matched with the input impedance of the second switch 5 and the transmission filters 12A and 12B by the inductors L11A and L11B, the transformer T1 and the capacitor C11. In the output matching circuit 13C of the differential amplifier circuit 100A, the capacitors C12 and C13 also contribute to the impedance matching.”].
Regarding claim 13,
A method of controlling a power amplifier (See Figs. 13 and 14) comprising:
providing a power amplifier having a balun (Fig. 14, T1), at least one capacitor (Fig. 14, C12) coupled to the balun (Fig. 14, T1), and a controllable load (Fig. 13, 5) coupled to the at least one capacitor (Fig. 14, C12); and
varying the controllable load (Fig. 14, C12) to improve an efficiency of the balun (Fig. 14, T1).
Regarding claim 14,
The method of claim 13 wherein the controllable load includes a switch (Fig. 13, 5) includes a switch (Fig. 13, 5 includes a switch), and wherein varying the controllable load (Fig. 13, 5) includes varying a control signal (Fig. 13, signal sent to 5) provided to a control connection of the switch.
Regarding claim 16,
The method of claim 14 wherein the power amplifier further includes an input driver (Fig. 14, 11E) and an output driver (Fig. 14, 11C and 11D), the method further comprising implementing an interstage match between the input driver (Fig. 14, 11E) and the output driver (Fig. 14, 11C and 11D) such that a collector impedance of the input driver is out-of-phase with a collector impedance of the output driver [See paragraph 1-2, page 14, “In the differential amplifier circuit 100A, the high frequency signal input from the signal input terminal 82A is amplified by the amplification element 11E. The high frequency signal amplified by the amplification element 11E is subjected to non-equilibrium-balance conversion by the non-equilibrium-balance conversion circuit 110. At this time, the non-equilibrium-balanced conversion circuit 110 outputs the non-inverting input signal from the first balanced terminal, and the non-equilibrium-balanced conversion circuit 110 outputs the inverting input signal from the second balanced terminal.
The non-inverting input signal amplified by the first power amplifier 11C and the inverting input signal amplified by the second power amplifier 11D are connected to the inductors L11A, L11B, the transformer T1 and the capacitor C11 while maintaining the opposite phases. Is impedance-converted. As a result, the output impedance of the differential amplifier circuit 100A is impedance-matched with the input impedance of the second switch 5 and the transmission filters 12A and 12B by the inductors L11A and L11B, the transformer T1 and the capacitor C11. In the output matching circuit 13C of the differential amplifier circuit 100A, the capacitors C12 and C13 also contribute to the impedance matching.”].
Regarding claim 17,
The method of claim 16 wherein increasing the controllable load (Fig. 13, 5) increases the collector impedance of the input driver (Fig. 14, 11E) and decreases a collector impedance of the output driver (Fig. 14, 11C and 11C) [See paragraph 2, page 14, “The non-inverting input signal amplified by the first power amplifier 11C and the inverting input signal amplified by the second power amplifier 11D are connected to the inductors L11A, L11B, the transformer T1 and the capacitor C11 while maintaining the opposite phases. Is impedance-converted. As a result, the output impedance of the differential amplifier circuit 100A is impedance-matched with the input impedance of the second switch 5 and the transmission filters 12A and 12B by the inductors L11A and L11B, the transformer T1 and the capacitor C11. In the output matching circuit 13C of the differential amplifier circuit 100A, the capacitors C12 and C13 also contribute to the impedance matching.”].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 8, 9, 12, 15, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Shounai in view of Signoff et al. (US 20130106507 A1), hereinafter Signoff.
Regarding claim 3, Shounai is silent regarding;
The power amplifier of claim 2 wherein the switch includes a heterojunction bipolar transistor.
Singoff further discloses:
The power amplifier of claim 2 wherein the switch includes a heterojunction bipolar transistor [See paragraph [0051], “In diagram 500, adjustable power amplifier 102 includes four transistors 552, 554, 556 and 558, and a switch 560. … As described herein, transistor 552-558 are three-terminal NMOS transistors. However, in general, transistors 552-558 may be any type of transistor, including PMOS transistors, CMOS transistors, BJT transistors, FET transistors, four terminal devices, or any combination thereof.”].
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a transistor in the switch in Shounai’s design in order to control the current flow through the amplifier in accordance with Signoff’s design.
Regarding claim 8, Shounai is silent regarding;
The power amplifier of claim 7 wherein the controllable load is a variable resistance.
Signoff further discloses:
The power amplifier of claim 7 wherein the controllable load (Fig. 1B, 112) is a variable resistance (Fig. 1B, 112 is a variable impedance unit).
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include variable resistance in Shounai’s design in order to handle a large voltage swing in accordance with Signoff’s design.
Regarding claim 9, Shounai is silent regarding;
The power amplifier of claim 1 wherein the input driver includes a cascode amplifier.
Signoff further discloses:
The power amplifier of claim 1 wherein the input driver (Fig. 1B, 102) includes a cascode amplifier (Fig. 1B, 102 is a cascode amplifier).
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a cascode amplifier in Shounai’s design in order to provide high voltage gain and increase bandwidth in accordance with Signoff’s design.
Regarding claim 12, Shounai is silent regarding;
The power amplifier of claim 7 wherein the controllable load is a variable resistance.
Signoff further discloses:
The power amplifier of claim 7 wherein the controllable load (Fig. 1B, 112) is a variable resistance (Fig. 1B, 112 is a variable impedance unit).
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include variable resistance in Shounai’s design in order to handle a large voltage swing in accordance with Signoff’s design.
Regarding claim 15, Shounai is silent regarding;
The method of claim 14 wherein the controllable load includes a variable resistor, and wherein varying the controllable load includes varying a resistance of the variable resistor.
Shounai is silent regarding;
The method of claim 14 wherein the controllable load (Fig. 1B, 112) includes a variable resistor (Fig. 1B, 112 is a variable impedance unit), and wherein varying the controllable load (Fig. 1B, 112) includes varying a resistance of the variable resistor (Fig. 1B, resistance of variable impedance unit).
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include variable resistance in Shounai’s design in order to handle a large voltage swing in accordance with Signoff’s design.
Regarding claim 18, Shounai is silent regarding;
The method of claim 17 wherein increasing the controllable load (Fig. 1B, 112) includes increasing a resistance of the controllable load (Fig. 1B, 112 is a variable impedance unit).
Shounai and Signoff are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include variable resistance in Shounai’s design in order to handle a large voltage swing in accordance with Signoff’s design.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Shounai in view of Dinc et al. (US 20220224295 A1), hereinafter Dinc.
Regarding claim 10, Shounai is silent regarding;
The power amplifier of claim 1 wherein the input driver includes a common-emitter amplifier.
Dinc further discloses:
The power amplifier of claim 1 wherein the input driver (Fig. 1, 104) includes a common-emitter amplifier [See paragraph [0025], “The second and third transistors 138a, 138b comprise a common-emitter differential amplifier to amplify a current generated by the first transformer 118”].
Shounai and Dinc are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a common-emitter amplifier in Shounai’s design in order to provide high voltage gain and increase bandwidth in accordance with Dinc’s design.
Regarding claim 11, Shounai is silent regarding;
The power amplifier of claim 1 wherein the output driver includes a common-emitter amplifier.
Dinc further discloses:
The power amplifier of claim 1 wherein the output driver (Fig. 1, 106) includes a common-emitter amplifier [See paragraph [0033], “The fifth and sixth transistors 154a, 154b comprise a common-emitter differential amplifier to amplify a power at the output of the split-combine transformer 102.”].
Shounai and Dinc are both considered to be analogous to the claimed invention because they are in the same field of power amplifiers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a common-emitter amplifier in Shounai’s design in order to provide high voltage gain and increase bandwidth in accordance with Dinc’s design.
Conclusion
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/JOSE E PINERO/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843