DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on June 8, 2026 has been entered.
Claims 1-4, 6-14 and 16 remain pending. Applicant amended claims 1, 11 and 16.
Response to Arguments
The amendment necessitated the new grounds of prior art rejection set forth below. The new grounds of rejection are deemed to render moot Applicant’s arguments directed to the outstanding prior art rejections.
Regarding the outstanding 35 U.S.C. 112(b) rejection, it is maintained, as indicated in the advisory action. Contrary to Applicant’s remarks (Remarks 6), the amendment does not address the nature of the indefiniteness in claim 11.
Claim Objections
Claims 1 and 11 are objected to because of the following informalities:
In claims 1 and 11, each instance of the limitation “directed connected” should be changed to “directly connected”.
In line 11 of claim 11, the limitation “a first surface” should be changed to “the first surface”.
Appropriate corrections are required.
Claim Rejections - 35 USC § 112
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 9, 11-14 and 16 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 9 introduces a “fluidic bus in fluid communication with the microfluidic element” even though claim 1 was amended to introduce a “first bus” that is “immediately adjacent and connected to the microfluidic element”. It is unclear whether claim 9 intends to introduce a second bus. If so, given that claim 1 recites “a plurality of buses”, the distinction between the “fluidic bus” and the “plurality of buses” is unclear.
Claim 11 recites a “microfluidic element” (line 4) and subsequently a “microfluidic device” (line 6). The distinction between the two elements is unclear. The limitations “element” and “device” do not convey sufficient structure/function so as to distinguish the limitations in terms of scope (i.e. a microfluidic element can be a microfluidic device and vice versa). This is further supported by the specification, which uses the terms interchangeably. That said, it is unclear whether the claim intends to recite two different elements/devices, or whether the limitations refer to a common element/device. Based on prosecution history (the claim previously recited “the microfluidic device”, suggesting that the limitation intended to refer to the “microfluidic element” but was misspelled), it will be presumed that the latter limitation is referring to the former limitation.
In addition, it is unclear whether the scope of claim 11 intends to encompass a single via or a plurality of vias. The claim initially positively recites a single via, but the claim subsequently refers to a plurality of vias extending through the silicon device layer.
Claim Rejections - 35 USC § 103
Claims 11-14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Foster (US 2009/0212407 A1).
With respect to claim 11, Foster discloses an apparatus comprising (see Fig. 10):
a silicon device layer 10 comprising:
a plurality of vias 60 (see Figure 8 for identification of vias using reference numeral 60) extending through the silicon device layer 10; and
a microfluidic element 36 (see Fig. 4 for identification) embedded within and protruding from a first (top) surface of the silicon device layer 10, wherein the silicon device layer 10 has a thickness greater than or equal to about 7 micrometers and less than or equal to about 500 micrometers (see [0084]); and
a sealing layer 20 bonded to the silicon device layer 10, wherein the sealing layer, due to having greater thickness (see Fig. 10), has greater rigidity than the silicon device layer 10, and wherein the vias 60 extend entirely through the silicon device layer from a second (bottom) surface of layer 10 through to the first surface of layer 10, wherein the sealing layer 20 is directly connected to and adjacent a first bus 35 (see Fig. 4 for identification) of a plurality of buses (vias 24), and wherein the first bus 35 is a channel that guides fluid through the apparatus (see Fig. 4) and wherein the first bus 35 is immediately adjacent and fluidly connected to the microfluidic element 36 (see Fig. 4 for identification).
While Figure 10 of Foster does not explicitly illustrate that vias 60 are in fluid communication with the microfluidic element 36 (vias 60 appear to be used as electrical connections, and hence they are sealed by bump 94 and runner 32), Foster discloses that vias of the apparatus may also be used for the purpose of establishing fluidic connections (see abstract and [0050]). Based on the disclosure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have to formed the vias 60 as conduits for transporting fluid to the microfluidic element 36 for detection/processing. If the modification is made, then the at least one via 60 would be in fluidic communication with the microfluidic element 36 as recited in claim 11.
With respect to claim 12, Foster discloses that the layers of the apparatus can have a thickness up to 100 microns (see [0084] and claim 9). Based on the disclosure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have provided the sealing layer 10 with a thickness of about 100 microns.
With respect to claim 13, the sealing layer 20, which is compositionally identical to the device layer 10, is made from silicon (see [0109]).
With respect to claim 14, Foster discloses that vias can have diameters that fall within the claimed range (see [0085]). Based on the disclosure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have provided the apparatus with vias having a diameter that falls within the claimed range.
With respect to claim 16, the vias are situated in a surface of the silicon device layer 10 that is opposite the sealing layer 20 (i.e. the vias are situated at the top surface of layer 10) (see Fig. 10). Moreover, the claim positively recites a single via (see “at least one via”). Consequently, the spatial density of a plurality of vias does not further limit the claimed invention.
Claims 1-4 and 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Foster in view of Toner et al. (“Toner”) (US 2009/0014360 A1).
With respect to claim 1, Foster discloses an apparatus comprising (see Fig. 10):
a silicon (see [0084]) device layer 10 (see Fig. 9 for identification) comprising a plurality of vias 60 (see Fig. 8 for identification of vias), the plurality of vias spaced apart from one another by 25 microns or less (see [0085]), and the plurality of vias 60 extending through the silicon device layer (in Fig. 10, the device layer 10 is thinned such that the vias extend through the device layer);
a sealing layer 20 bonded to the silicon device layer, wherein the sealing layer, due to having greater thickness (see Fig. 10), has greater rigidity than the silicon device layer 10, and wherein the sealing layer 20 is directly connected to and adjacent a first bus 35 (see Fig. 4 for identification) of a plurality of buses 24 and wherein the silicon device layer 10 is directly connected to and adjacent the first bus 35; and
a microfluidic element 36 embedded within and protruding from a first (top) surface of the silicon device layer 10 (see Fig. 4), and wherein the first bus 35 is a channel that guides fluid through the apparatus and wherein the first bus is immediately adjacent and connected to the microfluidic element 36 (see Fig. 4).
The apparatus taught by Foster differs from the claimed invention in that Foster does not explicitly disclose a device comprising vias arranged in a spatial density that falls within the claimed range. In addition, Foster does not disclose the recitation, “wherein the sealing layer is directly connected to and adjacent a first surface of the microfluidic element, wherein the silicon device layer is directly connected to and adjacent a second surface of the microfluidic element, wherein the second surface is opposite the first surface”.
Regarding the spatial density of the vias, given that the spatial density of the vias taught by Foster (25 microns or less) overlaps the claimed range, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have provided the silicon device layer 10 with inter-via spacing that falls within the claimed range.
Regarding the quoted recitation above not taught by Foster, given that the apparatus is intended to be used as a biological or a chemical sensor (see [0003]), it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have implemented the microfluidic element 36 as a conventional sensor, for example a sensor that utilizes a deterministic displacement array (DDA) (i.e. array of obstacles in a channel), as taught by Toner (see [0004], [0195] and [0223] of Toner disclosing that DDA has utility in microfluidic environmental sensing). If the modification is made, then the sealing layer 20 would be directly connected to and adjacent a first surface of the microfluidic element (i.e. top surface of the array of obstacles) and the silicon device layer 10 would be directly connected to and adjacent an opposing second surface of the microfluidic element (i.e. bottom surface of the array of obstacles).
With respect to claim 2, the sealing layer 20, which is compositionally identical to the device layer, is made from silicon (see [0109]).
With respect to claim 3, the silicon device layer 10 has a thickness greater than or equal to about 7 micrometers and less than or equal to about 500 micrometers (see [0084]).
With respect to claim 4, Foster discloses that vias having a spatial density that falls within the claimed range can have diameters that fall within the claimed range (see [0085]). Based on the disclosure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have provided the apparatus with vias having a diameter that falls within the claimed range.
With respect to claim 6, as discussed above (see rejection of claim 11), it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have to formed a via 60 as a conduit for transporting fluid to the microfluidic element 36 for detection/processing.
With respect to claim 7, the microfluidic element 36 is encapsulated by a combination of the silicon device layer 10 and the sealing layer 20 (see Fig. 10).
With respect to claim 8, as discussed above (see rejection of claim 1), the microfluidic element 36 would be adapted to utilize a DDA.
With respect to claim 9, the apparatus comprises a fluidic bus (first bus 35) in fluid communication with the microfluidic element 36 (see Fig. 4).
With respect to claim 10, as discussed above (see rejection of claim 1), the sealing layer 20 is thicker than the silicon device layer 10 (see Fig. 10).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL S HYUN whose telephone number is (571)272-8559. The examiner can normally be reached M-F 8:30-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Luan Van can be reached at 571-272-8521. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PAUL S HYUN/Primary Examiner, Art Unit 1796