Prosecution Insights
Last updated: April 19, 2026
Application No. 17/816,098

POWER ELECTRONICS PARAMETER INDEPENDENCY USING MEMRISTOR CONTROL

Final Rejection §103§112
Filed
Jul 29, 2022
Examiner
LOPEZ ALVAREZ, OLVIN
Art Unit
2117
Tech Center
2100 — Computer Architecture & Software
Assignee
The Florida State University Research Foundation, Inc.
OA Round
4 (Final)
48%
Grant Probability
Moderate
5-6
OA Rounds
3y 7m
To Grant
92%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allow Rate
250 granted / 515 resolved
-6.5% vs TC avg
Strong +44% interview lift
Without
With
+43.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
31 currently pending
Career history
546
Total Applications
across all art units

Statute-Specific Performance

§101
10.3%
-29.7% vs TC avg
§103
42.6%
+2.6% vs TC avg
§102
14.7%
-25.3% vs TC avg
§112
25.7%
-14.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 515 resolved cases

Office Action

§103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the amendments of 12/11/2025, claim 2, 9, and 16 were cancelled. Thus, Claims 1, 3-8, 10-15, and 17-20 are still pending in this Application. The specification was amended. Response to Amendments/Remarks Applicants’ arguments on page 9, with respect to objections to the specification/disclosure have been fully considered and they are respectfully persuasive. Therefore, objections to the specification have been withdrawn. The amendments to paragraph [0016] dated 12/11/2025 are entered. Applicant’s argument/remarks, on page 9, with respect to rejections to claims 1-20 under 35 USC § 101 have been fully considered and they are persuasive. Therefore, rejections to the claims under 35 USC § 101 have been withdrawn. Applicant' s arguments on pages 10-11, with respect to rejections to claims 1, 3-8, 10-15, and 17-20 under 35 USC § 103 have been fully considered and are persuasive. Therefore, rejections to the claims under 35 USC § 103 have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Schierling. Claim Objections Claim 1 and 5 are objected to because of the following informalities: Claim 1 lines 6, 11, 13, 14, 15; Claim 5 line 2; respectively recite, “the memristive impedance”. These terms lack of proper antecedent basis in the claim. Line 5-6 recite “a virtual memristive impedance”. Claim language consistency throughout the claims is important in order to avoid confusion when interpreting the claims. It seems that each instance of the term above should be -- a virtual memristive impedance-- Claim 1 further recites “wherein the memristive impedance is virtual memristive low pass filter”. The article “a” is missing. This seems to be --wherein the memristive impedance is a virtual memristive low pass filter-- Appropriate correction is required. Claim Rejections - 35 USC § 112 Claims 1, 3-8, 10-15, and 17-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 1, 8, and 15, recites “receiving, … a sampling rate corresponding to a switching frequency of the control system…”. These limitations do not have sufficient support in the disclosure as originally filed. The disclosure does not disclose the terms “sampling rate” and “corresponding”. The limitation as a whole is interpreted in the broadest reasonable interpretation as a sampling rate similar or analogous to the switching frequency. There is not suggested support in the disclosure for the recited limitations The Applicant is welcome to provide specific support in the disclosure for the claimed subject matter. As to claim 3-7, 10-14 and 17-20, these dependent claims are rejected for the same reasons mutatis mutandis as their respective parent claim since they inherit the same error. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1, 3-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “sending, by the control system and to the power converter, a first output signal based on, the first output signal indicating a switching pattern for the power converter, wherein the first output signal is based on an output from the virtual memristor to enhance stability of the power converter”. These limitations are unclear and confusing and make the claim indefinite. A first output signal based on the first output signal is confusing. Also, it seems that the comma (,) after “based on” was not deleted. It seems that the intended amendments should have been similar to claim 15, which is very clear. Thus, for purposes of Examination and in light of claim 15, Claim 1 will be interpreted as: --sending, by the control system and to the power converter, a first output signal, the first output signal indicating a switching pattern for the power converter, wherein the first output signal is based on an output from the virtual memristor to enhance stability of the power converter-- As to claim 3-7, these dependent claims are rejected for the same reasons mutatis mutandis as their parent claim since they inherit the same error. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (Virtual-Impedance-Based Control for Voltage-Source and Current-Source Converters”, 2015) in view Ascoli et al (“Memristor-based filtering applications, 2013; Cited in the IDS), Keshmiri (“A Study of the Memristor Models and Applications”, 2014), Price et al (US 10128758) and Schierling (US 20030155874). As per claim 1, Wang teaches a method comprising: receiving, by a control system at a sampling rate (see page 7021 Col 1 last par, “…where Ts is the sampling period of the control system….”; also, see page 7030 “A multisampling (at 3024 Hz) method is used to reduce the effects of time delays associated with such a low switching frequency; also, see 7030 Col 2 last par “…which has a switching frequency of 540 Hz. Space vector PWM …”) where Ts is the sampling period of the control system) and from a power converter, first data associated with operation of the power converter (see page 7020 Fig. 1 the virtual impedances are connected to a converter system; page 7027 Design of Inner Virtual Impedance Controller and see page 7028 Fig. 17 LPF-based inner virtual impedance controller for the converter current control loop. Fig. 17 shows a first data Vcf of a capacitor of the converter or the first data is the output of the controller Gvi,1(s), see page 7028 Col 1 last par. “Fig. 17 illustrates an LPF in Gvi,1 (s) within the capacitor voltage feedback for stabilizing the converter current control loop [26], where the LPF cutoff frequency can be below one-tenth of the bandwidth of current control loop for damping subsynchronous oscillations, or be above the bandwidth of current control for mitigating harmonic instability”), wherein the first data is received over a feedforward branch including a virtual(see page 7027 Design of Inner Virtual Impedance Controller and see Fig. 17 LPF-based inner virtual impedance controller for the converter current control loop. Fig. 17 shows a first data Vcf of a capacitor of the converter; see page 7026 col1 last par. “…the filter capacitor voltage VCf…”), wherein the (see Fig. 17 page 7028, a filter is usually inherently associated with a transfer function, in this case is Fvi 1(s), and wherein the memristive impedance is virtual (see page 7028 Col 1 last par. “Besides these basic controllers, the LPF [26] … can also be used. Fig. 17 illustrates an LPF in Gvi,1 (s) within the capacitor voltage feedback for stabilizing the converter current control loop [26], where the LPF cutoff frequency can be below one-tenth of the bandwidth of current control loop for damping subsynchronous oscillations), sending, by the control system and to the power converter, a first output signal, the first output signal indicating a switching pattern for the power converter, (see Fig. 17 and see 7028 Col 1 last paragraph “Fig. 17 illustrates an LPF in Gvi,1 (s) within the capacitor voltage feedback for stabilizing the converter current control loop [26], where the LPF cutoff frequency can be below one-tenth of the bandwidth of current control loop for damping subsynchronous oscillations, or be above the bandwidth of current control for mitigating harmonic instability….”, Fig. 17 GD(s) represents the transfer function of modulated current producing a modulated output which can be the first output signal or Yps controller outputs a signal which can be considered the output signal; also, see Fig. 1 the signal is a PWM signal for switching a VSC), wherein the first output signal is based on an output from the virtual (see Fig. 17 and Fig. 18 and Fig. 19 ). However, Wang does not explicitly teach: receiving at a sampling rate corresponding to a switching frequency of the control system; including a memristive impedance operating as a self-adaptive passband for the control system to achieve stable performance of the power converter under parameter variation, the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, wherein the memristance value comprises a sum of a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a switching frequency of the power converter by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance when doped is less than a switching frequency of the power converter by a second amount (0018 RA), and wherein the second amount is greater than the first amount, wherein the memristive impedance includes a virtual memristor that is implemented in control logic, wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter; wherein the first output signal is based on an output from the virtual memristor to enhance stability of the power converter. However, Ascoli teaches a virtual memristive impedance (see Fig. 4 memristive impedance is a low pass filter MC filter; also, see page 1 Col 2 pars. 2-3 “…A memristor-based filter may be easily derived from its resistor based counterpart by simply replacing each resistor with a memristor…Two simple memristor-based filters with adaptable frequency response, specifically a first-order low-pass filter with tunable cut-off frequency and a second-order band-pass filter with tunable quality factor, are designed and their proper functioning is thoroughly validated. This work represents the first step towards a modular design of memristor-based analog filters”; also, see page 3 last par. “This section shall derive the memristor-based adaptable versions of a couple of basic classical analog filters [10] , specifically a first-order low-pass filter with tunable cut-off frequency… We shall first consider a modified version of the basic first order R-C low-pass filter, where the resistor is replaced by a memristor. The resulting circuit , usually referred to as an M- C low-pass filter, is shown in Fig. 4,”), operating as a self-adaptive passband for the control system to achieve stable performance of a system under parameter variation (see page 1 Col 2 pars. 2-3; also, see page 3 Col 2 A . “First- order M- C filter with tunable cut- off frequency… Let us design a filter with tunable cut-off frequency expressed by We = W􀃍x) . It is worthy to note that the amplitude of the filter input signal Vi should be chosen sufficiently small so as to prevent any unwanted change in memristor state… the boundary conditions and parameters D and j.l are kept unvaried. The on and off resistance of the memristor are respectively set to Ron = 100 n (as a result k = 104 C) and Raf f = 6000 n. Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kH z] (the lower an upper limit respectively refer to the largest and smallest possible memristance values…”, the memristor acts as a self-adaptive passband based on the current/voltage that causes doping of the memristor, thus, changing the voltage/current input will cause the Memristor to cause a hysteresis in the resistances which results in the cutting frequency to change ), the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, (the inherent transfer function of an MC filter is 1/ (1 + JwRmC), wherein Rm is the Memristance of a memristor; see page 3 Col 2 “First- order M- C filter with tunable cut- off frequency We shall first consider a modified version of the basic first order… The resulting circuit , usually referred to as an M-C low-pass filter, is shown in Fig. 4, where Vi and Vo respectively denote the filter input and output voltages, and the memristor circuit of Fig. 1 is replaced with its symbol (note the position of nodes y and z… Let us first focus our attention on the first-order low-pass filter of Fig. 1 . The capacitance is set to C = 1mu F. The BCM PSpice circuit of Fig. 1 models the memristor… The on and off resistance of the memristor are respectively set to Ron = 100 ohms (as a result k = 104 C) and Roff = 6000 ohms. Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kHz] (the lower an upper limit respectively refer to the largest and smallest possible memristance values…); also, see page 4 Col 1 last 6 lines “With reference to Fig. 5(a) , taking the values Vej the memristor state assumes at start (j = 0) and during the time intervals between each pair of consecutive programming pulses (j = 1 , 2 , 3 , 4, 5 , 6 , 7) , the filter transfer function is computed for each memristor state value by means of an Alternating Current (AC) Analysis-based simulation (see Fig. 6, where the)), wherein the memristance value comprises a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a frequency by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance is less than a frequency by a second amount when doped, and wherein the second amount is greater than the first amount (see page 3 Col 2 “…Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kHz] (the lower an upper limit respectively refer to the largest and smallest possible memristance values… The on and off resistance of the memristor are respectively set to Ron = 100 ohms (as a result k = 104 C) and Roff = 6000 ohms” and see page 4 Col 1 last 6 lines “With reference to Fig. 5(a) , taking the values Vej the memristor state assumes at start (j = 0) and during the time intervals between each pair of consecutive programming pulses (j = 1 , 2 , 3 , 4, 5 , 6 , 7) , the filter transfer function is computed for each memristor state value by means of an Alternating Current (AC) Analysis-based simulation (see Fig. 6, where the…”; also, see page 5 Col 1 last paragraph “The memristor on and off resistances are chosen as Ron = 10 ohms (as a result , k = 103 C- I ) and Roff = 1000 ohms respectively”, Ron and Roff are equivalent to RA and RB. The values when doped correspond to the filter receiving a current value or being doped with ions/charge. Thus, Ra and Rb will cause the memristor filter to achieve a band of cutting frequency which will be less than the desired output frequency), wherein the memristive impedance includes a virtual memristor that is implemented in control logic (see page 3 “The capacitance is set to C = 1mu F. The BCM PSpice circuit of Fig. 1 models the memristor”, A PSpice refers to software/control logic/program that is used to implement the memristor as a virtual memristor or software based memristor; also, see page 4 Col 1 par. 2 “…During the programming phases the memristance is adjusted as specified by the control circuitry. When the memristor state increases (decreases) , the bandwidth of the filter gets larger (smaller) . This implies an increase (decrease) in the amplitude of the filter output voltage under the applied sine waveform…”; also, see page 5 Col 1 par. 2 “…The capacitance Cx in the memristor emulator of Fig. 1 is chosen…”; also, see page 6 the conclusion “…a first-order low-pass filter with tunable cutoff frequency and a second-order band-pass filter with tunable quality factor (where parameter tuning depends on the memductance of the memristor) , were designed and analyzed through computer simulations of a PSpice-based BCM emulator…”, wherein an output signal is based on an output from the virtual memristor to enhance stability of an output signal (see page 5 Col 1 the table shows outputs; also, se Fig. 5). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s invention to include a memristive impedance such as an MC filter operating as a self-adaptive passband for the control system to achieve stable performance of a system under parameter variation, the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, wherein the memristance value comprises a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a frequency by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance is less than a frequency by a second amount when doped, and wherein the second amount is greater than the first amount, wherein an output signal is based on an output from the virtual memristor to enhance stability of the output signal as taught by Ascoli in order to provide a virtual impedance such as MC filter since these components are programmable and their cutoff frequency is tunable and dynamically changed and its properties are time variant (Analog RC-LPF circuits are constant and time invariant while MC-LPF are time variants and can be tuned; see page 2 Col 2 MC filter with tunable cutoff frequency), also, applying a memristor based virtual impedance to the system Wang will result in an output signal with an adaptive range and enhanced stability output signal. Ascoli teaches that the Memristor has parameters such as Ron and Roff, associated with a Memristance, which are equivalent to lower and upper limits of resistance values, and teaches that the Memristor are fabricated by HP labs, Wang-Ascoli teach a first order memristor based low pass filter MC filter, wherein the inherent transfer function of a Memristive MC filter is 1/ (1 + JwRmC), wherein Rm is the Memristance of a memristor, but Wang-Ascoli does not explicitly defines or exemplifies the Memristance, and thus, Wang-Ascoli does not explicitly teach wherein the memristance value comprises a sum of a first value and a second value, and a cutoff frequency of the memristive impedance is less than a switching frequency of the power converter by a first amount when undoped and by a second amount when doped. However, Keshmiri teaches a memristor comprising a memristance value defined by a sum of a first value and a second value (see page 54 equation 47 and page 91 equation 73; also, see page 95 equation 81 RMEM ( x)= RON x + ROFF (1− x), , wherein the first value includes a product of a first memristance value and a weight value (RON x), and wherein the second value includes a product of a second memristance value and the weight value (see page 54 equation 47 and page 91 equation 73; also, see page 68 par. 1; also, see page 95 equation 81 ROFF (1− x)), and the first value and second value corresponds to doped and undoped values (see page 95 7.3 “where the sum of resistances of both the doped and undoped regions of the device gives the total resistance, as shown in (81).”). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang-Ascoli invention to include a transfer function associated with the memristive impedance (see Wang-Ascoli teach a first order MC low pass filter which inherently includes a transfer function 1/ (1 + JwRmC)) comprising a memristive value comprising a sum of a first value and a second value, wherein the first value includes a product of a first memristance value and a weight value, and wherein the second value includes a product of a second memristance value and the weight value, d the first value and second value corresponds to doped and undoped values as taught by Keshmiri by including a memristor with a memristance defined as RMEM ( x)= RON x+ ROFF (1− x)) because Memristors have the capacity of storing the resistance a (see page 45 the Memristor; and see page 47) and are configurable and time variant. While the cut-off frequency of the memristive impedance is an inherent characteristic of the component/circuit (cut-off frequency Fc of memristor filter is found by Fc = 1/ 2ΠMkC, where Mk = ɑRA + (1- ɑ)RB), and Ascoli teaches the selection of the values of the resistances RA and RB of the memristor to obtain a desired cut-off frequency, Wang-Ascoli-Keshmiri still does not explicitly teach a cutoff frequency of the memristive impedance is less than a switching frequency of the power converter by a first amount when undoped and by a second amount when doped. However, Price teaches a voltage converter comprising an impedance or low pass filter (see Col 6 line 62-63 “the HF filter 412 may be a first order low-pass filter), wherein a cutoff frequency of impedance is set to be less than a switching frequency of the power converter (interpreted in the BRI in light of the disclosure as “less than a switching frequency of the converter”; see Price Col 7 line 1-10 “…the cutoff frequency (e.g., the −3 dB frequency) for the HF filter 412 may be set below the switching frequency of the DC/DC converter 100, …For example, with a converter switching frequency of 140 MHz and a 0 dB crossover frequency for the error amplifier 410 of 1.7 MHz, a filter frequency of 25 MHz may be used to suppress frequencies of signal components that would otherwise sneak through the error amplifier 410 and allow the individual phase drive signals to be generated with the desired phase shifts” ; also, see Col 10 Claim 11). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang-Ascoli- Keshmiri’s combination as taught above to include setting a cutoff frequency of impedance to be less than a switching frequency of the power converter as taught by Price in order to reduce or suppress frequencies found in the output signal and also to reduce the output ripple voltage which reduces the amplitude of the HF output ripple and may allow for automatic phase current balancing to take place (see Col 7 lines 1-15) and apply the teachings of Price such as setting the cut-frequency of the memristive impedance at a value less than the switching frequency of the converter in the combination of Wang-Ascoli-Keshmiri to set the cut-off frequency of their combination’s Memristive impedance when doped and undoped as less than a switching frequency of the power converter to reduce the output ripple voltage which reduces the amplitude of the HF output ripple and may allow for automatic phase current balancing to take place as suggested by Price (see Col 7 lines 1-15). While Wang teaches a sampling rate and a switching frequency Wang-Ascoli-Keshmiri-Price still does not explicitly teach: receiving at a sampling rate corresponding to a switching frequency the first data, wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter (this is an intended or inherent result of selecting a sampling rate corresponding to a switching frequency. The virtual impedance will attenuate all the noise or undesired frequencies in the sample rate/cycle and during the switching frequency interval). Schierling teaches a system comprising receiving, at a sampling rate corresponding to a switching frequency of a control system, data associated with a converter ([0018] “… a common frequency converter having a common line feed and a common intermediate circuit as well as associated inverters, or with separate associated frequency converters, selecting switching frequencies of the inverters and respective sampling rates for determining actual values which are identical or integral multiples of each other…”), wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter (this is an intended or inherent result of selecting a sampling rate corresponding to a switching frequency. The virtual impedance will attenuate all the noise or undesired frequencies in the sample rate/cycle and during the switching frequency interval; also, see [0018]). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s combination as taught above to include receiving, at a sampling rate corresponding to a switching frequency of a control system, data associated with a converter, wherein using this sampling rate in the system of Wang-Ascoli-Keshmiri-Price corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter as taught by Schierling in order to reduce interference and preventing a simultaneous generation of interference currents with identical polarity in all inverters by using a modulation symmetry of voltage phasors, without impairing the synchronization of the dynamic characteristics (see [0018]). As per claim 3, Wang-Ascoli-Keshmiri-Price-Schierling teaches the method of claim 1, further comprising: Wang further teaches receiving, by the control system, a reference value (see Fig. 17 reference current iLf); receiving, by the control system and from the power converter, second data (see Fig. 17 measured current iLf; also, see page 7026 Col 2 par. 5 “… The converter current iLf ,..”); and calculating, by the control system, a first difference between the reference value and the second data from the power converter (see Fig. 17 PNG media_image1.png 211 273 media_image1.png Greyscale ). As per claim 4, Wang-Ascoli-Keshmiri-Price-Schierling teaches the method of claim 3, Wang further teaches wherein the first difference represents an error value associated with the power converter (see Fig. 17 measured current iLf; also, see page 7026 Col 2 par. 5 “… The converter current iLf ,..” PNG media_image1.png 211 273 media_image1.png Greyscale ), and wherein the method further comprises: determining, by the control system, an error compensated output value based on an error compensation performed using the error value (see Fig. 17 Gci(s) and see 7020 Col 1 last par. “The grid current ig is controlled by a current controller Gci(s)…”); and determining, by the control system, a summation of the error compensated output value and the first data to produce a second output value (see Fig. 17 the output of GCi and the output if the virtual impedance Gvi, 1(s) are summed PNG media_image2.png 200 400 media_image2.png Greyscale ), wherein the first output signal from the control system to the power converter is based on the second output value (see Fig. 17). As per claim 5, Wang-Ascoli-Keshmiri-Price-Schierling teaches the method of claim 1, Ascoli teaches that the Memristor has parameters such as Ron and Roff with are equivalent to lower and upper limits of resistance values, and teaches that the Memristor are fabricated by HP labs, and Wang-Ascoli teach a first order memristor based low pass filter MC filter, wherein the inherent transfer function of a MC filter is 1/ (1 + JwRmC), wherein Rm is the Memristance of a memristor, however, Wang Ascoli do not define the equation of Rm, and thus, Wang-Ascoli does not explicitly teach wherein the transfer function associated with the memristive impedance further comprises a product of first value and a weight and a product of the second value and a difference between a third values and the weight value. However, Keshmiri further teaches a memristor comprising a memristance comprises a product of first value and a weight and a product of the second value and a difference between a third values and the weight value (see page 54 equation 47 and page 91 equation 73; also, see page 95 equation 81 RMEM ( x)= RON x + ROFF (1− x)). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s combination as taught above to include a transfer function associated with the memristive impedance further comprises a memristance that comprises a product of first value and a weight and a product of the second value and a difference between a third values and the weight value as taught by Keshmiri by including a memristor with a memristance defined as RMEM ( x)= RON x+ ROFF (1− x) because Memristors have the capacity of storing the resistance a (see page 45 the Memristor; and see page 47) and are configurable and time variant. As per claim 6, Wang-Ascoli-Keshmiri-Price-Schierling teaches the method of claim 1, Wang further teaches wherein the first output signal is a pulse-width modulated (PWM) signal (see Fig. 17 Vm is a modulated signal). Wang further teaches Fig.1 an inner virtual impedance with a PWM generator (see Fig. 1 and see page 7020 col 2 par. 1 “The inner virtual impedance Zvi(s), which is directly applied to the PWM modulator and is, thus, influenced by the time delays of the digital control system”). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang-Ascoli’s combination as taught above to include an inner virtual impedance with a PWM generator to generate the first output signal as a pulse-width modulated (PWM) signal as taught by Wang in order to control the converter (see Figs. 1-2). As per claim 7, Wang-Ascoli-Keshmiri-Price-Schierling teaches the method of claim 1, Wang further teaches wherein the first data comprises at least one of: a voltage signal associated with a capacitor of the power converter and a current signal associated with an inductor of the power converter (see Fig. 17 Vcf, and see page 7036 last par. “…where the filter capacitor voltage VCf…”). Claim(s) 8, 10-15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (Virtual-Impedance-Based Control for Voltage-Source and Current-Source Converters”, 2015) in view Ascoli et al (“Memristor-based filtering applications, 2013; Cited in the IDS), Keshmiri (“A Study of the Memristor Models and Applications”, 2014), Price et al (US 10128758) Hartman et al (US 20200358353, cited in the IDS), and Schierling (US 20030155874). As per claim 8, Wang teaches a control system comprising: A power converter (see Fig. 1 power converter); and A control system (see Fig. 1 control system comprising control components) comprising: receive, by a control system at a sampling rate (see page 7021 Col 1 last par, “…where Ts is the sampling period of the control system….”; also, see page 7030 “A multisampling (at 3024 Hz) method is used to reduce the effects of time delays associated with such a low switching frequency; also, see 7030 Col 2 last par “…which has a switching frequency of 540 Hz. Space vector PWM …”) where Ts is the sampling period of the control system) and from a power converter, first data associated with operation of the power converter (see page 7020 Fig. 1 the virtual impedances are connected to a converter system; page 7027 Design of Inner Virtual Impedance Controller and see page 7028 Fig. 17 LPF-based inner virtual impedance controller for the converter current control loop. Fig. 17 shows a first data Vcf of a capacitor of the converter or the first data is the output of the controller Gvi,1(s), see page 28 Col 1 last par. “Fig. 17 illustrates an LPF in Gvi,1 (s) within the capacitor voltage feedback for stabilizing the converter current control loop [26], where the LPF cutoff frequency can be below one-tenth of the bandwidth of current control loop for damping subsynchronous oscillations, or be above the bandwidth of current control for mitigating harmonic instability”), wherein the first data is received over a feedforward branch including a (see page 7027 Design of Inner Virtual Impedance Controller and see Fig. 17 LPF-based inner virtual impedance controller for the converter current control loop. Fig. 17 shows a first data Vcf of a capacitor of the converter; see page 7026 col1 last par. “…the filter capacitor voltage VCf…”), wherein the (see Fig. 17 page 7028, a filter is usually inherently associated with a transfer function, in this case is Fvi 1(s), and perform, by to the power converter, switching actions based on a first output signal received from the control system (see Fig. 17 and see 7028 Col 1 last paragraph “Fig. 17 illustrates an LPF in Gvi,1 (s) within the capacitor voltage feedback for stabilizing the converter current control loop [26], where the LPF cutoff frequency can be below one-tenth of the bandwidth of current control loop for damping subsynchronous oscillations, or be above the bandwidth of current control for mitigating harmonic instability….”, Fig. 17 GD(s) represents the transfer function of modulated current producing a modulated output which can be the first output signal or Yps controller outputs a signal which can be considered the output signal; also, see Fig. 1 the signal is a PWM signal for switching a VSC), wherein the first output signal is based on an output from the virtual (see Fig. 17 and Fig. 18 and Fig. 19 ). However, Wang does not explicitly teach including one or more processors operable to execute a set of computer-executable instructions; and memory operable to store the set of computer-executable instructions operable to: receive at a sampling rate corresponding to a switching frequency of the control system; including a memristive impedance, the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, wherein the memristance value comprises a sum of a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a switching frequency of the power converter by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance when doped is less than a switching frequency of the power converter by a second amount, and wherein the second amount is greater than the first amount, wherein the memristive impedance includes a virtual memristor that is implemented in control logic, wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter; wherein the first output signal is based on an output from the virtual memristor to enhance stability of the power converter. However, Ascoli teaches a virtual memristive impedance (see Fig. 4 memristive impedance is a low pass filter MC filter; also, see page 1 Col 2 pars. 2-3 “…A memristor-based filter may be easily derived from its resistor based counterpart by simply replacing each resistor with a memristor…Two simple memristor-based filters with adaptable frequency response, specifically a first-order low-pass filter with tunable cut-off frequency and a second-order band-pass filter with tunable quality factor, are designed and their proper functioning is thoroughly validated. This work represents the first step towards a modular design of memristor-based analog filters”; also, see page 3 last par. “This section shall derive the memristor-based adaptable versions of a couple of basic classical analog filters [10] , specifically a first-order low-pass filter with tunable cut-off frequency… We shall first consider a modified version of the basic first order R-C low-pass filter, where the resistor is replaced by a memristor. The resulting circuit , usually referred to as an M- C low-pass filter, is shown in Fig. 4,”), operating as a self-adaptive passband for the control system to achieve stable performance of a system under parameter variation (see page 1 Col 2 pars. 2-3; also, see page 3 Col 2 A . “First- order M- C filter with tunable cut- off frequency… Let us design a filter with tunable cut-off frequency expressed by We = W􀃍x) . It is worthy to note that the amplitude of the filter input signal Vi should be chosen sufficiently small so as to prevent any unwanted change in memristor state… the boundary conditions and parameters D and j.l are kept unvaried. The on and off resistance of the memristor are respectively set to Ron = 100 n (as a result k = 104 C) and Raf f = 6000 n. Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kH z] (the lower an upper limit respectively refer to the largest and smallest possible memristance values…”, the memristor acts as a self-adaptive passband based on the current/voltage that causes doping of the memristor, thus, changing the voltage/current input will cause the Memristor to cause a hysteresis in the resistances which results in the cutting frequency to change ), the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, (the inherent transfer function of an MC filter is 1/ (1 + JwRmC), wherein Rm is the Memristance of a memristor; see page 3 Col 2 “First- order M- C filter with tunable cut- off frequency We shall first consider a modified version of the basic first order… The resulting circuit , usually referred to as an M-C low-pass filter, is shown in Fig. 4, where Vi and Vo respectively denote the filter input and output voltages, and the memristor circuit of Fig. 1 is replaced with its symbol (note the position of nodes y and z… Let us first focus our attention on the first-order low-pass filter of Fig. 1 . The capacitance is set to C = 1mu F. The BCM PSpice circuit of Fig. 1 models the memristor… The on and off resistance of the memristor are respectively set to Ron = 100 ohms (as a result k = 104 C) and Roff = 6000 ohms. Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kHz] (the lower an upper limit respectively refer to the largest and smallest possible memristance values…); also, see page 4 Col 1 last 6 lines “With reference to Fig. 5(a) , taking the values Vej the memristor state assumes at start (j = 0) and during the time intervals between each pair of consecutive programming pulses (j = 1 , 2 , 3 , 4, 5 , 6 , 7) , the filter transfer function is computed for each memristor state value by means of an Alternating Current (AC) Analysis-based simulation (see Fig. 6, where the)), wherein the memristance value comprises a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a frequency by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance is less than a frequency by a second amount when doped, and wherein the second amount is greater than the first amount (see page 3 Col 2 “…Under this parameter setting the cut-off frequency of the filter may assume values within closed interval [26. 5258 Hz, 1 . 5915 kHz] (the lower an upper limit respectively refer to the largest and smallest possible memristance values… The on and off resistance of the memristor are respectively set to Ron = 100 ohms (as a result k = 104 C) and Roff = 6000 ohms” and see page 4 Col 1 last 6 lines “With reference to Fig. 5(a) , taking the values Vej the memristor state assumes at start (j = 0) and during the time intervals between each pair of consecutive programming pulses (j = 1 , 2 , 3 , 4, 5 , 6 , 7) , the filter transfer function is computed for each memristor state value by means of an Alternating Current (AC) Analysis-based simulation (see Fig. 6, where the…”; also, see page 5 Col 1 last paragraph “The memristor on and off resistances are chosen as Ron = 10 ohms (as a result , k = 103 C- I ) and Roff = 1000 ohms respectively”, Ron and Roff are equivalent to RA and RB. The values when doped correspond to the filter receiving a current value or being doped with ions/charge. Thus, Ra and Rb will cause the memristor filter to achieve a band of cutting frequency which will be less than the desired output frequency), wherein the memristive impedance includes a virtual memristor that is implemented in control logic (see page 3 “The capacitance is set to C = 1mu F. The BCM PSpice circuit of Fig. 1 models the memristor”, A PSpice refers to software/control logic/program that is used to implement the memristor as a virtual memristor or software based memristor; also, see page 4 Col 1 par. 2 “…During the programming phases the memristance is adjusted as specified by the control circuitry. When the memristor state increases (decreases) , the bandwidth of the filter gets larger (smaller) . This implies an increase (decrease) in the amplitude of the filter output voltage under the applied sine waveform…”; also, see page 5 Col 1 par. 2 “…The capacitance Cx in the memristor emulator of Fig. 1 is chosen…”; also, see page 6 the conclusion “…a first-order low-pass filter with tunable cutoff frequency and a second-order band-pass filter with tunable quality factor (where parameter tuning depends on the memductance of the memristor) , were designed and analyzed through computer simulations of a PSpice-based BCM emulator…”, wherein an output signal is based on an output from the virtual memristor to enhance stability of an output signal (see page 5 Col 1 the table shows outputs; also, se Fig. 5). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s invention to include a memristive impedance such as an MC filter operating as a self-adaptive passband for the control system to achieve stable performance of a system under parameter variation, the memristive impedance is associated with a transfer function (hf), wherein the transfer function comprises a memristance value, wherein the memristance value comprises a first value and a second value, and wherein the first value is selected such that a cutoff frequency of the memristive impedance when undoped is less than a frequency by a first amount to capture a ramp-up during a transient period while attenuating high-frequency noise, wherein the second value is selected such that the cutoff frequency of the memristive impedance is less than a frequency by a second amount when doped, and wherein the second amount is greater than the first amount, wherein an output signal is based on an output from the virtual memristor to enhance stability of the output signal as taught by Ascoli in order to provide a virtual impedance such as MC filter since these components are programmable and their cutoff frequency is tunable and dynamically changed and its properties are time variant (Analog RC-LPF circuits are constant and time invariant while MC-LPF are time variants and can be tuned; see page 2 Col 2 MC filter with tunable cutoff frequency), also, applying a memristor based virtual impedance to the system Wang will result in an output signal with an adaptive range and enhanced stability output signal. Ascoli teaches that the Memristor has parameters such as Ron and Roff, associated with a Memristance, which are equivalent to lower and upper limits of resistance values (RA and RB), and teaches that the Memristor are fabricated by HP labs, Wang-Ascoli teach a first order memristor based low pass filter MC filter, wherein the inherent transfer function of a Memristive MC filter is 1/ (1 + JwRmC), wherein Rm is the Memristance of a memristor, but Wang-Ascoli does not explicitly defines or exemplifies the Memristance, and thus, Wang-Ascoli does not explicitly teach wherein the memristance value comprises a sum of a first value and a second value, and a cutoff frequency of the memristive impedance is less than a switching frequency of the power converter by a first amount when undoped and by a second amount when doped. However, Keshmiri teaches a memristor comprising a memristance value defined by a sum of a first value and a second value (see page 54 equation 47 and page 91 equation 73; also, see page 95 equation 81 RMEM ( x)= RON x + ROFF (1− x), , wherein the first value includes a product of a first memristance value and a weight value (RON x), and wherein the second value includes a product of a second memristance value and the weight value (see page 54 equation 47 and page 91 equation 73; also, see page 68 par. 1; also, see page 95 equation 81 ROFF (1− x)), and the first value and second value corresponds to doped and undoped values (see page 95 7.3 “where the sum of resistances of both the doped and undoped regions of the device gives the total resistance, as shown in (81).”). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang-Ascoli invention to include a transfer function associated with the memristive impedance (see Wang-Ascoli teach a first order MC low pass filter which inherently includes a transfer function 1/ (1 + JwRmC)) comprising a memristive value comprising a sum of a first value and a second value, wherein the first value includes a product of a first memristance value and a weight value, and wherein the second value includes a product of a second memristance value and the weight value, d the first value and second value corresponds to doped and undoped values as taught by Keshmiri by including a memristor with a memristance defined as RMEM ( x)= RON x+ ROFF (1− x)) because Memristors have the capacity of storing the resistance a (see page 45 the Memristor; and see page 47) and are configurable and time variant. While the cut-off frequency of the memristive impedance is an inherent characteristic of the component/circuit (cut-off frequency Fc of memristor filter is found by Fc = 1/ 2ΠMkC, where Mk = ɑRA + (1- ɑ)RB), and Ascoli teaches the selection of the values of the resistances RA and RB of the memristor to obtain a desired cut-off frequency, Wang-Ascoli-Keshmiri still does not explicitly teach a cutoff frequency of the memristive impedance is less than a switching frequency of the power converter by a first amount when undoped and by a second amount when doped. However, Price teaches a voltage converter comprising an impedance or low pass filter (see Col 6 line 62-63 “the HF filter 412 may be a first order low-pass filter), wherein a cutoff frequency of impedance is set to be less than a switching frequency of the power converter (interpreted in the BRI in light of the disclosure as “less than a switching frequency of the converter”; see Price Col 7 line 1-10 “…the cutoff frequency (e.g., the −3 dB frequency) for the HF filter 412 may be set below the switching frequency of the DC/DC converter 100, …For example, with a converter switching frequency of 140 MHz and a 0 dB crossover frequency for the error amplifier 410 of 1.7 MHz, a filter frequency of 25 MHz may be used to suppress frequencies of signal components that would otherwise sneak through the error amplifier 410 and allow the individual phase drive signals to be generated with the desired phase shifts” ; also, see Col 10 Claim 11). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang-Ascoli- Keshmiri’s combination as taught above to include setting a cutoff frequency of impedance to be less than a switching frequency of the power converter as taught by Price in order to reduce or suppress frequencies found in the output signal and also to reduce the output ripple voltage which reduces the amplitude of the HF output ripple and may allow for automatic phase current balancing to take place (see Col 7 lines 1-15) and apply the teachings of Price such as setting the cut-frequency of the memristive impedance at a value less than the switching frequency of the converter in the combination of Wang-Ascoli-Keshmiri to set the cut-off frequency of their combination’s Memristive impedance when doped and undoped as less than a switching frequency of the power converter to reduce the output ripple voltage which reduces the amplitude of the HF output ripple and may allow for automatic phase current balancing to take place as suggested by Price (see Col 7 lines 1-15). Wang teaches that the virtual impedances are controllers (see 7020 Col 1 par. 1 “virtual impedance controllers and their implementation issues…”). However, Wang-Ascoli-Keshmiri-Price does not explicitly teach one or more processors operable to execute a set of computer-executable instructions; and memory operable to store the set of computer-executable instructions operable to: perform the functions of claim 8. However, Hartman teaches a system comprising one or more processors operable to execute a set of computer-executable instructions; and memory operable to store the set of computer-executable instructions operable to: implementing function of a power converter and virtual impedance (see [0050] “The digital measurements of output voltage and current are provided to a processor which implements the control function of one of the previously described controllers 20, 30, 80. The processor in turn provides a control signal to an output circuit or driver 85 which in turn provides a control signal output to a PWM or other modulator circuit. In some arrangements, the PWM or other modulator circuit may also be provided within the integrated circuit 90). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s combination as taught above to include one or more processors operable to execute a set of computer-executable instructions; and memory operable to store the set of computer-executable instructions operable to: implementing functions of a power converter and virtual impedance of Wang-Ascoli-Keshmiri-Price as taught by Hartman in order to provide a computer implemented method implementing the functions of claim 1 (see [0050-0053]) and to reconfigure the components of the system (see [0053]). While Wang teaches a sampling rate and a switching frequency Wang-Ascoli-Keshmiri-Price-Hartman still does not explicitly teach: receiving at a sampling rate corresponding to a switching frequency the first data, wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter (this is an intended or inherent result of selecting a sampling rate corresponding to a switching frequency. The virtual impedance will attenuate all the noise or undesired frequencies in the sample rate/cycle and during the switching frequency interval). Schierling teaches a system comprising receiving, at a sampling rate corresponding to a switching frequency of a control system, data associated with a converter ([0018] “… a common frequency converter having a common line feed and a common intermediate circuit as well as associated inverters, or with separate associated frequency converters, selecting switching frequencies of the inverters and respective sampling rates for determining actual values which are identical or integral multiples of each other…”), wherein sampling at the sampling rate corresponding to the switching frequency of the control system suppresses switching noise of the power converter (this is an intended or inherent result of selecting a sampling rate corresponding to a switching frequency. The virtual impedance will attenuate all the noise or undesired frequencies in the sample rate/cycle and during the switching frequency interval; also, see [0018]). Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Wang’s combination as taught above to include receiving, at a sampling rate corresponding to a switching frequency of a control system, data associated with a converter, wherein using this sampling rate in the system of Wang-Ascoli-Keshmiri-Price-Hartman corresponding to the switching frequency of the control system suppresses switching noise of the power converter and virtual memristor and maintains frequencies relating to transient responses of the power converter as taught by Schierling in order to reduce interference and preventing a simultaneous generation of interference currents with identical polarity in all inverters by using a modulation symmetry of voltage phasors, without impairing the synchronization of the dynamic characteristics (see [0018]). As to claim 10, this claim is the system claim corresponding to the method claim 3 and is rejected for the same reasons mutatis mutandis. As to claim 11, this claim is the system claim corresponding to the method claim 4 and is rejected for the same reasons mutatis mutandis. As to claim 12, this claim is the system claim corresponding to the method claim 5 and is rejected for the same reasons mutatis mutandis. As to claim 13, this claim is the system claim corresponding to the method claim 6 and is rejected for the same reasons mutatis mutandis. As to claim 14, this claim is the system claim corresponding to the method claim 7 and is rejected for the same reasons mutatis mutandis. As to claim 15, this claim is a non-transitory computer readable medium claim corresponding to the method claim 8 and is rejected for the same reasons mutatis mutandis. As to claim 17, this claim is a non-transitory computer readable medium claim corresponding to the method claim 3 and is rejected for the same reasons mutatis mutandis. As to claim 18, this claim is a non-transitory computer readable medium claim corresponding to the method claim 4 and is rejected for the same reasons mutatis mutandis. As to claim 19, this claim is a non-transitory computer readable medium claim corresponding to the method claim 5 and is rejected for the same reasons mutatis mutandis. As to claim 20, this claim is a non-transitory computer readable medium claim corresponding to the method claim 6 and is rejected for the same reasons mutatis mutandis. Conclusion The prior art made of record and not relied upon, as cited in PTO form 892, is considered pertinent to applicant's disclosure. Zanbaghi et al (US 10009039) teaches a system comprising a low pass filter, and receiving data at a sampling rate corresponding to a switching frequency of a control system (see Col 8 lines 10-15 “a high-impedance mode in which controller 220 causes the switching frequency of switches 410 and 412 of switched-capacitor resistor 408A to be approximately equal to an integer multiple of a sample rate of an analog-to-digital converter (e.g., delta-sigma modulator 308a; see Col 11 lines 34-47 “…low pass filter…”). Trzynadlowski et al (US 20030002299) teaches receiving data at a sampling rate corresponding to a switching frequency of a control system (see 0007 “…The coincidence of the switching and sampling cycles makes the switching frequency constant substantially equal to the sampling frequency”). Natsume (US 20030052813) teaches “… The coincidence of the switching and sampling cycles makes the switching frequency constant substantially equal to the sampling frequency…” Cervera et al (US 20070210777) teaches [0049] “Preferably, the sampling frequency is the same as the switching frequency of the power converter, allowing a fast response time for the linear control circuit. It can be demonstrated that in a properly designed power converter (see discussion by Soto),”. Risbo (US 20080297382) teaches in [0047] “… sample frequency 2f.sub.sw (i.e., the Nyquist rate for the PWM sample stream at its switching frequency f.sub.sw) by virtue of the multiplication with the (-1).sup.k term”. Prodic et al (US 20090267582) teaches in [0034] “It could be done with an ADC converter whose sampling rate is much higher than the switching frequency. The need for a very high sampling rate converter can be described through FIG. 4,”; also, see 0035 “e input voltage of the power stage v.sub.g(t) can be sampled at a rate lower than switching frequency and the average value of the inductor voltage is calculated as:…”. Kelly (US 20100090670) teaches 0035 “the switching frequency f.sub.sw was set as 250 kHz, the sampling frequency f.sub.s was 500 kHz, the input voltage Vin was set as 12V”. Prodic et al (US 20120223692) teaches “[0085] Direct measurement of the average inductor voltage still requires a differential-input ADC with a sampling rate significantly higher than the converter switching frequency” Hsieh (US 20130106511) teaches “…0032 wherein the sampling frequency of the discrete time input signal x[n] is according to the switching frequency of the switching unit 102 and the controllable diodes unit 104” also, see [0046]. Elwan et al (US 20140055117) teaches “0004 In a continuous mode of operation, spurs of the DC-DC switching frequency `f.sub.s` (e.g., a sampling frequency) occur at only integer multiples of the switching frequency. Sampling frequency or a sample rate defines the number of samples per unit of time (usually seconds) taken from a continuous signal to make a discrete signal. Preindl et al (US 20210126522) claim 11 “determine the subsequently applied switching frequency from a plurality of discretized switching frequencies that are each an integer multiple, n, of a sampling frequency…”. Each of these references teach a sampling rate and a switching frequency, and each suggests a different approach, wherein the values of these variables are different, corresponding/equal, multiple or ratio of each other, or integer multiple values of each other. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Examiner respectfully requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist Examiner in prosecuting the application. When responding to this Office Action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. Applicant must also show how the amendments avoid or differentiate from such references or objections. See 37 CFR 1.111 (c). Any inquiry concerning this communication or earlier communications from the examiner should be directed to OLVIN LOPEZ ALVAREZ whose telephone number is (571) 270-7686 and fax (571) 270-8686. The examiner can normally be reached Monday thru Friday from 9:00 A.M. to 6:00 P.M. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Robert Fennema, can be reached at (571) 272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center for authorized users only. Should you have questions about access to Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. /O. L./ Examiner, Art Unit 2117 /ROBERT E FENNEMA/Supervisory Patent Examiner, Art Unit 2117
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Prosecution Timeline

Jul 29, 2022
Application Filed
Sep 25, 2024
Non-Final Rejection — §103, §112
Dec 16, 2024
Response Filed
Apr 01, 2025
Final Rejection — §103, §112
Jun 09, 2025
Response after Non-Final Action
Jun 24, 2025
Request for Continued Examination
Jun 29, 2025
Response after Non-Final Action
Aug 07, 2025
Non-Final Rejection — §103, §112
Dec 11, 2025
Response Filed
Mar 11, 2026
Final Rejection — §103, §112 (current)

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