DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Remarks
[0095] provides definition for a computer readable storage medium is not to be construed as being transitory signals per se.
[0049] provides some standard for measuring the degree of quasi-orthogonal, which depends on dimension N, for example, absolute value of the cosine of the angle between two vectors is less than 0.032 for N >1000.
Examiner notes that the phrase “computer-readable program code can be invoked by a processor to cause the processor to…” in claim 20 line 3 expresses capability but may be less precise than standard computer-readable medium claim formulations. Applicant may consider amending this language to recite “A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to …“ to more clearly define the functional relationship between the program code and the recited operations and to align with conventional claim drafting practice.
Specification
The disclosure is objected to because of the following informalities:
[0073] line 2 "the resonator network modules 12, 14" should be "the search-in-superposition modules 12, 14".
[0082] mentions section 2.1 and 2.2. However, the specification does not describe section 2.1 and 2.2.
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). See the rejection under 35 U.S.C. 112 below.
Appropriate correction is required.
Claim Objections
Claims 1-20 are objected to because of the following informalities:
Claim 1 line 1; claim 2 line 6; claim 5 line 5; claim 10 line 1 "the method" should be "the computer-implemented method" as antecedently recited.
Claims 2-10 line 1 "The method" should be "The computer-implemented method" as antecedently recited.
Claim 1 line 3 "a product vector" should be "the product vector" as antecedently recited.
Claim 7 line 4 "the permutation schemes" should be "the respective permutation schemes" as antecedently recited.
Claim 11 line 1; claim 15 line 5; claim 19 line 1 "the system" should be "the computerized system" as antecedently recited.
Claim 20 line 1 “A computer program, the computer program product” should be “A computer program product, the computer program product” for clarification purposes and antecedent issue.
Dependent claims are also objected for inheriting the same deficiencies in which claims they depend on.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f), is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f):
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f), is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f), because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
"a resonator network unit" in claim 11. The specification fails to provide sufficient structure, material, or act to perform the claimed function (e.g., enabling). [0066] describes the resonator network unit designed to enable an unbinding module 11 and search-in-superposition modules 12, 14 as a result oriented, but does not describe which structure performs the enabling. [0066] also describes the resonator network unit can be implemented in software, such as processor 105 and memory 110), but the specification fails to provide step by step algorithm to perform the enabling.
"an input unit" in claim 11. [0078] describes input unit 17 is typically forms part of an input/output unit, typically a computer that is able to communicate with an external computerized unit, where figure 4 [0084,0089] describes I/O device 155 for communication.
"the unbinding module" in claim 11. [0042] describes the operation to obtain unbound vectors representing estimates of codevectors of the product vector is performed as in equation 1 [0015]. [0066] describes module 11 can be implemented in software utilizing processor 105 and memory 110.
"a multiplexing unit" in claim 12. Figure 2 illustrates a multiplexer 156 [0079] for to multiplex the quasi-orthogonal vector to obtain output signals.
"the search-in-superposition modules" in claim 12. Figure 2 illustrates a crossbar array 16 for implementing the search-in-superposition module [0072-0073] to output signals encoding transformed multiplexed vectors using a single codebook.
"a demultiplexing unit" in claim 12. Figure 2 illustrates a demultiplexer 154 to demultiplex and obtain the transformed vectors.
"an associative search module" in claim 13. Figure 2 illustrates a crossbar array 16 for implementing the associated search module [0072-0073].
"a weighted superposition module" in claim 13. Figure 2 illustrates a crossbar array 16 for implementing the weighted superposition module [0072-0073].
"an activation module" in claim 14. Figures 1-2 illustrate the activation module 13 a “black box” without sufficient structure to perform the claimed function of selectively activate vector components and pass the activated vectors. [0017,0059] describes the non-linear activation function f as f(.) and [0060] describes various type of activation functions that can be contemplated, but the specification fails to provide step by step of the algorithm to perform the claimed function.
"programming means" in claim 15. Figure 2 [0074] illustrates programming unit 10 that adapt to program the memory cells 165, but the programming unit is illustrated as a black box without sufficient structure, material, or acts to perform the claimed function.
"a permutation unit" in claim 16. [0068] describes the processors 15, 105 configured to perform the first and second operation, [0083] describes the method described can be implemented in software, hardware, or a combination thereof, wherein software is implemented as an executable program that executed by a digital processing devices. [0078] describes the permutation unit 153 is a digital processing unit, [0077] describes an algorithm to perform permutation as cyclic shifting operations. In particular, the cyclic shifting operations may cause the vector components of any kth vector of the unbound vectors by k - l to cyclically shift, in operation.
“the system” in claim 19. [0093] describes the processor 105 configured to execute software stored within the memory, and figure 3 illustrates the step by step algorithm to iteratively refine the estimates of the codevectors, [0064] step S120 includes step to iterate the iteration when the termination condition has not met [0046].
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f), it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f), applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f).
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 11-19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 11 and 14-15 recites “a resonator network unit”, “an activation module”, and “programming means”, which invokes 112(f) interpretation. However, as explained above in the claim interpretation section, the specification fails to provide sufficient disclosure to perform the claimed function (e.g., to enable and to adapt to program the memory elements) as required when invoked 112(f). [0066] describes the resonator network unit designed to enable an unbinding module 11 and search-in-superposition modules 12, 14 as a result oriented, but does not describe which structure performs the enabling. [0066] also describes the resonator network unit can be implemented in software, such as processor 105 and memory 110), but the specification fails to provide step by step algorithm to perform the enabling, and Figures 1-2 illustrate the activation module 13 a “black box” without sufficient structure to perform the claimed function of selectively activate vector components and pass the activated vectors. [0017,0059] describes the non-linear activation function f as f(.) and [0060] describes various type of activation functions that can be contemplated, but the specification fails to provide step by step of the algorithm to perform the claimed function. Similarly, figure 2 [0074] illustrates programming unit 10 that adapt to program the memory cells 165, but the programming unit is illustrated as a black box without sufficient structure, material, or acts to perform the claimed function.
Dependent claims are also rejected for inheriting the same deficiencies in which claims they depend on.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 2-6 and 11-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 line 4 "the multiplexed vectors". There is lack of antecedent basis for such limitation. For examination purposes, Examiner interprets such limitation as "the multiplexed quasi-orthogonal vectors".
Claim 3 line 5 "for it to compute similarity vectors". It is unclear what "it" represents. For examination purposes, Examiner interprets "it" as the associative search module.
claim 11 line 4-5 recites “an input unit configured to feed a product vector to the unbinding module to obtain unbound vectors”. it is unclear whether the step of “obtaining unbound vectors” is being performed by the input unit or the unbinding module. [0042] describes the product vector is fed to the unbinding module 11 with a view to obtain unbound vectors. For examination purposes, Examiner interprets that the unbounding module obtains unbound vectors.
Claim 11 line 7-11 recites “the processor to: … feed the quasi-orthogonal vectors to the search-in-superposition modules to obtain transformed vectors”. It is unclear whether the step of obtaining transformed vectors is performed by the processor or the search-in-superposition modules. [0071] describes the search-in-superposition modules 12, 14 obtains output signals encoding transformed multiplexed vectors and the processor includes a multiplexing unit 154, which configured to read the output signals and demultiplex the transformed multiplexed vectors encoded to obtain the transformed vector. In other words, the search-in-superposition modules 12, 14 does not obtain the transformed vectors, but rather obtain the output signals encoding transformed multiplexed vectors, which are vectors used to obtain the transformed vectors by the processor. For examination purposes, Examiner interprets that the processor obtains transformed vectors.
Claim 12 line 3 recites "the processing unit". There is lack of antecedent basis for such limitation. For examination purposes, Examiner interprets as "the processor".
Claim 12 line 2-5 recites “a multiplexing unit … apply the multiplexed signals to the search-in-superposition modules to obtain, by utilizing the single codebook, output signals encoding transformed multiplexed vectors”. It is unclear whether the step of obtaining output signals is performed by the multiplexing unit or the search-in-superposition modules. As explained above in [0071], for examination purposes, Examiner interprets the search-in-superposition modules obtains, by utilizing the single codebook, output signals encoding transformed multiplexed vectors.
Claims 11 and 14-15 recites “a resonator network unit”, “an activation module” and “programming means”, invoke 35 U.S.C. 112(f). However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. The disclosure is devoid of any structure that performs the function in the claim (see Claim Interpretation section and 112(a) above for details). Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Dependent claims are also rejected for inheriting the same deficiencies in which claims they depend on.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-4, 6-11, and 16-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recites a method claim
Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim recites limitations cover mathematical calculations, relationship, and/or formula, such as the method comprising obtaining unbound vectors representing estimates of codevectors of a product vector ([0015] describes performing of equation 1 to obtain unbound vectors representing estimates of codevectors of a product vector or signal vector x); performing a first operation on the unbound vectors to obtain quasi-orthogonal vectors, wherein the first operation is reversible ([0029-0030] describes a first operation as a vector dependent permutation operation that performs cyclic shifting operation, which is mathematical operation); obtaining transformed vectors by utilizing a single codebook ([0044] describes the algorithm includes step S50-S80 to obtain transformed vector utilizing a single codebook, and as described in [0013], codebook merely describes as a set of D dimensional bipolar vector, which is mere data being performed in the mathematical operation, such as matrix vector multiplication operation to obtain transformed vectors); and performing a second operation on the transformed vectors, wherein the second operation is an inverse operation of the first operation, to obtain refined estimates of the codevectors ([0029-0030] describes a second operation as permutes vector components of the transformed vectors according to inverses (i.e., inverse operations) of the respective permutation schemes that performs cyclic shifting operation, which is mathematical operation)). Alternatively, the steps of obtaining unbound vectors, performing first operation, obtaining transformed vectors and performing second operation on the transformed vectors, under broadest reasonable interpretation, cover performances using pen and paper, wherein one of ordinary skill in the art can perform the mathematical operations as described in equations 1-2, MVM operation, and selecting and distributing data (e.g., multiplexing and demultiplexing data). Therefore, the claim includes limitations that fall within the “Mathematical Concepts/ Mental Processes” groupings of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim additionally recites a computer-implemented method comprising an unbinding module and search-in-superposition modules. However, the additional elements are recited at a high level of generality, i.e., as computer components performing computer function of processing data. The claim further recites the steps of feeding a product vector and feeding the quasi-orthogonal vectors, but such additional elements are at most considered as insignificant extra solution activity (e.g., mere data gathering). Such additional elements fail to provide a meaningful limitation on the judicial exception, and amount to no more than mere instructions to apply the exception using computer elements. Thus, the claim is directed to an abstract idea.
Under Step 2B, as discussed with respect to Prong Two of Step 2A, the additional elements in the claim amount no more than mere instructions to apply the exception using computer components. The same conclusion is reached in step 2B, i.e., mere instructions to apply an exception on computer elements cannot integrate a judicial exception into a practical application at step 2A or provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception. The step of feeding data (e.g., a product vector and the quasi-orthogonal vectors) is considered to be insignificant extra-solution activity in step 2A, and are determined to be well-understood, routine, conventional activity in the field. Court decisions cited in MPEP 2106.05(d)(II) section (i), indicate that mere receiving or transmitting data over a network, is well-understood, routing, conventional function when it is claimed in a merely generic manner. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 2 further recites multiplexing the quasi-orthogonal vectors obtained, to obtain transformed multiplexed vectors by utilizing the single codebook, and prior to performing the second operation, demultiplexing the transformed multiplexed vectors to obtain the transformed vectors. Such limitation of obtaining transformed multiplexed vector by using the single code book cover mathematical calculations, relationship, and/or formula ([0057] wherein the transformed multiplexed vectors are obtained by performing MVM operation using the single codebook) and the limitations of multiplexing and demultiplexing vectors prior performing the second operation, under broadest reasonable interpretation covers the performance using pen and paper, where one of ordinary skill in the art can performing data selection and distribution as illustrated in S40 and S90. Furthermore, the step of feeding the multiplexed vectors to the search-in-superposition modules is at most considered as insignificant extra solution activity (e.g., mere data gathering) under step 2A prong two and determined to be well-understood, routine and conventional under step 2B (See MPEP 2106.05(d)(II) section (i), indicate that mere receiving or transmitting data over a network). Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 3 further recites sequentially: compute similarity vectors based on a transpose of the single codebook, and to compute weighted superimposed vectors based on the single codebook. Such limitations cover mathematical calculations, relationship, and/or formula (see [0057] describes the modules 12 and 14 perform MVM operations, also see equation 2 [0016]). The claim further recites the search-in-superposition modules includes an associative search module and a weighted superposition module, such additional elements are recited at a high level of generality, e.g., computer components performing computer function of processing data (see [0066] describes that the modules 11-14 that includes associative search module 12 and a weighted superposition module 14 may be implemented in software using processor 105 and memory 110). Thus, such elements amounts to no more than mere instructions to apply the judicial exception using computer components. Moreover, the claim recites the step of feeding the quasi-orthogonal vectors to the search-in-superposition modules, feeding the quasi-orthogonal vectors to the associative search module, and passing vectors obtained from the similarity vectors to the weighted superposition module, such elements at most are considered as insignificant extra solution activity under step 2A prong two (e.g., mere data gathering) and determined to be well-understood, routine and conventional activity under step 2B (See MPEP 2106.05(d)(II) section (i), indicate that mere receiving or transmitting data over a network). Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 4 further recites wherein the single codebook is symmetric, such that the single codebook is equal to a transpose of the single codebook, whereby a same representation of the single codebook is used by each of the associative search module and the weighted superposition module. Such limitations cover mathematical calculations, relationship, and/or formula (merely describes the single codebook is symmetric, and the same representation of the single book is used by each of the associative search module and the weighted superposition module is merely recited as a result of the abstract idea, which is utilizing the single symmetric codebook, since the transpose of a symmetric has the same representation). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 6 further recites to selectively activate vector components of the similarity vectors and accordingly obtain activated vectors, Such limitations cover mathematical calculations, relationship, and/or formula (see at least [0017, 0058-0059] describes the non-linear activation function f to find activated attentions. Thus, the activated vectors are obtained by performing an activation function f(.), which is a mathematical function). The claim further recites the search-in-superposition modules further include an activation module interconnecting the associative search module with the weighted superposition module, whereby feeding the quasi-orthogonal vectors to the search-in-superposition modules further causes the similarity vectors to be passed to the activation module and pass the activated vectors to the weighted superposition module. Such additional elements are recited at a high level of generality, e.g., computer components performing computer function of processing data (see [0066] describes that the modules 11-14 that includes associative search module 12, activation module 13, and a weighted superposition module 14 may be implemented in software using processor 105 and memory 110). Thus, such elements amounts to no more than mere instructions to apply the judicial exception using computer components. Moreover, the step of feeding the quasi-orthogonal vectors to the search-in-superposition modules, passing the similar vectors to the activation module, and passing the activated vectors to the weighted superposition module are merely the result of performing the mathematical operations (see example equation 2 calculate similarity vectors, equation 3 performs activation function on the calculated similarity vectors and equation 4 perform weighted superimposed), or at most are considered as insignificant extra solution activity under step 2A prong two (e.g., mere data gathering), and determined to be well-understood, routine and conventional activity under step 2B (See MPEP 2106.05(d)(II) section (i), indicate that mere receiving or transmitting data over a network). Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claims 7-9 further recites the first operation is a vector-dependent permutation operation, which permutes vector components of the unbound vectors according to respective permutation schemes, whereby vector components of each of the unbound vectors are permuted according to a respective one of the permutation schemes, whereas the second operation permutes vector components of the transformed vectors according to inverses of the respective permutation schemes, wherein each of the respective permutation schemes involves cyclic shifting operations, or wherein the cyclic shifting operations cyclically shifts the vector components of any kth vector of the unbound vectors by k–1. Such limitations cover mathematical calculations, relationship, and/or formula (merely describes the first and second operations as permutation operations that includes cyclic shifting operations, which are mathematical operation). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 10 further recites the method is iteratively performed, whereby steps of performing the first operation and performing the second operation, are repeatedly performed based on successively refined estimates of the codevectors. Such limitations cover mathematical calculations, relationship, and/or formula (see at least figure 3 step 120 describes the iteratively perform mathematical operations to refine estimates of the codevectors). Furthermore, the iteratively performing steps of feeding the product vector and feeding quasi-orthogonal vectors is merely data gathering for performing the mathematical operation as explained above in claim 1. Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 11 recites system claim having similar limitations as the method claim 1. Thus, it is rejected for the same reasons. The claim further recites a computerized system comprising a resonator network unit, which is configured to enable an unbinding module and search-in-superposition modules, an input unit, a processor, and memory to store instructions, wherein the instructions are executed by the processor to perform operation. Such additional elements are recited at a high level of generality, e.g., computer components performing computer functions of processing data that amount to no more than mere instructions to apply the judicial exception using computer components (see at least [0066] describes the resonator network unit can be implemented in software utilizing conventional processor and memory). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claims 16-19 recite apparatus claims having similar limitations as claims 7-10. Thus, they are rejected for the same reasons. The claims further recite a permutation unit, but such element is recited at a high level of generality, e.g., computer component performing computer function of processing data and amounts to no more than mere instructions to apply the judicial exception using computer component. Thus, the claims do not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 20 recites product claim having similar limitations as the apparatus claim 11. Thus, it is rejected for the same reasons. The claim further recites a computer program, the computer program product comprising a computer-readable storage medium having computer-readable program code embodied therewith, wherein the computer-readable program code can be evoked by processor to cause the processor to. Such additional elements are recited at a high level of generality, e.g., computer components performing computer functions and amount no more than mere instructions to apply the judicial exception using computer components. Thus, the claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Allowable Subject Matter
Claims 1-20 would be allowable if rewritten or amended to overcome the claim objections and rejections under 35 U.S.C. 112(a), 112(b), and 101 as set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 1, 11, and 20, the prior art of record does not teach or suggest a combination of limitations as claimed, including the limitations of performing a first operation on the unbound vectors to obtain quasi-orthogonal vectors, wherein the first operation is reversible; feeding the quasi-orthogonal vectors to search-in-superposition modules to obtain transformed vectors by utilizing a single codebook; and performing a second operation on the transformed vectors, wherein the second operation is an inverse operation of the first operation, to obtain refined estimates of the codevectors.
Frady – NPL - Resonator networks for factoring distributed representations of data structures (IDS filed 08/11/2022) - teaches a resonator network for factorization of products of multiple code vectors, wherein section 3 page 6 describes factorizing of a composite vector formed by 3 factors as illustrated in equation 1 by utilizing three codebooks X, Y, and Z. Page 7 equation 2 describes operation to unbind a product vector to obtains unbound vectors x, y, and z and obtain transformed vector by computation based on three codebooks X, Y, and Z and the transpose. Furthermore section 2 page 5 also describes permutation operation that rotates components of vectors into dimensions of the space that are almost orthogonal to the dimensions used by the original vectors. However, while Frady teaches the concept of obtaining unbound vectors, performing permutation operation, and obtaining transformed vectors for refining estimate of the codevectors, but Frady does not teach or suggest the steps to perform permutation operation on the unbound vectors, obtain transformed vectors by utilizing a single codebook and perform an inverse operation of the permutation on the transformed vectors to obtain refined estimates of the codevectors as required in claims 1, 11, and 20.
Karunaratne – US 20230297816 – teaches an in memory resonator network for factoring hypervectors as illustrated in figure 1, wherein the resonator network factors hypervectors using three codebooks [0017] as X, Y, and Z, and a crossbar array is configured to perform matrix vector multiplication using the codebooks as illustrated in figure 3A. However, Karunaratne does not teach or suggest the performs first operation on the unbound vectors, obtain transformed vectors by utilizing a single codebook and perform an inverse operation of the first operation on the transformed vectors to obtain refined estimates of the codevectors as required in claims 1, 11, and 20.
Hersche – US 20230206056 – teaches a system and method for factoring hypervector as illustrated in figure 1, the system includes network nodes 102x, 102y and 102z to obtain unbound vectors representing estimates of codevectors of a product vector s, and further includes memories 104 for storing the codebooks X Y and Z, memories 108 for storing the transposes X, Y and Z of the codebooks. The system further includes activation units 106 for each of the three concepts that implement the activation function kact and non-linear units 110 for each of the three concepts that implement the sign function. As indicated in FIG. 1-FIG. 3, the concepts of the vector space may be associated with processing lines 111x, 111y and 111z respectively, wherein each processing line provides an estimate of a hypervector representing the respective concept. However, Hersche does not teach or suggest the performs first operation on the unbound vectors, obtain transformed vectors by utilizing a single codebook and perform an inverse operation of the first operation on the transformed vectors to obtain refined estimates of the codevectors as required in claims 1, 11, and 20.
Chau – Solving factorization problems with VSAs and resonator network – teaches an factorization problem in VSAs to determine codevectors x, y, and z of a product vector b as described in page 14 utilizing the equation as described in page 17 that obtain unbound vectors and obtain transformed vector using three codebooks X, Y, and Z. However, Chau does not teach or suggest the performs first operation on the unbound vectors, obtain transformed vectors by utilizing a single codebook and perform an inverse operation of the first operation on the transformed vectors to obtain refined estimates of the codevectors as required in claims 1, 11, and 20.
Kent – NPL Resonator Networks, 2: Factorization performance and Capacity Compared to Optimization-Based Methods – teaches an approach for factorizing a product vector as described on page 2334 using codebooks. Section 4 describes the resonator network to solve for the factorization problem. However, Kent does not teach or suggest the performs first operation on the unbound vectors, obtain transformed vectors by utilizing a single codebook and perform an inverse operation of the first operation on the transformed vectors to obtain refined estimates of the codevectors as required in claims 1, 11, and 20.
Therefore, the prior art of record does not teach or suggest a combination of limitations as claimed.
Conclusion
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/HUY DUONG/Examiner, Art Unit 2182