DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/15/25 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-8, and 21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li et al. (US PGPub 2019/0189521, hereinafter referred to as “Li”).
Li discloses the semiconductor method as claimed. See figures 20 and corresponding text, where Li teaches, in claim 1, a semiconductor device comprising:
a shallow trench isolation (STI) region (111) substrate contact located above a substrate (110); (figures 2 and 20; [0041-0043], [0100-0103]) a first epitaxy region (250) located on the substrate and at a bottom of the STI region substrate contact, and connecting the substrate and the substrate contact; and
a substrate contact (160) partially filling the STI region and in direct contact with the epitaxy region a second epitaxy region located below and in contact with a source/drain gate contact (figure 20; [0100-0103]) (See examiner’s interpretation below) .
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478
640
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Greyscale
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261
488
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Greyscale
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315
401
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Greyscale
Li teaches, in claim 2, wherein the first epitaxy region is grown on a well implant having a same type as the first epitaxy region ([0102-0103]).
Li teaches, in claim 3, wherein the first epitaxy region is selected from the group consisting of an n-type epitaxial region and a p-type epitaxial region ([0102-0103]).
Li teaches, in claim 4, further comprising: at least one additional contact, wherein the substrate contact and the at least one additional source/drain gate contact include a same metallic material ([0102-0103]).
Li teaches, in claim 5, a stacked field effect transistor (FET) device comprising: a shallow trench isolation (STI) region substrate contact located above a substrate; two types of epitaxy regions, wherein a first one of the two types of epitaxy region is located at a bottom of the STI region substrate contact, and connecting the substrate and the substrate contact; and a first substrate contact partially filling the STI region and in direct contact with the one type of epitaxy region located at the bottom of the STI region a second epitaxy region located below and in contact with a source/drain gate contact, wherein the first epitaxy region and the second epitaxy region are not within a same horizontal plane of the device ([0102-0103]).
Li teaches, in claim 6, wherein the one of the two types of first epitaxy region is located on a same type of a well implant ([0102-0103]).
Li teaches, in claim 7, wherein the first epitaxy region is selected from a group consisting of an n-type epitaxial region and a p-type epitaxial region ([0102-0103]).
Li teaches, in claim 8, further comprising: at least one additional source/drain gate contact, wherein the first substrate contact the source/drain gate contact and the at least one additional source/drain gate contact include a same metallic material ([0102-0103]).
Li teaches, in claim 21, further comprising: at least one additional source/drain gate contact, wherein the substrate contact, the source/drain gate contact and the at least one additional source/drain gate contact include a same metallic material ([0102-0103]).
Conclusion
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/STANETTA D ISAAC/ Examiner, Art Unit 2898 January 7, 2026