DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in JP on 01/05/2022. It is noted, however, that applicant has not filed a certified copy of the JP 2022-000406 application as required by 37 CFR 1.55. Corresponding priority documents are not found in the application’s file wrapper. As stated in the Application Data Sheet, “Under the PDX program, applicant bears the ultimate responsibility for ensuring a copy of the foreign application is received by the Office from the participating foreign intellectual property office, or a certified copy of the foreign priority application is filed, within the time period specified in 37 CFR 1.55(g)(1)”. Applicant may refer to the procedure outlined in practice TIP #2 “What should I do if a foreign priority document is available via the WIPO DAS but is not visible in the U.S. application file?” in the Electronic Priority Document Exchange (PDX) Program website.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the random number operand of claim 10 must be shown or the feature(s) canceled from the claim(s). The drawings do not seem to show a function with the corresponding claimed random number as a product operand as a term. No new matter should be entered.
The drawings are objected to because they do not provide an understanding of the drawings. Elements 70a-70f of Figs. 1, 4-6 do not have an understood meaning. A suitable legend following 37 CFR 1.84(o) should be included for Figs. 1, 4-6.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
third processing part and fourth processing part in claim 13;
first processing part and second processing part in claim 14; and
fifth processing part and sixth processing part in claim 16.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
As to claim 13’s third processing part and fourth processing part, the examiner interprets the means plus function limitation to the corresponding structure: the processor performing the algorithm as disclosed in pg. 10 of the applicant' s specification, as no particular circuitry is disclosed in the specification.
As to claim 14’s first processing part and second processing part, the examiner interprets the means plus function limitation to the corresponding structure: the processor performing the algorithm as disclosed in pg. 10 of the applicant' s specification, as no particular circuitry is disclosed in the specification.
As to claim 16’s fifth processing part and sixth processing part, the examiner interprets the means plus function limitation to the corresponding structure: the processor performing the algorithm as disclosed in pg. 11 of the applicant' s specification, as no particular circuitry is disclosed in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 15, 19-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential steps, such omission amounting to a gap between the steps. See MPEP § 2172.01. The omitted steps are: adding a result of a second/first function to the second/first variable. Because the function itself is not added to a variable, but the result of the function is added.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 19 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim does not fall within at least one of the four categories of patent eligible subject matter because the claim is directed to a computer program, i.e., “software per se”. The claim is directed to a calculation program, reciting “a calculation program causing a computer to perform repeating an update processing”. See MPEP 2106.03.I.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception without significantly more.
Regarding claim 1, at Step 1, the claim is directed to a calculating device, which is a statutory category of invention (Machine).
At Step 2A Prong 1, Examiner notes that the claims are directed towards an abstract idea. The claim language has been reproduced below:
A calculating device, comprising: a processor configured to perform repeating an update processing (mathematical process),
the update processing including an update of a first variable set and an update of a second variable set (mathematical process),
the first variable set including a first variable xi (the ordinal number i being an integer of 1 to N, and N being one integer not less than 2) (mathematical relationship),
the second variable set including a second variable yi (mathematical relationship),
the update of the second variable set including updating the second variable yi by adding a second function Fi to the second variable yi before the update (mathematical process),
the second function Fi including the first variable xi as a variable (mathematical relationship),
the second function Fi including a parameter ai (mathematical relationship),
an ordinal number p being one integer not less than 1 and not more than N, an ordinal number q being one integer not less than 1 and not more than N, the ordinal number q being different from the ordinal number p, a parameter ap being different from a parameter aq (mathematical relationship).
At Step 2A Prong 2, the additional elements are bolded above. The additional elements do not integrate the abstract ideas into a practical application because the computer elements, which are recited at a high level of generality, provide conventional computer functions that do not impose any meaningful limits on practicing the abstract ideas. See MPEP 2106.05(f). The limitation processor is merely recited at a high level of generality, and is the equivalent of reciting “apply it” to the judicial exception. Furthermore, pg. 3 lines 30-31 disclose “a general-purpose computer may be used as the calculating device”. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
At Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception As set forth in step 2A prong 2 analysis, the processor is the equivalent of adding the words “apply it” to the judicial exception and are mere instructions to implement the abstract idea on a computer. Mere instructions to apply an exception using generic computer components cannot provide the inventive concept. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claims 2-18, the claims merely recite functions that further mathematically limit the mathematical concepts, or provide additional mathematical functions, of claim 1. They do not include additional elements that would require further analysis under steps 2A prong 2 and step 2B.
Regarding claim 19, the claim is directed to a program that would be practiced by the device of claims 1, respectively. All steps performed by the program of claims 19 are executed by the apparatus in claims 1 as configured. The analysis of claims 1 applies equally to claims 19.
Regarding claim 20, the claim is directed to a method that would be practiced by the device of claims 1, respectively. All steps performed by the method of claims 20 are executed by the apparatus in claims 1 as configured. The analysis of claims 1 applies equally to claims 20.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, 15, 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goto et al. (US 20190266212 A1, hereinafter “Goto”, provided in IDS filed 08/26/2022).
As per claim 1, Goto teaches A calculating device, comprising: a processor configured to perform repeating an update processing, the update processing including an update of a first variable set and an update of a second variable set, the first variable set including a first variable xi (the ordinal number i being an integer of 1 to N, and N being one integer not less than 2), the second variable set including a second variable yi, the update of the second variable set including updating the second variable yi by adding a second function Fi to the second variable yi before the update, the second function Fi including the first variable xi as a variable (Goto: [0017]),
the second function Fi including a parameter ai (Goto: [0073], variable a in second function, which corresponds to formula 5 in [0043]),
an ordinal number p being one integer not less than 1 and not more than N, an ordinal number q being one integer not less than 1 and not more than N, the ordinal number q being different from the ordinal number p, a parameter ap being different from a parameter aq (Goto: [0056], [0062], [0077]; “p” is updated to a new value for each “t”, thus “a” is updated to a new value for each “t”).
As per claim 2, Goto further teaches The device according to claim 1, wherein the repeating of the update processing includes: a first update; and a second update performed after the first update, and the parameter ap of the first update is different from the parameter ap of the second update (Goto: Figs. 3, 4 elements S105, S106; [0063]; wherein each update corresponds to an iteration “t”).
As per claim 3, Goto further teaches The device according to claim 2, wherein the processor performs the update processing K times (K being an integer not less than 2) (Goto: [0063], “T” corresponding to “K”), the parameter ai of the Kth update processing is greater than the parameter ai of the first update processing (Goto: [0056], [0043]; “p” is incremented per iteration, and “a” is updated by a function proportional to “p”, thus “a” also increases every iteration), an absolute value of a difference between the first variable xp and a first value Ap is greater than an absolute value of a difference between the first variable xq and a first value Aq (as Ap and Aq are not explicitly defined, they are interpreted to be any value that may satisfy the relationship), and an increment of the parameter ap of the second update referenced to the parameter ap of the first update is less than an increment of the parameter aq of the second update referenced to the parameter aq of the first update (Goto: [0056], [0043]; “p” is incremented per iteration, and “a” is updated by a square root of “p”, thus “a” is incremented less the higher the iteration).
As per claim 5, Goto further teaches The device according to claim 2, wherein the processor performs the update processing K times (K being an integer not less than 2) (Goto: [0063], “T” corresponding to “K”), the parameter ai of the Kth update processing is greater than the parameter ai of the first update processing (Goto: [0056], [0043]; “p” is incremented per iteration, and “a” is updated by a function proportional to “p”, thus “a” also increases every iteration), an absolute value of a difference between a variable Zp and a first value Ap is greater than an absolute value of a difference between a variable Zq and a first value Aq (as Ap and Aq are not explicitly defined, they are interpreted to be any value that may satisfy the relationship), an increment of the parameter ap of the second update referenced to the parameter ap of the first update is less than an increment of the parameter aq of the second update referenced to the parameter aq of the first update (Goto: [0056], [0043]; “p” is incremented per iteration, and “a” is updated by a square root of “p”, thus “a” is incremented less the higher the iteration), the variable Zp changes dependently on the first variable xp, and the variable Zq changes dependently on the first variable xq (Goto: [0073]; “Z” corresponding to the first term in the second function).
As per claim 15, Goto further teaches The device according to claim 1, wherein the update of the first variable set includes updating the first variable xi by adding a first function to the first variable xi before the update, and the first function includes the second variable yi as a variable (Goto: [0073]; the first function).
As per claim 17, Goto further teaches The device according to claim 15, wherein the first function is independent of the first variable set, and the second function is independent of the second variable set (Goto: [0073]; the first function and the second function).
As per claim 18, Goto further teaches The device according to claim 1, wherein the processor is configured to output at least the first variable xi obtained after the repeating of the update processing and at least one function of the first variable xi obtained after the repeating of the update processing (Goto: [0017] last sentence).
As per claim 19, the claim is directed to a calculation program that implements the same or similar features as the calculating device of claim 1, and is therefore rejected for at least the same reasons therein.
As per claim 20, the claim is directed to a calculation method that implements the same or similar features as the calculating device of claim 1, and is therefore rejected for at least the same reasons therein.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 6 are rejected under 35 U.S.C. 103 as being unpatentable over Goto in view of Shibasaki (US 20200090026 A1, hereinafter “Shibasaki”, from IDS filed 6/18/2025).
As per claim 4, Goto further teaches The device according to claim 2, wherein the processor performs the update processing K times (K being an integer not less than 2) (Goto: [0063], “T” corresponding to “K”), an absolute value of a difference between the first variable xp and a first value Ap is greater than an absolute value of a difference between the first variable xq and a first value Aq (as Ap and Aq are not explicitly defined, they are interpreted to be any value that may satisfy the relationship),
However, while Goto discloses solving an invention solving a combinatorial optimization problem ([0037]), Goto is silent as to whether the methods are solving for maximization or minimization. Thus, Goto does not teach the parameter ai of the Kth update processing is less than the parameter ai of the first update processing, and a decrement of the parameter ap of the second update referenced to the parameter ap of the first update is less than a decrement of the parameter aq of the second update referenced to the parameter aq of the first update.
Shibasaki teaches the parameter ai of the Kth update processing is less than the parameter ai of the first update processing (Shibasaki: [0047], wherein solving of maximum or minimum are inversely related), and a decrement of the parameter ap of the second update referenced to the parameter ap of the first update is less than a decrement of the parameter aq of the second update referenced to the parameter aq of the first update (Shibasaki: [0047]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the parameter of Goto with the teachings of Shibasaki. One would have been motivated to combine these references because both references disclose methods for solving optimization problems, and combining prior art elements according to known methods to yield predictable results (adjusting parameter updating in corresponding to solving a maximum or minimum).
As per claim 6, Goto further teaches The device according to claim 2, wherein the processor performs the update processing K times (K being an integer not less than 2) (Goto: [0063], “T” corresponding to “K”), an absolute value of a difference between a variable Zp and a first value Ap is greater than an absolute value of a difference between a variable Zq and a first value Aq (as Ap and Aq are not explicitly defined, they are interpreted to be any value that may satisfy the relationship, the variable Zp changes dependently on the first variable xp, and the variable Zq changes dependently on the first variable xq (Goto: [0073]; “Z” corresponding to the first term in the second function).
However, while Goto discloses solving an invention solving a combinatorial optimization problem ([0037]), Goto is silent as to whether the methods are solving for maximization or minimization. Thus, Goto does not teach the parameter ai of the Kth update processing is less than the parameter ai of the first update processing, and a decrement of the parameter ap of the second update referenced to the parameter ap of the first update is less than a decrement of the parameter aq of the second update referenced to the parameter aq of the first update.
Shibasaki teaches the parameter ai of the Kth update processing is less than the parameter ai of the first update processing (Shibasaki: [0047], wherein solving of maximum or minimum are inversely related), and a decrement of the parameter ap of the second update referenced to the parameter ap of the first update is less than a decrement of the parameter aq of the second update referenced to the parameter aq of the first update (Shibasaki: [0047]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the parameter of Goto with the teachings of Shibasaki. One would have been motivated to combine these references because both references disclose methods for solving optimization problems, and combining prior art elements according to known methods to yield predictable results (adjusting parameter updating in corresponding to solving a maximum or minimum).
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Goto in view of Suzuki et al. (WO 2020196862 A1, hereinafter “Suzuki”, from IDS filed 6/18/2025).
As per claim 7, Goto does not teach wherein the processor controls the first variable xi in a first range, the first range is not less than a first boundary value and not more than a second boundary value, and the first value Ap and the first value Aq are not less than the first boundary value and not more than the second boundary value.
Suzuki teaches wherein the processor controls the first variable xi in a first range, the first range is not less than a first boundary value and not more than a second boundary value, and the first value Ap and the first value Aq are not less than the first boundary value and not more than the second boundary value (Suzuki [0027] “For example, (1) a solution (solution vector) to the combinatorial optimization problem may be obtained when the value of the first coefficient becomes greater than a threshold value T<sub>１</sub> (e.g., T<sub>１</sub> = 1), and (2) thereafter, the value of the first coefficient may be set to be less than a threshold value T<sub>２</sub> (e.g., T<sub>２</sub> = 2)”).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the optimization method of Goto with the teachings of Suzuki. One would have been motivated to combine these references because both references disclose methods for solving optimization problems, and combining prior art elements according to known methods to yield predictable results (applying a correction term).
As per claim 8, Goto does not teach wherein the processor controls the first variable xi to be not less than a first boundary value and not more than a second boundary value, and the first value Ap and the first value Aq are substantially median values of the first and second boundary values.
Suzuki teaches wherein the processor controls the first variable xi to be not less than a first boundary value and not more than a second boundary value, and the first value Ap and the first value Aq are substantially median values of the first and second boundary values (Suzuki [0027] “For example, (1) a solution (solution vector) to the combinatorial optimization problem may be obtained when the value of the first coefficient becomes greater than a threshold value T<sub>１</sub> (e.g., T<sub>１</sub> = 1), and (2) thereafter, the value of the first coefficient may be set to be less than a threshold value T<sub>２</sub> (e.g., T<sub>２</sub> = 2)”).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the optimization method of Goto with the teachings of Suzuki. One would have been motivated to combine these references because both references disclose methods for solving optimization problems, and combining prior art elements according to known methods to yield predictable results (applying a correction term).
Allowable Subject Matter
Claims 9-14, 16 would be allowable if rewritten to overcome the rejections under 35 USC 101 set forth in this Office Action.
As to claim 9-14, 16, the prior art of record does not teach or suggest a combination as claimed including: wherein the second function Fi includes a first-term function, and the first-term function includes a product of the first variable x; and the parameter ai.
Goto discloses a method of repeated updating related to a bifurcation parameter ([0078]. Goto does not suggest the updating method to depend on a term that is the product of a first variable and parameter. Therefore, Goto does not teach or suggest a combination as claimed including the limitations identified above.
Tatsumura et al. (FPGA-based Simulated Bifurcation Machine, hereinafter “Tatsumura”) discloses a simulated bifurcation machine to solve optimization problems. Tatsumura does not suggest the method to include updating a variable based on a term that is the product of a first variable and parameter. Therefore, Tatsumura does not teach or suggest a combination as claimed including the limitations identified above.
Goto et al. (Combinatorial optimization by simulating adiabatic bifurcations in nonlinear Hamiltonian systems, hereinafter “Goto’NPL”, provided in IDS filed 8/26/2022) discloses solving combinatorial optimization problems with simulated adiabatic bifurcation. Goto’NPL does not suggest suggest the method to include updating a variable based on a term that is the product of a first variable and parameter. Therefore, Goto’NPL does not teach or suggest a combination as claimed including the limitations identified above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHAT N LE whose telephone number is (571)272-0546. The examiner can normally be reached Monday-Friday 8:30AM-5PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew T Caldwell can be reached at (571) 272-3702. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/P.N.L./
Phat LeExaminer, Art Unit 2182 (571) 272-0546
/ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182