DETAILED ACTION
1. Claims 1, 3-4, 7-16, and 18-24 have been presented for examination.
Claims 2, 5-6, and 17 have been cancelled.
Claims 21-24 are newly added.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
3. Applicant's arguments filed 12/16/25 have been fully considered but they are not persuasive.
i) Applicants argue that the prior art reference does not teach “the management controller is to detect an event relating to a first I/O device at the subsystem, and write a first value representing the event to a first virtual register of the plurality of virtual registers” and “the processor is to, based on the first value written to the first virtual register, detect that the event relating to the first I/O device has occurred at the subsystem, and initiate an action to handle the event.” However the Examiner notes the prior art Bshara teaches in at least “[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.” Therefore the prior art rejection is MAINTAINED.
ii) Applicants argue that the prior art does not teach “the programmable device is to interrupt the processor in response to the writing of the first value to the first virtual register” However the prior art Bshara teaches in at least “[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.” Therefore the prior art rejection is MAINTAINED.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
4. Claims 1, 3, 7-16, and 18-24 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Bshara et al. U.S. Patent Publication No. 20160098365, hereafter Bshara.
Regarding Claim 1: The reference discloses A system comprising:
a processor;
a management controller; and
a programmable device to provide input/output (I/O) expansion emulation to support communication with a plurality of I/O devices of a subsystem coupled to the system, wherein the programmable device provides a plurality of virtual registers as part of the I/O expansion emulation, the virtual registers associated with respective I/O devices of the plurality of I/O devices, ([0060] “The emulated configuration may include other information about each emulated configuration register. For example, some emulated configuration registers may be marked as read only, write only, or readable/writeable only by a root complex. As another example, some emulated configuration registers may be provided with a default or reset value. In some embodiments, emulated configuration space 342 may include representations for multiple sets of the configuration registers shown in Table 2. For example, in some embodiments, the PCIe peripheral device 300 can be used to implement a PCI switch, bridge, or hub which may provide connectivity for one or more PCI endpoints. In such scenarios, the emulated configuration space 342 may include representations for configuration registers of the switch, bridge, or hub, as well as configuration registers for each endpoint device associated with the switch, bridge, or hub.”)
wherein: the management controller is to detect an event relating to a first I/O device at the subsystem, and write a first value representing the event to a first virtual register of the plurality of virtual registers, (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
the programmable device is to interrupt the processor in response to the writing of the first value to the first virtual register, and (“[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.”)
the processor is to, based on the first value written to the first virtual register, detect that the event relating to the first I/O device has occurred at the subsystem, and initiate an action to handle the event. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 3: The reference discloses The system of claim 1, wherein the first virtual register comprises a plurality of register portions, and a first register portion of the plurality of register portions is settable to different values by the management controller in response to events relating to the first I/O device at the subsystem, and wherein the writing of the first value to the first virtual register comprises setting the first value in the first register portion. (“[0118] The following example illustrates emulation of SR-IOV capability by a peripheral device. The peripheral device may include, for example, one physical function, designated as PF0. The emulated configuration for PF0 includes SR-IOV extended capability registers. Furthermore, PF0 may be used by the peripheral device to discover, configure, and manage virtual functions associated with PF0. Generally, the emulated SR-IOV registers may be uploaded to the peripheral device with the same default values as defined by the SR-IOV protocol. In some implementations, the SR-IOV registers may be uploaded with other values. For example, the total number of virtual functions assigned to PF0 may be set to 4K, the default offset to the first virtual function within the emulated SR-IOV registers may be set to 257, and the default virtual function stride may be set to 1.”)
Regarding Claim 7: The reference discloses The system of claim 1, further comprising a connector assembly to connect over a computer bus to the subsystem, wherein the processor is to communicate with the I/O devices through the connector assembly and over the computer bus. (“[0090] FIG. 5 illustrates an example of a peripheral device 500 servicing a configuration write request. The peripheral device 500 may flexibly emulate different peripheral devices and/or multiple device functions. The peripheral device 500 may include a bus interface core 510, configuration transaction logging unit 508, native configuration space 512, an emulation module 530, and a memory 540. The bus interface core 510 may include functionality for communicating with a bus that connects the peripheral device to a computing system. The configuration transaction logging unit 508 may track incoming configuration transactions. The configuration transaction logging unit 508 may maintain a log of some or all incoming configuration read and write transactions. The native configuration space 512 may include configuration registers that are not being emulated by peripheral device 500. The emulation module 530 can be implemented using one or more processors, one or more processor cores, a processor cluster, programmable gate arrays, or control logic circuitry adapted to process configuration transactions.”)
Regarding Claim 8: The reference discloses The system of claim 7, wherein the computer bus comprises a Peripheral Component Interconnect Express (PCIe) bus, and wherein the management controller is to communicate with the subsystem over a management bus that is separate from the PCIe bus. (“[0048] FIG. 3 illustrates an example of a PCIe implementation of a peripheral device 300, according to some embodiments. The PCIe peripheral device 300 of FIG. 3 may include a PCIe core 310, a configuration management module 320, local hardware 330, and a memory 340. The PCIe peripheral device 300 may communicate with a computing system through a bus 302. The bus 302 may implement the PCIe protocol.”)
Regarding Claim 9: The reference discloses The system of claim 1, wherein the processor is to write a second value to the first virtual register to trigger an output event relating to the first I/O device, and wherein the management controller is to read the first virtual register and, in response to the second value written to the first virtual register, interact with the subsystem to issue the output event relating to the first I/O device at the subsystem. (“[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.”)
Regarding Claim 10: The reference discloses The system of claim19, wherein the event comprises a hot plug event relating to a hot insertion or a hot removal of the first I/O device. (“[0020] FIG. 1 illustrates an example of a computing system 100 that includes multiple peripheral devices. Peripheral devices may include hardware devices and/or devices that include a combination of hardware and software that can be attached to a computing system to add functionality to the system. Examples of peripheral devices include storage devices, video cards, audio cards, wired and/or wireless network adapters, adapters to provide additional ports to the system, such as serial and/or parallel ports, and bridges, hubs, and/or switches that provide ports for additional peripheral devices, among others. Generally, peripheral devices can be connected and disconnected from the computing system to change the functionality of the system. In some cases, the computing system must be powered down for a peripheral device to be added or removed. In other cases, the peripheral device can be attached or removed while the computer system is powered (e.g., often referred to as “hot-swapping” or “hot-plugging”).”)
Regarding Claim 11: The reference discloses The system of claim 9, wherein the first virtual register comprises a plurality of register portions, and a first register portion of the plurality of register portions is settable to different values to control whether the output event is triggered, and wherein the writing of the second value by the processor to the first virtual register comprises setting the second value in the first register portion, and wherein the writing of the first value by the management controller to the first virtual register comprises setting the first value in a second register portion of the plurality of register portions of the first virtual register. (“[0033] As noted above, an endpoint may implement multiple functions. An enumeration process may also discover the functions implemented by each endpoint. In some cases, each function may include its own set of configuration registers. Reading function-specific configuration registers may inform the processor 102 of the nature of the function (e.g. the function implements a video driver). The function-specific configuration registers may also store configurations and settings that are specific to the function.” “[0109] In some implementations, changes to settings in the SR-IOV capability registers (e.g., configuration writes) may require the virtual functions to be disabled. For example, changes to the number of virtual functions and/or to base address registers for the virtual functions may require that the virtual functions be disabled. In some cases, disabling the virtual functions and re-enabling the virtual functions may cause the virtual functions to be reset. When the settings in an SR-IOV capability register are changed, the physical function may reset all active virtual functions. The physical function may further read the modified SR-IOV capability register, and determine which setting has changed. The physical function may then, if necessary, update the virtual functions' configuration based on the modified settings in the SR-IOV capability registers.”)
Regarding Claim 12: The reference discloses The system of claim 10, wherein the processor is to launch machine-readable instructions set up the first I/O device that has been hot inserted at the subsystem. (“[0156] In one illustrative configuration, the service provider computer(s) 1010 may include at least one memory 1018 and one or more processing units (or processor(s) 1020). The processor(s) 1020 may be implemented as appropriate in hardware, computer-executable instructions, firmware or combinations thereof. Computer-executable instruction or firmware implementations of the processor(s) 1020 may include computer-executable or machine-executable instructions written in any suitable programming language to perform the various functions described.”)
Regarding Claim 13: The reference discloses The system of claim 9, wherein the management controller comprises a memory to store configuration information that correlates register portions of the virtual registers to respective different input events and output events, and the management controller is to: access the configuration information in response to detecting that the value has been written by the processor to the first virtual register, and send, based on the configuration information, a command to the subsystem to trigger the output event. (“[0057] In some implementations, the emulation module 336 may make use of the PCI interrupt mechanism to process the emulated configuration register accesses. For example, the emulation module 336 may define the PCIe core 0 interrupt as a secure interrupt, and register a handler to this interrupt. An interrupt handler can be an independent software function that is triggered when an interrupt is received. When the PCIe core 0 interrupt is triggered, the emulation module 336 may be alerted and may begin servicing transactions from the configuration management module 320. By defining the PCIe core 0 interrupt as secure, the interrupt may be hidden, or masked from non-secure modules, such as the operating system module 332. In some embodiments, a secure interrupt may also interrupt a non-secure interrupt handler.”)
Regarding Claim 14: The reference discloses A management controller comprising:
a processor; and
a non-transitory storage medium storing instructions executable on the processor to:
detect a value written to a first portion of a first virtual register of a plurality of virtual registers that are part of input/output (I/O) expansion emulation provided by a programmable device, wherein the plurality of virtual registers are associated with respective I/O devices of a plurality of I/O devices of an I/O device subsystem, and wherein the first value written to the first portion of the first virtual register is by a central processing unit (CPU) separate from the management controller for control of a feature relating to a first I/O device of the I/O device subsystem, wherein the CPU is to communicate with the plurality of I/O devices over a computer bus; and ([0060] “The emulated configuration may include other information about each emulated configuration register. For example, some emulated configuration registers may be marked as read only, write only, or readable/writeable only by a root complex. As another example, some emulated configuration registers may be provided with a default or reset value. In some embodiments, emulated configuration space 342 may include representations for multiple sets of the configuration registers shown in Table 2. For example, in some embodiments, the PCIe peripheral device 300 can be used to implement a PCI switch, bridge, or hub which may provide connectivity for one or more PCI endpoints. In such scenarios, the emulated configuration space 342 may include representations for configuration registers of the switch, bridge, or hub, as well as configuration registers for each endpoint device associated with the switch, bridge, or hub.”)
in response to the detecting of the first value written to the first portion of the first virtual register, send, from the management controller over a management bus separate from the computer bus, (“[0090] FIG. 5 illustrates an example of a peripheral device 500 servicing a configuration write request. The peripheral device 500 may flexibly emulate different peripheral devices and/or multiple device functions. The peripheral device 500 may include a bus interface core 510, configuration transaction logging unit 508, native configuration space 512, an emulation module 530, and a memory 540. The bus interface core 510 may include functionality for communicating with a bus that connects the peripheral device to a computing system. The configuration transaction logging unit 508 may track incoming configuration transactions. The configuration transaction logging unit 508 may maintain a log of some or all incoming configuration read and write transactions. The native configuration space 512 may include configuration registers that are not being emulated by peripheral device 500. The emulation module 530 can be implemented using one or more processors, one or more processor cores, a processor cluster, programmable gate arrays, or control logic circuitry adapted to process configuration transactions.”) control information to a subsystem controller of the I/O device subsystem, to cause the I/O device subsystem to control the feature relating to the first I/O device; (“[0057] In some implementations, the emulation module 336 may make use of the PCI interrupt mechanism to process the emulated configuration register accesses. For example, the emulation module 336 may define the PCIe core 0 interrupt as a secure interrupt, and register a handler to this interrupt. An interrupt handler can be an independent software function that is triggered when an interrupt is received. When the PCIe core 0 interrupt is triggered, the emulation module 336 may be alerted and may begin servicing transactions from the configuration management module 320. By defining the PCIe core 0 interrupt as secure, the interrupt may be hidden, or masked from non-secure modules, such as the operating system module 332. In some embodiments, a secure interrupt may also interrupt a non-secure interrupt handler.”)
detect an occurrence of an input event relating to the first 11O device; and (“[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.”)
in response to the detecting of the occurrence of the input event, write a second value to a second portion of the first virtual register, the writing of the second value to the second portion of the first virtual register causing the programmable device to interrupt the CPU to notify the CPU of the input event and to trigger handling of the input event by the CPU separate from the management controller. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 15: The reference discloses The management controller of claim 14, wherein the I/O device subsystem is separate from a computing system comprising the management controller, the CPU, and the programmable device. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 16: The reference discloses The management controller of claim 14, wherein the input event relating to the first I/O device comprises a hot plug event relating to hot plugging of the first I/O device. (“[0020] FIG. 1 illustrates an example of a computing system 100 that includes multiple peripheral devices. Peripheral devices may include hardware devices and/or devices that include a combination of hardware and software that can be attached to a computing system to add functionality to the system. Examples of peripheral devices include storage devices, video cards, audio cards, wired and/or wireless network adapters, adapters to provide additional ports to the system, such as serial and/or parallel ports, and bridges, hubs, and/or switches that provide ports for additional peripheral devices, among others. Generally, peripheral devices can be connected and disconnected from the computing system to change the functionality of the system. In some cases, the computing system must be powered down for a peripheral device to be added or removed. In other cases, the peripheral device can be attached or removed while the computer system is powered (e.g., often referred to as “hot-swapping” or “hot-plugging”).”)
Regarding Claim 18: The reference discloses The management controller of claim 16, wherein the CPU is to setup the first I/O device that has been hot plugged into the I/O device subsystem. (“[0020] FIG. 1 illustrates an example of a computing system 100 that includes multiple peripheral devices. Peripheral devices may include hardware devices and/or devices that include a combination of hardware and software that can be attached to a computing system to add functionality to the system. Examples of peripheral devices include storage devices, video cards, audio cards, wired and/or wireless network adapters, adapters to provide additional ports to the system, such as serial and/or parallel ports, and bridges, hubs, and/or switches that provide ports for additional peripheral devices, among others. Generally, peripheral devices can be connected and disconnected from the computing system to change the functionality of the system. In some cases, the computing system must be powered down for a peripheral device to be added or removed. In other cases, the peripheral device can be attached or removed while the computer system is powered (e.g., often referred to as “hot-swapping” or “hot-plugging”).”)
Regarding Claim 19: The reference discloses A method comprising:
emulating, by a programmable device, input/output (I/O) expansion that comprises providing a plurality of virtual registers for corresponding I/O devices at an I/O device subsystem that is separate from a computing system that the programmable device is part of; ([0060] “The emulated configuration may include other information about each emulated configuration register. For example, some emulated configuration registers may be marked as read only, write only, or readable/writeable only by a root complex. As another example, some emulated configuration registers may be provided with a default or reset value. In some embodiments, emulated configuration space 342 may include representations for multiple sets of the configuration registers shown in Table 2. For example, in some embodiments, the PCIe peripheral device 300 can be used to implement a PCI switch, bridge, or hub which may provide connectivity for one or more PCI endpoints. In such scenarios, the emulated configuration space 342 may include representations for configuration registers of the switch, bridge, or hub, as well as configuration registers for each endpoint device associated with the switch, bridge, or hub.”)
writing, by a central processing unit (CPU) of the computing system, a first value to a first virtual register of the plurality of virtual registers, to trigger an output event at the I/O device subsystem; (“[0101] At step 558a, the emulation module may look up the emulated configuration register that is to be written by the configuration write transaction. The emulation module may access the emulated configuration space in the memory, and locate the requested emulated configuration register therein. Upon locating the target emulated configuration register, the emulation module may update the emulated configuration register in the emulated configuration space with the write data. In some cases, the value written to the emulated configuration register may require updates to the hardware of the peripheral device 500. In these cases, the emulation module may write an additional configuration register, such as a physical port configuration register or a register in the native configuration space.”)
based on the first value written to the first virtual register, sending, by a management controller of the computing system, a command over a management bus to the I/O device subsystem, the command to cause a control of a feature relating to an I/O device of the I/O device subsystem; (“[0101] At step 558a, the emulation module may look up the emulated configuration register that is to be written by the configuration write transaction. The emulation module may access the emulated configuration space in the memory, and locate the requested emulated configuration register therein. Upon locating the target emulated configuration register, the emulation module may update the emulated configuration register in the emulated configuration space with the write data. In some cases, the value written to the emulated configuration register may require updates to the hardware of the peripheral device 500. In these cases, the emulation module may write an additional configuration register, such as a physical port configuration register or a register in the native configuration space.”)
detecting, by the management controller, occurrence of an input event at the I/O device subsystem; (“[0057] In some implementations, the emulation module 336 may make use of the PCI interrupt mechanism to process the emulated configuration register accesses. For example, the emulation module 336 may define the PCIe core 0 interrupt as a secure interrupt, and register a handler to this interrupt. An interrupt handler can be an independent software function that is triggered when an interrupt is received. When the PCIe core 0 interrupt is triggered, the emulation module 336 may be alerted and may begin servicing transactions from the configuration management module 320. By defining the PCIe core 0 interrupt as secure, the interrupt may be hidden, or masked from non-secure modules, such as the operating system module 332. In some embodiments, a secure interrupt may also interrupt a non-secure interrupt handler.”)
based on detecting the occurrence of the input event, writing, by the management controller, a second value to a second virtual register of the plurality of virtual registers; (“[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.”)
based on the second value written to the second virtual register, sending, by the programmable device, an interrupt to the CPU; and (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
based on the interrupt, detecting, by the CPU, that the input event has occurred at the I/O device subsystem, and initiating, by the CPU, an action to handle the input event. (“[0032] When a computing system such as computing system 100 illustrated in FIG. 1 initially powers up, the processor 102 may be unaware of any endpoints that are connected to the system. The processor 102 may be aware of the root complexes 104a-b, and possibly also that the root complex is connected to one or more busses. The processor 102 may discover the endpoints 110a-c, 112a-c and the functions that they provide by executing a process to scan and configure the system. This process may be referred to as an enumeration process. During an enumeration process, software executing on the processor 102 may scan each bus 118a, 118e, 118f connected to the root complex 104, and identify each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 attached to each bus 118a, 118e, 118f. The processor 102 may further direct the root complex 104 to initiate transactions to read and write configuration registers in each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration read transactions may inform the processor 102 of the capabilities and type of device of each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. Configuration write transactions can be used to configure and control each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114. For example, during enumeration each endpoint 110a-c, 112a-c, switch 108, and/or bridge 114 may be assigned a bus and device number. Configuration registers are typically implemented as physical hardware registers of the peripheral device, and the definition of the configuration registers in a peripheral device is generally fixed and cannot be dynamically changed.”)
Regarding Claim 20: The reference discloses The method of claim 19, wherein the input event comprises a hot plug event, and the CPU launches a program that handles the hot plug event that comprises hot plugging of an I/O device at the I/O device subsystem. (“[0020] FIG. 1 illustrates an example of a computing system 100 that includes multiple peripheral devices. Peripheral devices may include hardware devices and/or devices that include a combination of hardware and software that can be attached to a computing system to add functionality to the system. Examples of peripheral devices include storage devices, video cards, audio cards, wired and/or wireless network adapters, adapters to provide additional ports to the system, such as serial and/or parallel ports, and bridges, hubs, and/or switches that provide ports for additional peripheral devices, among others. Generally, peripheral devices can be connected and disconnected from the computing system to change the functionality of the system. In some cases, the computing system must be powered down for a peripheral device to be added or removed. In other cases, the peripheral device can be attached or removed while the computer system is powered (e.g., often referred to as “hot-swapping” or “hot-plugging”).”)
Regarding Claim 21: The reference The system of claim 9, wherein the programmable device is to interrupt the management controller in response to the writing of the second value to the first virtual register. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 22: The reference The system of claim 9, further comprising: a non-transitory storage medium storing machine-readable instructions executable on the processor to write the second value to the first virtual register. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 23: The reference The system of claim 22, wherein the machine-readable instructions are executable on the processor to write the second value to the first virtual register to cause activation of a visual indicator for the first I/O device at the subsystem. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Regarding Claim 24: The reference The system of claim 1, wherein the subsystem is separate from the system. (“[0035] In some cases, a peripheral device implementing an emulated configuration space may represent itself to the computing system as different peripheral devices. For example, a peripheral device implementing an emulated configuration space may represent itself as a network interface card with configuration registers specific to a network interface card in some instances, or represent itself as a different peripheral device such as a video card or a sound card with configuration registers specific to such a peripheral device in other instances. The emulated configuration space can also be modified, duplicated, or replaced with an entirely different configuration space. Additionally, multiple emulated configuration spaces may be maintained for a particular function. For example, a computing system may be running multiple virtual machines, where each virtual machine is running a different operating system. Each virtual machine may require a different configuration for the same function provided by a peripheral device. In such cases, emulated configuration spaces in a peripheral device may provide an emulated configuration for each virtual machine. Emulated configuration spaces may also require less hardware. For example, a device that includes SR-IOV may include emulated configurations for any number of physical and/or virtual function, instead of requiring physical hardware registers for each function.”)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. Claim(s) 4 is rejected under 35 U.S.C. 103 as being unpatentable over Bshara in view of Bouda et al. U.S. Patent Publication No. 20200065273, hereafter Bouda.
Regarding Claim 4: Bshara does not explicitly recite The system of claim 1, wherein the management controller is to interact with a Universal Backplane Management (UBM) controller in the subsystem to detect the event relating to the first I/O device at the subsystem.
However Bouda discloses The system of claim 1, wherein the management controller is to interact with a Universal Backplane Management (UBM) controller in the subsystem to detect the event relating to the first I/O device at the subsystem. (“[0007] UBM (Universal Backplane Management) controller implements pins and associated hardware circuitry to control LEDs and read the status of PCIe/NVMe SSD drives in a backplane. Additionally, it implements UBM stack/commands to communicate with UBM host through I2C bus to manage the backplane. For a backplane controller to support UBM on top of current VPP/SHP and SGPIO protocol will require larger more expensive Microcontroller/CPLD. There, there is a need for a mechanism to address the aforementioned concerns.”)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to utilize a Universal Backplane Management (UBM) controller as per Bouda for the system in Bshara since it would allow for the reading and distinguishing of “PCIe/NVMe SSD drives in a backplane.”
Conclusion
6. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
7. All Claims are rejected.
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
i) U.S. Patent Publication No. 20080005297
ii) U.S. Patent Publication No. 20210182092
iii) U.S. Patent Publication No. 20220121473
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Saif A. Alhija whose telephone number is (571) 272-8635. The examiner can normally be reached on M-F, 10:00-6:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Renee Chavez, can be reached at (571) 270-1104. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Informal or draft communication, please label PROPOSED or DRAFT, can be additionally sent to the Examiners fax phone number, (571) 273-8635.
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SAA
/SAIF A ALHIJA/Primary Examiner, Art Unit 2186