DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1, 3, 4, 8, 10, 11, 15, 17, 18 are pending. Claims 1, 8, and 15 have been amended as per Applicants' request.
Papers Submitted
It is hereby acknowledged that the following papers have been received and placed of record in the file:
Amended Claims as filed on November 26, 2025
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 3, 4, 8, 10, 11, 15, 17, and 18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) the limitations “generate a memory table associated with a trusted domain based on one or more of a first device identifier associated with a device, a guest physical address (GPA) range associated with the device, or a guest physical address offset”, “receive a memory access request from the device, the memory access request comprising a second device identifier or a guest physical address”, “memory access checker circuitry configured to compare the host physical address minus the guest physical address offset against the guest physical address range to determine whether to insert a trusted domain key identifier or a shared key identifier in a memory transaction”, “allow or deny the memory access, wherein the memory access is allowed based on a shared key identifier in the host physical address or by locating a guest address within the guest address range when the first identifier matches the second identifier”, and “wherein the shared key identifier is inserted into the host physical address in response to determining that the second device identifier fails to match the first device identifier” or similarly thereof.
The “generate a memory table”, “… compare the host address … ”, and “allow or deny the memory access …” limitations, as drafted, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, other than reciting “the processor circuitry to” or “cause a computing device to perform operations comprising:” nothing in the claim element precludes the step from practically being performed in the mind. For example, but for the “the processor circuitry to” or “cause a computing device to perform operations comprising:” language, the limitations in the context of this claim encompasses the user manually generating a table using pen and paper to map a trusted domain to an identifier, comparing addresses, and allowing/denying the memory access request based on checking and comparing the identifier or address in his/her mind. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
The step of “… compare the host address minus the guest physical address offset against the guest physical address range to …” is also an abstract idea of mathematical calculations under mathematical concepts disclosed in MPEP 2106.04(a)(2).
This judicial exception is not integrated into a practical application. In particular, the claims only recite the additional elements of “processor circuitry”, “a memory”, “a device”, “a second device”, “a processor”, “a computing device”, “receive a memory access request …”, “wherein the guest physical address …”, and “the shared key identifier is inserted into …”. The processor circuitry, device, second device, processor, and computing device in all the steps is recited at a high-level of generality (i.e., as a generic processor performing a generic computer function of receiving information) such that it amounts no more than mere instructions to apply the exception using a generic computer component. The step of “receive a memory access request …” are recited at a high level of generality, and amounts to the insignificant extra solution activity of mere data gathering (see MPEP 2106.05(g)).
The combination of these additional elements is no more than insignificant extra solution activity (receive a memory request) that provides the storing and receiving of information for the performing of the exception, with mere instructions to apply the exception using generic computer components (processor). Accordingly, even in combination, these additional element does not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “processor circuitry”, “a memory”, “a device”, “a second device”, “a processor”, “a computing device” amount to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The “receive a memory access request …” step is a well-understood, routine, conventional activity of “receiving or transmitting data over a network” as cited by the Symantec, TLI, and OIP Techs court decisions in MPEP 2106.05(d)(II)(i). Accordingly a conclusion that the receive step is a well-understood, routine, and conventional activity is supported. The “wherein the guest physical address …” limitation further describes the identification of the address which limits the claims to a field of use or technological environment as described in MPEP 2106.05(h). The “the shared key identifier is inserted into … in response to …” limitation is just mere instructions to apply the exception as described in MPEP 2106.05(f).
Even when considered in combination, these additional elements represent mere instructions to apply an exception with well understood, routine, and conventional insignificant extra-solution activity, which does not provide significantly more to the abstract idea. The claim is not patent eligible.
Claims 3, 10, and 17 further recite the limitation of “validate the memory access request using the memory table, …” which is a mental process of checking for a match in a table. The latter part of the claim “wherein the memory request is denied in response to …” is a decision-making step based on the listed factors and would also be a mental process.
Claims 4, 11, and 18 further recite the limitation of “facilitating the memory access using a shared key identifier …” step is insignificant extra solution activity of mere data gathering (see MPEP 2106.05(g)) and it is also a well-understood, routine, conventional activities of storing and retrieving information in memory (see MPEP 2106.05(d)(II)(iv)). The “direct the memory access to a shared memory …” step is insignificant extra solution activity of mere data gathering (see MPEP 2106.05(g)) and it is also a well-understood, routine, conventional activities of receiving or transmitting data over a network (see MPEP 2106.05(d)(II)(i)). The “wherein the devices identifier …” limitation further define the device identifier which limits the claims to a field of use and technological environment (MPEP 2106.05(h)). The “wherein the guest physical address is defined as …” and “where in the processing circuitry comprises …” limitations further define the guest physical address and the processing circuitry which limits the claims to a field of use and technological environment (MPEP 2106.05(h)).
Response to Arguments
Claim Rejections - 35 USC § 101
Applicant's arguments filed November 26, 2025 have been fully considered but they are not persuasive.
Applicant Argues:
a) Claim 1, as amended, recites in pertinent part comparing the host physical address minus the guest physical address offset against the guest physical address range to determine whether to insert a trusted domain key identifier or a shared key identifier in a memory transaction. This limitation specifies particular hardware components and technical operations that cannot be performed mentally or with a combination of pen and paper. Claim 1 integrates the judicial exception into a practical application by reciting specific technical mechanisms for memory security validation. Hence, this is not merely applying an abstract idea using generic components, but rather implementing a specific security mechanism that addresses technical problems in trusted computing environments through particular hardware configurations and operations. Accordingly, for at least the reasons set forth above, Applicant respectfully requests the withdrawal of the rejection of claims 1 and its dependent claims.
With respect to (a), the claim limitation of “comparing the host physical address minus the guest physical address offset against the guest physical address range to determine whether to insert a trusted domain key identifier or a shared key identifier in a memory transaction” is an abstract idea, this is a mathematical calculation under mathematic concepts and also a mental process as a person with pen and paper would be able to carry out the mathematical calculation. The limitation of “wherein the shared key identifier is inserted into the …” (added limitation not mentioned in the remarks) is the mere instructions to apply the exception as described in MPEP 2106.05(f).
Claim Rejections - 35 USC § 103
Applicant’s arguments, see pages 9-12 of remarks, filed November 26, 2025, with respect to claims 1, 3, 4, 8, 10, 11, 15, 17, 18 have been fully considered and are persuasive. The 35 USC § 103 rejection of claims 1, 3, 4, 8, 10, 11, 15, 17, 18 has been withdrawn.
Allowable Subject Matter
Claims 1, 3, 4, 8, 10, 11, 15, 17, 18 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 101, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
The independent claims now includes the limitations “wherein the processing circuitry comprises memory access checker circuitry configured to compare the host physical address minus the guest physical address offset against the guest physical address range to determine whether to insert a trusted domain key identifier or a shared key identifier in a memory transaction” and “wherein the shared key identifier is inserted into the host physical address in response to determining that the second device identifier fails to match the first device identifier”, or similarly thereof.
The limitations above are not taught or rendered obvious in view of the prior art of record, particularly in combination with the other limitations within the claims. Claims 3, 4, 10, 11 , 17, 18 are dependent on claims 1, 8 , and 15 and would be allowable for at least the same reasons as its respective independent claim.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/S.L./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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