Prosecution Insights
Last updated: April 19, 2026
Application No. 17/826,881

GENERATIVE SELF-SUPERVISED LEARNING TO TRANSFORM CIRCUIT NETLISTS

Non-Final OA §103§112
Filed
May 27, 2022
Examiner
NGUYEN, NHA T
Art Unit
2851
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
NVIDIA Corporation
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
915 granted / 1052 resolved
+19.0% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
22 currently pending
Career history
1074
Total Applications
across all art units

Statute-Specific Performance

§101
12.9%
-27.1% vs TC avg
§103
28.1%
-11.9% vs TC avg
§102
36.9%
-3.1% vs TC avg
§112
13.2%
-26.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1052 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION 2. This Office Action responds to the Application filed on 5/27/2022 and IDS filed on 5/27/2022. Claims 5/27/2022 are pending. Claim Rejections - 35 USC § 112 3. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 4. Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recited “1. A transformer network for setting characteristics of gates in a circuit, the transformer network trained with gate characteristic distributions from a technology library, the transformer network comprising: an encoder; and a decoder; the transformer network configured to characterize a combinatorial gate sequence input into to improve one or more operational characteristics of the circuit based on an effort level setting applied to the decoder”, however it is not apparent what the encoder represents and what the encoder is encoding that would characterize the combinatorial gate sequence. It is not apparent what the decoder represents and what the decoder is decoding in order characterize the combinatorial gate sequence. It is not apparent of the relationship among the decoder and the encoder, that would allow for the characterizing of the combinatorial gate sequence. As per claims 2-7 are rejected to for incorporating the above limitations into the claims by dependency. Claim Rejections - 35 USC § 103 5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 6. Claim(s) 1 and 4-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang (“Pre-Routing Path Delay Estimation Based on Transformer and Residual Framework”, Tai Yang, Guoqing He, Peng Cao, February 21, 2022, IEEE) in view of Vaswani (“Attention is All You Need”, 31st Conference on Neural Information Processing Systems (NIPS 2017), Long Beach, CA, USA). As per claim 1, Yang discloses: A transformer network for setting characteristics of gates in a circuit, the transformer network trained with gate characteristic distributions from a technology library, the transformer network (See Abstract, pre-routing path delay…transformer network, See Section I, II, and Section III) comprising: an encoder (See Figure 4, i.e. encoder, See Section IV. Pre-routing path delay prediction framework, See Pages 185-187); and the transformer network configured to characterize a combinatorial gate sequence input into to improve one or more operational characteristics of the circuit (See Pages 185-187, Section II & Section III & Section IV –[Prior art characterize timing of combinatorial gate (Figure 2) , therefore improve circuit timing by using the transformer]). Yang does not teach: a decoder, and an effort level setting applied to the decoder. However, Vaswani discloses: a decoder, and an effort level setting applied to the decoder (See Pages 2-3, i.e. transformer …both encoder and decoder, See Page 3, i.e. decoder…modify the self-attention sub-layer in the decoder –[prior art modify decoder of the transformer correspond to the level setting as cited above]) Therefore, it would have been obvious to a person of ordinary skill in the art at the effective filing date of the invention to incorporate the teaching of Vaswani into the teaching of Yang because it would allow designer to develop models to be more parallelizable with less time to train (See Vaswani, Abstract). As per claim 4, Yang and Vaswani discloses all of the features of claim 1 as discloses above wherein Yang also discloses a weighted cross-entropy loss function employing as a weight value a normalized mean square error (MSE) of F04 delay values of the gates in the gate sequence (See Page 187-188, i.e. root mean squared error). As per claim 5, Yang and Vaswani discloses all of the features of claim 1 as discloses above wherein Yang also discloses the transformer network further configured to: select sizes of gates in the gate sequence to optimize timing, power, area, or combinations thereof for the gate sequence (See Table 1, i.e. cell type…driven strength, Pages 185-187, Section II & Section III & Section IV). As per claim 6, Yang and Vaswani discloses all of the features of claim 1 as discloses above wherein Yang also discloses wherein the transformer network models the propagation of signals through the gate sequence (See Pages 185-187, Section II & Section III & Section IV). As per claim 7, Yang and Vaswani discloses all of the features of claim 1 as discloses above wherein Vaswani also discloses wherein the encoder and the decoder each comprise exactly two encoding and decoding stages, respectively (See Pages 2-3, i.e. transformer …both encoder and decoder –[each decoder/encoder include multi-head attention & aDD&Norm being the two stages]). Allowable Subject Matter 7. Claims 8-20 are allowed. 8. Claims 2 and 3 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. 9. The following is a statement of reasons for the indication of allowable subject matter: With respect to claims 8-20, the prior art does not teach the combination of limitations recited in independent claim 8 and independent claim 15, wherein claims 9-14 depend directly and/or indirectly from independent claim 8 – wherein claims 16-20 depend directly and/or indirectly from independent claim 15. With respect to claims 2 and 3, the prior art does not teach the limitations of claim 2, wherein claim 3 depend on claim 2. Conclusion 10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NHA T NGUYEN whose telephone number is (571)270-1405. The examiner can normally be reached M-F 8:00AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 571-272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NHA T NGUYEN/Primary Examiner, Art Unit 2851
Read full office action

Prosecution Timeline

May 27, 2022
Application Filed
Oct 17, 2025
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+18.7%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 1052 resolved cases by this examiner. Grant probability derived from career allow rate.

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