DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 06/11/2026 has been entered.
Allowable Subject Matter
The indicated allowability of claims 1-20 are withdrawn in view of the newly discovered reference SCHMENGER, Max [et al.]: Highly integrated power modules based on copper thick-film-on-DCB for high frequency operation of SiC semiconductors : design and manufacture. In: 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe), Geneva, Switzerland, 08-10 September 2015. Piscataway, NJ, USA : IEEE, 2015. S. 1-8. ISBN 978-9-0758-1522-1. https://doi.org/10.1109/EPE.2015.7309050 [abgerufen am 2025-09-18]. Rejections based on the newly cited reference(s) follow.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1,4-5, 8-14, and 17-20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by SCHMENGER, Max [et al.]: Highly integrated power modules based on copper thick-film-on-DCB for high frequency operation of SiC semiconductors : design and manufacture. In: 2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe), Geneva, Switzerland, 08-10 September 2015. Piscataway, NJ, USA : IEEE, 2015. S. 1-8. ISBN 978-9-0758-1522-1. https://doi.org/10.1109/EPE.2015.7309050 [abgerufen am 2025-09-18]; hereinafter “Schmenger”.
In regard to claim 1, Schmenger teaches a power converter module (a CTF-on-DCB hybrid module) (Fig. 5 and [introduction, lns. 25-26]) comprising:
a substrate (a DCB) having a first surface (a top surface) and a second surface (a bottom surface) that opposes the first surface (the ceramic layer of the DCB is shown with a top and bottom surface in Fig. 5) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design [lns. 5-6]);
a thick printed copper (TPC) substrate (a copper thick film (CTF)) on the first surface of the substrate (, the TPC substrate comprising:
a first layer (the first thick-film layer) comprising TPC patterned on the first surface of the substrate (Fig. 3A, Fig. 5 and [Copper Thick-Film-on-DCB Module Design [lns. 3-4]);
a second layer (an insulating thick-film layer) comprising dielectric patterned on the first layer (the first thick-film layer acts as basis for an insulating (dielectric) thick-film layer) (Fig. 3A, and [Copper Thick-Film-on-DCB Module Design [lns. 6]); and
a third layer (a second copper thick-film layer) comprising TPC patterned on the second layer (the thick-film insulation layer and the fine-line thick-film copper layer printed on top of that form a two-layer circuit carrier) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 15-17]);
power transistors (SiC MOSFET) mounted on the TPC substrate (Fig. 3B and [Thermal properties of SiC-equipped DCB substrates, lns. 5-6]); and
a control integrated circuit (IC) chip (gate-drive IC) mounted on the TPC substrate (the DFN package of the gate drive IC is purely connected to the final copper layer) (Fig. 5 and [Production Process, lns. 19-20]).
In regard to claim 4, Schmenger teaches wherein the substrate is a ceramic core, and a layer of copper is adhered to the second surface of the ceramic core (the DCB consists of a thick ceramic layer enclosed by a 300 μm copper metallization on top and bottom) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 2-3]).
In regard to claim 5, Schmenger teaches herein the substrate is a direct bonded copper substrate with a ceramic core (the DCB consists of a thick ceramic layer enclosed by a 300 μm copper metallization on top and bottom) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 2-3]).
In regard to claim 8, Schmenger teaches wherein the power converter module is a direct current (DC) to alternating current (AC) power converter module or a DC-to-DC power converter (the module is especially suitable for high-frequency operation such as inductive energy transfer and inverter systems; therefore the module is suitable for a direct current (DC) to alternating current (AC) power conversion) ([abstract, lns. 3-4]). Further, it has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. Ex parte Masham, 2 USPQ 2d 1647 (1987).
In regard to claim 9, Schmenger teaches the power converter module further comprising:
a decoupling capacitor mounted on the TPC substrate (a two-layer circuit carrier allows for the integration of decoupling capacitors) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 16-17]).
In regard to claim 10, Schmenger teaches wherein the power transistors are configured to be coupled to a load (the connection to a mainframe circuit board (PCB) is provided by contact pins for power and for signals) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 16-17]).
In regard to claim 11, Schmenger teaches the power converter module further comprising:
control pins mounted on the TPC substrate; and power pins mounted on the TPC substrate (the connection to a mainframe circuit board (PCB) is provided by contact pins for power and for signals) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 16-17]).
In regard to claim 12, Schmenger teaches wherein a power loop comprising the power transistors has a parasitic inductance of about 100 nanohenries or less (due to the small commutation loop including the half-bridges and the ceramic DC-link capacitors, the simulated total power loop inductance is as low as 1. 7 nH) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 38]).
In regard to claim 13, Schmenger teaches a method for fabricating a power converter module (a CTF-on-DCB hybrid module) (Fig. 5 and [introduction, lns. 25-26]), the method comprising:
forming a thick printed copper (TPC) substrate on a surface of a substrate (a copper thick film (CTF)) is formed on the top surface of a DCB) (Fig. 3, Fig. 5 and [lns. 9]), wherein the forming comprises:
patterning a first layer (a first thick-film layer of the CTF) for the TPC substrate on the surface of the substrate (a first thick-film layer of the CTF is placed directly on top of the DCB copper) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 4-9]), wherein the first layer comprises TPC traces and/or TPC pads (as the first layer of the CTF would be comprised of TPC traces connected to the DCB) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design [lns. 4-9]);
patterning a second layer of the TPC substrate (an insulating thick-film layer) on the first layer, wherein the second layer comprises a dielectric (the first thick-film layer acts as basis for an insulating (dielectric) thick-film layer) (Fig. 3A, and [Copper Thick-Film-on-DCB Module Design [lns. 6]);
patterning a third layer of the TPC substrate on the second layer (a second copper thick-film layer), wherein the third layer comprises TPC traces and/or TPC pads (the thick-film insulation layer and the fine-line thick-film copper layer printed on top of that form a two-layer circuit carrier) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 15-17]);
mounting power transistors on the TPC substrate (SiC MOSFETs) (Fig. 3, Fig. 5 and [Thermal properties of SiC-equipped DCB substrates, lns. 4]);
mounting a control IC chip (gate drive IC) on the TPC substrate (the DFN package of the gate drive IC is purely connected to the final copper layer) (Fig. 5 and [Production Process, lns. 19-20]); and
applying wire bonding (Al bond wires) to couple the power transistors and the control IC chip to the TPC substrate (In order to minimize the negative effect of bond wires on circuit inductance, a maximum number of relatively thin 200 μm Al bond wires are used) (Fig. 5 [Copper Thick-Film-on-DCB Module Design, lns. 27-28]).
In regard to claim 14, Schmenger teaches the method, further comprising mounting a decoupling capacitor on the TPC substrate (a two-layer circuit carrier allows for the integration of decoupling capacitors) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 16-17]).
In regard to claim 17, Schmenger teaches wherein the power converter module is a direct current (DC) to alternating current (AC) power converter module or a DC-to-DC power converter (the module is especially suitable for high-frequency operation such as inductive energy transfer and inverter systems; therefore the module is suitable for a direct current (DC) to alternating current (AC) power conversion) ([abstract, lns. 3-4]).
In regard to claim 18, Schmenger teaches mounting control pins and power pins on the TPC substrate (the connection to a mainframe circuit board (PCB) is provided by contact pins for power and for signals) (Fig. 5 and [Copper Thick-Film-on-DCB Module Design, lns. 16-17]).
In regard to claim 19, Schmenger teaches wherein the surface of the substrate is a first surface, and the substrate is a ceramic core, and a layer of copper is adhered to a second surface of the ceramic core (the DCB consists of a thick ceramic layer enclosed by a 300 μm copper metallization on top and bottom) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 2-3]).
In regard to claim 20, Schmenger teaches wherein the substrate is a direct bonded copper substrate with a ceramic core (the DCB consists of a thick ceramic layer enclosed by a 300 μm copper metallization on top and bottom) (Fig. 3, Fig. 5, and [Copper Thick-Film-on-DCB Module Design [lns. 2-3]).
Claim Objections
Claims 2-3, 6-7 and 15-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
In regard to claim 2, Schmenger is considered a close prior art of record. However Schmenger fails to teach “wherein the second layer of the TPC substrate further comprises: a window formed of a void in the third layer that exposes a TPC trace or a TPC pad is located on top of the second layer that is coupled to a TPC trace or a TPC pad of the first layer”. Schmenger is silent regarding any opening in the top copper layer of the CTF for wire bonding purposes.
Claim 3 is objected to due to depending on claim 2.
In regard to claim 6, Schmenger is considered a close prior art of record. However Schmenger fails to teach “herein the TPC substrate further comprises: a fourth layer comprising dielectric patterned on the third layer; and a fifth layer comprising TPC patterned on the fourth layer. Schmenger only teaches a three layer CTF.
In regard to claim 7, Schmenger is considered a close prior art of record. However Schmenger fails to teach “wherein the power transistors are gallium nitride (GaN) field effect transistors (FETs)”. Schmenger only teaches the element that functions as a power transistor comprises Silicon Carbide (SiC).
In regard to claim 15, Schmenger is considered a close prior art of record. However Schmenger fails to teach “wherein the wire bonding extends from a surface of the control IC chip through a window in the third layer to a TPC pad or TPC trace in the second layer of the TPC substrate”. Schmenger is silent regarding any opening in the top copper layer of the CTF for wire bonding purposes.
In regard to claim 16, Schmenger is considered a close prior art of record. However Schmenger fails to teach “wherein the power transistors are gallium nitride (GaN) field effect transistors (FETs)”. Schmenger only teaches the element that functions as a power transistor comprises Silicon Carbide (SiC).
Conclusion
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/SEYON ALI-SIMAH PUNCHBEDDELL/ Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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