Prosecution Insights
Last updated: October 01, 2026
Application No. 17/838,314

DETECTION DEVICE

Final Rejection §103§112
Filed
Jun 13, 2022
Priority
Jun 14, 2021 — JP 2021-098908
Examiner
WEILAND, ADAM DAVID
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
4 (Final)
95%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
38 granted / 40 resolved
+27.0% vs TC avg
Moderate +8% lift
Without
With
+8.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
37 currently pending
Career history
92
Total Applications
across all art units

Statute-Specific Performance

§103
54.3%
+14.3% vs TC avg
§102
21.0%
-19.0% vs TC avg
§112
22.2%
-17.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 40 resolved cases

Office Action

§103 §112
DETAILED ACTION This action is responsive to the communication filed 13 March 2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Election/Restrictions Applicant’s election of Species II Subspecies II in the reply filed on 7 January 2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Response to Arguments Applicant’s arguments with respect to independent claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant did not present remarks or argument regarding the allowability of claims 2-8 aside from their dependency from independent claim 1. Accordingly, Applicant’s arguments regarding claims 2-8, in view of the below rejection based on prior art not previously applied in the prior rejection, are also moot and unpersuasive. Claim Rejections - 35 USC § 112 The rejection of claims 3-5 are withdrawn, responsive to Applicant’s amendment of claim 3. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over WIPO Publication No. WO2020188959A1 (published Sept. 24, 2020) (hereinafter “Kawata”) in view of U.S. Patent Publication No. 2020/0127154 (filed Sept. 27, 2019) (hereinafter “Lee”). Regarding independent claim 1, Kawata discloses: A photo detecting device (FIG. 6, detection device 1, Translation of WO2020188959A1 at 2), comprising: a plurality of transistors provided above a substrate (FIGS. 5/6, depicting a plurality of switching elements Tr above a substrate 21, Translation of WO2020188959A1 at 2-3); a plurality of photodiodes arranged above the plurality of transistors (FIGS. 5/6, depicting a plurality of photoelectric conversion elements PD arranged above the plurality of switching elements Tr, Translation of WO2020188959A1 at 2); a lower electrode (FIG. 6, detection electrode 35, Translation of WO2020188959A1 at 2) provided between the substrate and the photodiodes in a direction orthogonal to a surface of the substrate (FIG. 6, depicting wherein the detection electrode 35 is provided between the substrate 21 and the photoelectric conversion element PD); and an upper electrode provided above the photodiodes (FIG. 6, counter electrode 36, Translation of WO2020188959A1 at 2), wherein the lower electrode of the photodiode is electrically coupled to each of the transistors through a contact hole (FIG. 6, depicting wherein the detection electrode 35 is electrically coupled to the switching element Tr through a contact hole H3, Translation of WO2020188959A1 at 6), each of the photodiodes comprises an active layer (FIG. 6, depicting wherein the photoelectric conversion element PD comprises a semiconductor layer 31), a first carrier transport layer provided between the active layer and the lower electrode (FIGS. 6/7, buffer layer 37 provided between the semiconductor layer 31 and the detection electrode 35, Translation of WO2020188959A1 at 9), and a second carrier transport layer provided between the active layer and the upper electrode (FIGS. 6/7, buffer layer 38 provided between the semiconductor layer 31 and the counter electrode 36, Translation of WO2020188959A1 at 9), and a thickness of the first carrier transport layer is smaller than a thickness of the lower electrode (FIGS. 6/7, depicting wherein the thickness of the buffer layer 37 is smaller than a thickness of the detection electrode 35). Kawata does not specifically disclose a first inorganic insulating film that is provided between the substrate and the photodiodes in a direction orthogonal to a surface of the substrate, wherein the first inorganic insulating film is provided between the lower electrode and the first carrier transport layer, the first inorganic insulating film includes a first part and a second part that is apart from the first part, the first part of the first inorganic insulating film covers at least an end on an outer edge side of the lower electrode, and the second part of the first inorganic insulating film is provided so as to cover an entirety of a bottom surface and an inner side surface of the contact hole, when viewed from the direction orthogonal to the surface of the substrate. In the same field of endeavor, Lee discloses a first inorganic insulating film (FIGS. 1/4/6, clad layer 228, [0104]) that is provided between a substrate and a photodiode in a direction orthogonal to a surface of the substrate (FIGS. 1/4/6, depicting wherein the clad layer 228 is provided between the array substrate 201 and the PIN layer 232 in a direction orthogonal to a surface of the array substrate 201), wherein the first inorganic insulating film is provided between a lower electrode and a first carrier transport layer (FIGS. 1/4/6, depicting wherein the clad layer 228 is provided between the electrode 231 and either of the P type or N type semiconductor layers of the PIN layer 232), the first inorganic insulating film includes a first part and a second part that is apart from the first part (FIGS. 1/4/6, depicting wherein the clad layer 228 includes a first part and a second part that is separated from the first part such that it is apart from the first part), the first part of the first inorganic insulating film covers at least an end on an outer edge side of the lower electrode (FIGS. 1/4/6, depicting wherein the first part of the clad layer 228 covers an outer edge side of the electrode 231), and the second part of the first inorganic insulating film is provided so as to cover an entirety of a bottom surface and an inner side surface of the contact hole, when viewed from the direction orthogonal to the surface of the substrate (FIGS. 1/4/6, depicting wherein the second part of the clad layer 228 covers an entirety of a bottom surface and an inner side surface of the contact hole 226a/227a). Regarding the clad layer configuration, in [0113], Lee states: “the contact hole region of the third electrode 231 overlying or corresponding to the third contact hole 226 a of the first planarization layer 226 is additionally covered with the clad layer 228 made of an inorganic material. Thus, the leakage current may be reduced by improving the step coverage of the PIN layer 232 and allowing the concentration of the electric field into the contact hole region to be reduced.” Lee further states in [0126]: “Thus, the clad layer 228 according to the present disclosure is formed between the third electrode 231 and the PIN layer 232 to cover the edge region and/or the contact hole region of the third electrode 231, such that the step coverage of the PIN layer 232 may be improved.” Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the disclosed detection device of Kawata by adding the clad layer of Lee in order to improve step coverage and reduce leakage current in the detection device. See Lee [0113], [0126]. Moreover, addition of the clad layer of Lee would result in a configuration wherein a first inorganic insulating film (Lee FIGS. 1/4/6, clad layer 228, [0104]) is provided between a substrate and a photodiode in a direction orthogonal to a surface of the substrate (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the clad layer 228 would be provided between the substrate 21 and the photoelectric conversion element PD), wherein the first inorganic insulating film is provided between a lower electrode and a first carrier transport layer (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the clad layer 228 would be provided between the detection electrode 35 and the buffer layer 37), the first inorganic insulating film includes a first part and a second part that is apart from the first part (Lee FIGS. 1/4/6; depicting wherein the clad layer 228 includes a first part and a second part that is separated from the first part such that it is apart from the first part), the first part of the first inorganic insulating film covers at least an end on an outer edge side of the lower electrode (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the first part of the clad layer 228 would cover an outer edge side of the detection electrode 35), and the second part of the first inorganic insulating film is provided so as to cover an entirety of a bottom surface and an inner side surface of the contact hole, when viewed from the direction orthogonal to the surface of the substrate (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the second part of the clad layer 228 would cover an entirety of a bottom surface and an inner side surface of the contact hole H3) Regarding claim 2, Kawata in view of Lee further discloses wherein the first inorganic insulating film covers an upper surface of the lower electrode (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the clad layer 228 would cover an upper surface of the detection electrode 35), and has at least one opening in an area overlapping the upper surface of the lower electrode (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the clad layer 228 includes an opening, which would overlap an upper surface of the detection electrode 35), and the first carrier transport layer is coupled to the lower electrode through the opening or openings of the first inorganic insulating film (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the clad layer 228 includes an opening, wherein the buffer layer 37 would be coupled to the detection electrode 35 through the opening). Regarding claim 3, Kawata in view of Lee further discloses an organic insulating film that covers the transistors (Kawata FIGS. 6/7, organic insulating layer 23a, Translation of WO2020188959A1 at 6), wherein the lower electrode of the photodiode is provided above the organic insulating film, and the contact hole is provided in the organic insulating film (Kawata FIGS. 6/7, depicting wherein the detection electrode 35 is provided above the organic insulating layer 23a, and further wherein the contact hole H3 is provided in the organic insulating layer 23a). Regarding claim 4, Kawata in view of Lee further discloses wherein the lower electrode and the second part of the first inorganic insulating film are provided so as to cover the bottom surface and the inner side surface of the contact hole (Lee FIGS. 1/4/6; Kawata FIGS. 6/7, depicting wherein the second part of the clad layer 228 and the detection electrode 35 are provided so as to cover a bottom surface and an inner side surface of the contact hole H3). Regarding claim 5, Kawata does not specifically disclose a second inorganic insulating film provided above the organic insulating film, wherein the organic insulating film, the second inorganic insulating film, the lower electrode, the first inorganic insulating film, and the photodiode are stacked in this order in the direction orthogonal to the substrate. In the same field of endeavor, Lee discloses a second inorganic insulating film (FIGS. 1/4/6, protective layer 227, [0068]) provided above the organic insulating film (FIGS. 1/4/6, depicting wherein the protective layer 227 is provided above the planarization layer 226), wherein the organic insulating film, the second inorganic insulating film, the lower electrode, the first inorganic insulating film, and the photodiode are stacked in this order in the direction orthogonal to the substrate (FIGS. 1/4/6, depicting wherein the planarization layer 226, the protective layer 227, the clad layer 228, and the PIN layer 232 are stacked in this order in a direction orthogonal to the array substrate 201). Regarding the protective layer, in [0068], Lee states: “On the first planarization layer 226, a first protective layer 227 may be formed, which is an inorganic layer made of an inorganic material. The first protective layer 227 protects the underlying thin-film transistor 220, particularly the active layer 221.” Lee further states in [0071]: “Further, the first protective layer 227 made of an inorganic material may further facilitate the adhesion between organic planarization layers.” Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the disclosed detection device of Kawata by adding the protective layer of Lee in order to protect the underlying TFT and facilitate adhesion between the various layers. See Lee [0068], [0071]. Moreover, addition of the clad layer of Lee would result in a configuration wherein a second inorganic insulating film is provided above the organic insulating film (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the protective layer 227 would be provided above the organic insulating layer 23a), wherein the organic insulating film, the second inorganic insulating film, the lower electrode, the first inorganic insulating film, and the photodiode are stacked in this order in the direction orthogonal to the substrate (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein the organic insulating layer 23a, the detection electrode 35, the clad layer 228, and the photoelectric conversion element PD would be stacked in this order in a direction orthogonal to the substrate 21). Regarding claim 6, Kawata in view of Lee further discloses wherein the first carrier transport layer is an electron transport layer (Translation of WO2020188959A1 at 10: “The buffer layer 37 functions as an electron transport layer (or a hole block layer), and the buffer layer 38 functions as a hole transport layer (electron block layer).”), and the second carrier transport layer is a hole transport layer (Translation of WO2020188959A1 at 10: “The buffer layer 37 functions as an electron transport layer (or a hole block layer), and the buffer layer 38 functions as a hole transport layer (electron block layer).”). Regarding claim 7, Kawata in view of Lee does not specifically disclose in the FIG. 6/7 embodiment wherein the first carrier transport layer is a hole transport layer, and the second carrier transport layer is an electron transport layer. Kawata, however, states: “In the present embodiment, the detection electrode 35 is the anode and the counter electrode 36 is the cathode, but the opposite configuration, that is, the detection electrode 35 may be the cathode and the counter electrode 36 may be the anode.” Translation of WO2020188959A1 at 8. In the opposite configuration contemplated by Kawata, wherein the detection electrode 35 is the cathode and the counter electrode 36 is the anode, the buffer layer configuration would also be switched, such that the buffer layer 37 would function as a hole transport layer and the buffer layer 38 would function as an electron transport layer in order to facilitate transport of electrons or holes from the cathode and the anode through the device. Translation of WO2020188959A1 at 10: “The buffer layers 37 and 38 are provided so that the holes and electrons generated in the active layer 34 can easily reach the detection electrode 35 or the counter electrode 36.” Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the FIG. 6/7 embodiment of Kawata such that, as expressly contemplated in Kawata, a configuration wherein the detection electrode 35 may be the cathode and the counter electrode 36 may be the anode is substituted for the configuration disclosed in FIGS. 6 and 7. The Examiner respectfully asserts that there would be a reasonable expectation of success in making the modification, such that the buffer layer configuration would also be switched, such that the buffer layer 37 would function as a hole transport layer and the buffer layer 38 would function as an electron transport layer in order to facilitate transport of electrons or holes from the cathode and the anode through the device. Regarding claim 8, Kawata in view of Lee further discloses wherein an entire area of a lower surface of the second part of the first inorganic insulating layer (Lee FIGS. 1/4/6, clad layer 228) is in contact with an upper surface of the lower electrode (Lee FIGS. 1/4/6; Kawata FIGS. 6/7; depicting wherein an entire area of a lower surface of the second part of the clad layer 228 would be in contact with an upper surface of the detection electrode 35). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADAM D WEILAND/Examiner, Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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Prosecution Timeline

Show 2 earlier events
May 23, 2025
Interview Requested
May 28, 2025
Response Filed
Aug 01, 2025
Final Rejection mailed — §103, §112
Oct 31, 2025
Request for Continued Examination
Nov 07, 2025
Response after Non-Final Action
Dec 19, 2025
Non-Final Rejection mailed — §103, §112
Mar 13, 2026
Response Filed
May 12, 2026
Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

5-6
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+8.0%)
3y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 40 resolved cases by this examiner. Grant probability derived from career allowance rate.

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