DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Joint Inventors
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Response to Amendments
Applicant’s amendment filed 02/24/2026 has been considered and entered.
Response to Arguments
The applicant’s arguments filed 02/24/2026 have been fully considered but are moot in view of modified grounds for rejection. Limitations relating to the “a bridge… wherein the bridge comprises one or more vias extending vertically through the bridge…” of amended claims 1, 14, and 18 are taught by Liu [US 20180299628 A1] (See the 35 USC 103 section of this office action).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2, 7-8, 10, 13, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kainuma (US 20180156972 A1) in view of Liu (US 20180299628 A1) in further view of Yu (US 20220392881 A1).
With regards to claim 1, Kainuma discloses an integrated circuit package (Kainuma/Fig18/Integrated circuit package 1a), comprising:
a package substrate having a cavity (Fig18/Package substrate 10/Cavity 12);
a photonic integrated circuit (PIC) (Fig18/PIC 20) to send or receive optical signals, wherein the PIC is in the cavity of the package substrate (Fig18); and
an electronic integrated circuit (EIC) (Fig18/EIC 40) electrically coupled to the PIC, wherein the EIC is above the PIC (Fig18).
Kainuma is silent regarding a bridge. However, the practice of electrically coupling an EIC to a package substrate via vertical electrical connections in a bridge exists in the art as exemplified by Liu.
Kainuma and Liu are considered to be analogous in the field of integrated circuit packages. Kainuma discloses an EIC and a package substrate with a cavity. Liu teaches a bridge comprising one or more vertically extending vias, wherein an EIC is electrically coupled to the package substrate through one or more of the vias (Liu/Fig1b/Bridge 130 and vias 160). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a bridge within the cavity of Kainuma wherein the bridge includes vertical vias connecting the PIC of Kainuma to the package substrate of Kainuma as suggested by Liu since doing so would facilitate the incorporation of additional functions within the package substrate of Kainuma.
Kainuma discloses the integrated circuit package as being a part of an electronic apparatus (Fig18), but Kainuma and Liu do not specifically disclose an integrated circuit device as being a part of the apparatus. However, the practice of electrically coupling an integrated circuit device to a package substrate exists in the art as exemplified by Yu. Kainuma, Liu, and Yu are considered to be analogous in the field of optoelectronic packages. Yu discloses - within an integrated circuit package (Yu/Figs26-27/Integrated circuit package 100) - an integrated circuit device coupled to a package substrate (Yu/Figs26-27/Integrated circuit device 122; Fig8/Package substrate as outlined below).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate an integrated circuit device into the integrated circuit package of Kainuma and Liu as suggested by Yu since doing so would allow the integrated circuit package of Kainuma to perform a greater variety or functions.
With regards to claim 2, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 1, further comprising a first bridge and a second bridge, wherein:
the first bridge is the bridge in the cavity of the package substrate ([See rejection of claim 1]); and
the second bridge (Kainuma/Fig6b/Second bridge 11) is embedded in the package substrate.
Kainuma further discloses an EIC coupled to the second bridge (Kainuma/Fig18). Yu further teaches an integrated circuit device coupled to a bridge (Yu/Fig8/Bridge 116). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to couple the integrated circuit device disclosed by Kainuma, Liu, and Yu to the bridge disclosed by Kainuma since doing so would enable high density routing between the EIC and integrated circuit device, and would forego the need for additional wire bonds.
With regards to claim 7, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 1, wherein the bridge further comprises a bridge substrate, wherein the one or more vias extend vertically through the bridge substrate (Liu/Fig1b).
With regards to claim 8, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 7, wherein:
the package substrate comprises an organic material (Kainuma/Paragraph 75/Lines 1-9); and
the bridge substrate comprises silicon or glass (Liu/Paragraph 26/Lines 9-10).
With regards to claim 10, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 1, further comprising: a plurality of fibers coupled to the PIC, wherein the PIC is to send or receive the optical signals via the plurality of glass fibers (Yu/Fibers 150). Kainuma, Liu, and Yu do not explicitly disclose glass as a material composition for optical fibers. However, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select glass a as the material from which to form the optical fibers disclosed by Kainuma, Liu, and Yu since doing so would grant the fiber significant advantages such as high optical clarity, low signal loss, and resistance to adverse environmental conditions.
With regards to claim 13, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 1, wherein the integrated circuit device comprises:
a microcontroller;
a microprocessor;
a central processing unit;
a graphics processing unit;
a vision processing unit;
a tensor processing unit;
an application-specific integrated circuit;
a field-programmable gate array;
a switch;
a network interface controller;
a memory device; or
a persistent storage device (Yu/Paragraph 42/Lines 4-11).
With regards to claim 18, Kainuma discloses a method of forming an integrated circuit package, comprising:
forming a cavity in a package substrate (Fig11c/Cavity 12; Package substrate 10);
attaching a photonic integrated circuit (PIC) to the package substrate within the cavity (Fig11c/PIC 20);
attaching an electronic integrated circuit (EIC) on top of the PIC (Fig11c/EIC 40), wherein conductive contacts on the EIC are attached to conductive contacts on the PIC (Fig18).
Kainuma is silent regarding the attachment of a bridge. However, the practice of attaching a bridge to a package substrate and electrically coupling an EIC to a package substrate via vertical electrical connections in the bridge exists in the art as exemplified by Liu.
Kainuma and Liu are considered to be analogous in the field of integrated circuit packages. Kainuma discloses an attachment of an EIC and formation of a package substrate with a cavity. Liu teaches attachment of a bridge comprising one or more vertically extending vias, wherein an EIC is electrically coupled to the package substrate through one or more of the vias, and wherein conductive contacts on the bridge are attached to conductive contacts on the package substrate (Liu/Fig1b/Bridge 130 and vias 160). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a bridge within the cavity of Kainuma inclusive of vertical vias connecting the PIC of Kainuma to the package substrate of Kainuma as suggested by Liu since doing so would facilitate incorporation of additional functions within the finished package substrate of Kainuma. Kainuma and Liu are silent regarding conductive contacts on the integrated circuit device being attached to conductive contacts on the package substrate. Kainuma discloses the integrated circuit package as being a part of an electronic apparatus, but does not specifically disclose the attachment of an integrated circuit device to conductive contacts on the package substrate. However, the practices of attaching conductive contacts to a package substrate and attaching an integrated circuit device to conductive contacts on a package substrate both exist in the art as exemplified by Yu.
Kainuma, Liu, and Yu are considered to be analogous in the field of optoelectronic packages. Yu discloses attachment of an integrated circuit device to conductive contacts on the package substrate (Yu/Figs26-27/Integrated circuit device 122; Fig8/Package substrate as outlined below).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate an integrated circuit device into the integrated circuit package of Kainuma and Liu as suggested by Yu and to do so though the attachment of conductive contacts since doing so would allow the integrated circuit package of Kainuma to perform a greater variety of electrical functions.
With regards to claim 19, Kainuma, Liu, and Yu together disclose the method of Claim 18, further comprising: attaching a plurality of glass fibers to the PIC (Yu/Fig26-27/Fibers 150). Kainuma and Yu do not explicitly disclose glass as a material composition for optical fibers. However, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select glass a as the material from which to form the optical fibers disclosed by Kainuma and Yu since doing so would grant the fiber significant advantages such as high optical clarity, low signal loss, and resistance to adverse environmental conditions.
With regards to claim 20, Kainuma, Liu, and Yu together disclose the method of Claim 18, further comprising: forming conductive contacts below the package substrate (Yu/Fig11/Conductive contacts 304).
With regards to claim 21, Kainuma, Liu, and Yu together disclose the integrated circuit package of Claim 1, wherein the bridge is laterally adjacent to the PIC within the cavity (Kainuma/Fig18; Liu/Fig1b).
Claims 14-17 are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20220392881 A1) in view of Kainuma (US 20180156972 A1) and Liu (US 20180299628 A1).
With regards to claim 14, Yu discloses an electronic device (Yu/Fig26/Electronic device 300), comprising:
a printed circuit board (Figs25-26/Printed circuit board 302);
an optical interconnect (Figs25-26/Optical interconnect defined by elements 150), wherein the optical interconnect comprises a plurality of fibers (Figs25-26/Fibers 150); and
a plurality of integrated circuit packages coupled to the printed circuit board (Figs25-26/Integrated circuit packages 100), wherein a plurality of integrated circuit devices (Figs25-26/Integrated circuit devices 122) are packaged within the plurality of integrated circuit packages (Figs25-26).
Yu does not explicitly disclose glass as a material composition for optical fibers. However, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select glass as the material from which to form the optical fibers disclosed by Yu since doing so would grant the fiber significant advantages such as high optical clarity, low signal loss, and resistance to adverse environmental conditions. Furthermore, Yu does not disclose the individual integrated circuit packages as comprising:
a package substrate having a cavity; and
an optical transceiver to send or receive optical signals via the optical interconnect, wherein the optical transceiver comprises:
a photonic integrated circuit (PIC) coupled to the optical interconnect, wherein the PIC is in the cavity of the package substrate; and
an electronic integrated circuit (EIC) electrically coupled to the bridge and the PIC, wherein the EIC is above the bridge and the PIC.
However, the practice of configuring an individual integrated circuit package in the above fashion exists in the art as exemplified by Kainuma and Liu.
Yu and Kainuma are considered to be analogous in the field of optoelectronic packages. Kainuma teaches an integrated circuit package comprising:
a package substrate having a cavity (Fig18/Package substrate 10/Cavity 12); and
an optical transceiver to send or receive optical signals via the optical interconnect (Fig18/Paragraph 145), wherein the optical transceiver comprises:
a photonic integrated circuit (PIC) (Fig18/PIC 20) coupled to the optical interconnect, wherein the PIC is in the cavity of the package substrate (Fig18); and
an electronic integrated circuit (EIC) (Fig18/EIC 40) electrically coupled to the PIC, wherein the EIC is above the PIC (Fig18).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to construct the integrated circuit packages within the electronic device disclosed by Yu in the configuration disclosed by Kainuma, since doing so would allow further optical processing capabilities to be incorporated into the circuit package. Yu and Kainuma are silent regarding a bridge. However, the practice of electrically coupling an EIC to a package substrate via vertical electrical connections in a bridge exists in the art as exemplified by Liu.
Yu, Kainuma, and Liu are considered to be analogous in the field of optoelectronic packages. Yu and Kainuma disclose an EIC and a package substrate with a cavity. Liu teaches a bridge comprising one or more vertically extending vias, wherein an EIC is electrically coupled to the package substrate through one or more of the vias (Liu/Fig1b/Bridge 130 and vias 160). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a bridge within the cavity of Kainuma inclusive of vertical vias connecting the PIC of Kainuma to the package substrate of Kainuma as suggested by Liu since doing so would facilitate incorporation of additional functions within the package substrate of Yu and Kainuma.
With regards to claim 15, Yu, Kainuma, and Liu together disclose the electronic device of Claim 14, wherein the plurality of integrated circuit devices comprise:
one or more processing devices;
one or more memory devices;
one or more storage devices; or
one or more communication devices (Yu/Paragraph 41/Lines 4-5).
With regards to claim 16, Yu, Kainuma, and Liu together disclose the electronic device of Claim 15, wherein the one or more processing devices comprise:
a microcontroller;
a microprocessor;
a central processing unit;
a graphics processing unit;
a vision processing unit;
a tensor processing unit;
an application-specific integrated circuit;
or a field-programmable gate array (Yu/Paragraph 42/Lines 4-11).
With regards to claim 17, Yu, Kainuma, and Liu together disclose the electronic device of Claim 15, wherein the one or more communication devices comprise:
a switch; or
a network interface controller (Yu/Paragraph 77/Lines 11-15 […optical networks…]; Paragraph 80/Lines 1-7).
Allowable Subject Matter
Claims 11-12 are objected to as being dependent upon rejected base claims, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With regards to claim 11, the prior art of record fails to disclose or reasonably suggest the integrated circuit package of Claim 1, further comprising: a plurality of conductive traces embedded in the package substrate; a first set of conductive contacts below the package substrate; a second set of conductive contacts in the cavity of the package substrate, wherein the bridge is electrically coupled to the second set of conductive contacts, and wherein the second set of conductive contacts are electrically coupled to the first set of conductive contacts via the plurality of conductive traces; and a third set of conductive contacts below the EIC, wherein the EIC is electrically coupled to the bridge via the third set of conductive contacts, in addition to the accompanying features of the independent claim and any intervening claims. The device described by the above claim incudes a unique configuration of optical and electronic components.
Claim 12 inherits the allowability of claim 11 on which it depends.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MARC E MANHEIM/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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