Prosecution Insights
Last updated: April 19, 2026
Application No. 17/853,597

STACKED TRANSCEIVER AND WAVEGUIDE LAUNCHER ARRAY

Non-Final OA §103
Filed
Jun 29, 2022
Examiner
PHAM, TUAN
Art Unit
2649
Tech Center
2600 — Communications
Assignee
Intel Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
90%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
794 granted / 968 resolved
+20.0% vs TC avg
Moderate +8% lift
Without
With
+7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
14 currently pending
Career history
982
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
54.4%
+14.4% vs TC avg
§102
17.3%
-22.7% vs TC avg
§112
11.5%
-28.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 968 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Introduction This is a response to the applicant’s response filed on 12/30/2025. Claims 1-16 are currently presented in the instant application. Claims 17-25 are withdrawn. Drawings The drawing submitted on 06/29/2022 has been considered by Examiner and made of record in the application file. Specification The specification submitted on 06/29/2022 has been considered by Examiner and made of record in the application file. Election/Restrictions Applicant’s election without traverse of Group I, claims 1-16 in the reply filed on 12/30/2025 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 9 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mantrawadi et al. (US Pub. No.: 2022/0329271, hereinafter, “Mantrawadi”) in view of Elsherbini et al. (US Pub. No.: 2018/0090803, hereinafter, “Elsherbini”). Regarding claim 1, Mantrawadi teaches a package comprising (see figure 24A, IC package 2402, [0160]): a waveguide launcher (see figure 24A, plurality of waveguide launchers 2406 and 2408, [0160]); transceiver circuitry electrically coupled with the waveguide launcher (see figures 24A-24B, RF IC 2404 is connected to 2 side waveguide launcher, [0160]); and wherein the waveguide launcher and at least a portion of the transceiver circuitry are in a stack formation with respect to a plane of the waveguide launcher (see figures 24A-24B, RF IC 2404, 2 side waveguide launcher, RF IC 2404 is positioned to partially overlap the first waveguide launcher structure 2406 and second waveguide launcher structure 2408, [0146, 0160]). It should be noticed that Mantrawadi fails to teach a waveguide launcher array. However, Elsherbini teaches a waveguide launcher array (see figure 5, plurality of waveguide 150A-150F, waveguide launcher 110A-100F, it is clearly seen that the waveguide launcher 110A-100F is a waveguide launcher array because it is supporting the plurality of waveguide 150A-150F, [0053]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Elsherbini into view of Mantrawadi in order to provide the energy transfer from the millimeter-wave launcher to the waveguide member is maximized. Regarding claim 9, after combine, Elsherbini teaches a waveguide launcher array (see figure 5, plurality of waveguide 150A-150F, waveguide launcher 110A-100F, it is clearly seen that the waveguide launcher 110A-100F is a waveguide launcher array because it is supporting the plurality of waveguide 150A-150F, [0053]). Mantrawadi further teaches the waveguide launcher is in a layer that includes electrical routings; and wherein the layer is physically coupled with the transceiver circuitry (see figures 14b, 24A-24B, RF IC 2404, 2 side waveguide launcher, RF IC 2404 is positioned to partially overlap the first waveguide launcher structure 2406 and second waveguide launcher structure 2408, [0123, 0146, 0160], it is clearly seen that the waveguide launcher is in a layer). Regarding claim 15, Mantrawadi further teaches the package is coupled with a substrate, wherein the substrate further includes a die on the substrate, the die electrically coupled with the transceiver circuitry (see figures 3A, 5A, 11, 14B, 24A-24B, RF IC 2024, [0081, 0094, 0016-0017, 0205]). Regarding claim 16, Mantrawadi further teaches the die is electrically coupled with the transceiver circuitry using a selected one or more of: a bridge, an interconnect, conductive traces, or a routing layer proximate to a side of the substrate (see figures 3A, 5A, 11, 14B, 24A-24B, RF IC 2024, [0081, 0094, 0016-0017, 0205]). Claim(s) 2-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mantrawadi et al. (US Pub. No.: 2022/0329271, hereinafter, “Mantrawadi”) in view of Elsherbini et al. (US Pub. No.: 2018/0090803, hereinafter, “Elsherbini”) as applied to claim 1 above, and further in view of TODA (US Pub. No.: 2015/0295098). Regarding claim 2, Mantrawadi disclosed transceiver (see [0146, 0150]). Mantrawadi and Elsherbini, in combination, fails to teach the transceiver circuitry includes digital circuitry and analog circuitry. However, TODA teaches teach the transceiver circuitry includes digital circuitry and analog circuitry (see figure 1A, chip package 100, die 140, die 150, [0024, 0070], it is clearly seen that the transceiver is included ADC and DAC). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of TODA into view of Mantrawadi and Elsherbini in order to process the analog and digital signal. Regarding claim 3, after combine, Mantrawadi teaches the waveguide launcher array and at least a portion of the transceiver are in the stack formation (see figures 24A-24B, RF IC 2404, 2 side waveguide launcher, RF IC 2404 is positioned to partially overlap the first waveguide launcher structure 2406 and second waveguide launcher structure 2408, [0146, 0160]). TODA teaches the transceiver is included ADC and DAC (see [0024]). Rearrangement of Parts In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice). PNG media_image1.png 18 19 media_image1.png Greyscale Regarding claim 4, TODA further teaches the digital circuitry is in a first die and the analog circuitry is in a second die that is separate and distinct from the first die (see figure 1A, die 140, 150 and 160, [0024]). Claim(s) 5-8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mantrawadi et al. (US Pub. No.: 2022/0329271, hereinafter, “Mantrawadi”) in view of Elsherbini et al. (US Pub. No.: 2018/0090803, hereinafter, “Elsherbini”) and further in view of TODA (US Pub. No.: 2015/0295098) as applied to claim 1 above, and further in view of Demin et al. (US Pub. No.: 2014/0291835, hereinafter, “Demin”). Regarding claim 5, TODA teaches first and second die (see figure 1A, chip package 100, die 140, die 150, [0024, 0070]). Mantrawadi, Elsherbini and TODA, in combination, fails to teach the second die is electrically coupled with the waveguide launcher array through backside metal layers of the second die. However, Demin teaches the die is electrically coupled with the waveguide launcher array through backside metal layers of the die (see figure 6, [0042-0045]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Demin into view of Mantrawadi, Elsherbini and TODA in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Regarding claim 6, Mantrawadi, Elsherbini, TODA and Demin, in combination, teaches all the limitation of claim 6. It appear to examiner that arrange a backside metal layer of the first die is facing in a first direction away from the waveguide launcher array, and wherein a backside metal layer of the second die is facing in a second direction toward the waveguide launcher array would depend more upon the choice of the manufacturer and the choice of engineering, than on any inventive concept. Rearrangement of Parts In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice). Regarding claim 7, Mantrawadi, Elsherbini, TODA and Demin, in combination, fails to teach the first die is implemented in a scaled digital node, and wherein the second die is an RF-optimized node. Examiner, however, takes Official Notice that such features are well known in the art of telecommunications. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Mantrawadi, Elsherbini, TODA and Demin in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Regarding claim 8, Mantrawadi, Elsherbini, TODA and Demin, in combination, fails to teach the first die and the second die are embedded in a selected one of: a ceramic interposer or a glass interposer. Examiner, however, takes Official Notice that such features are well known in the art of telecommunications. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Mantrawadi, Elsherbini, TODA and Demin in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Regarding claim 10, Mantrawadi, Elsherbini, TODA and Demin, in combination, fails to teach the electrical routings in the layer provide power to the transceiver circuitry. Examiner, however, takes Official Notice that such features are well known in the art of telecommunications. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Mantrawadi, Elsherbini, TODA and Demin in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mantrawadi et al. (US Pub. No.: 2022/0329271, hereinafter, “Mantrawadi”) in view of Elsherbini et al. (US Pub. No.: 2018/0090803, hereinafter, “Elsherbini”) as applied to claim 1 above, and further in view of Kamgaining et al. (US Pub. No.: 2018/0191049, hereinafter, “Kamgaining”). Regarding claim 11, Mantrawadi and Elsherbini, in combination, fails to teach a connector for a plurality of waveguides coupled with the waveguide launcher array. However, Kamgaining teaches a connector for a plurality of waveguides coupled with the waveguide launcher array (see figure 9A, a plurality of waveguides 130, waveguide launcher array 212A, 212B, connector 312, [0058]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Kamgaining into view of Mantrawadi and Elsherbini in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Regarding claim 12, Kamgaining further teaches a first subset of the plurality of waveguides are transmit waveguides, and a second plurality of the waveguides are receive waveguides (see figure 1, [0031]). Regarding claim 13, Kamgaining further teaches a connector for a plurality of waveguides coupled with the waveguide launcher array (see figure 9A, a plurality of waveguides 130, waveguide launcher array 212A, 212B, connector 312, [0058]). Mantrawadi, Elsherbini and Kamgaining, in combination, fails to teach connector for a selected one or more of: is a dielectric clad dielectric waveguide or a metallic shielded dielectric waveguide. Examiner, however, takes Official Notice that such features are well known in the art of telecommunications. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Mantrawadi, Elsherbini and Kamgaining in order to increased data transfer rates, switching architectures that require longer interconnects, and extremely cost and power competitive solutions. Allowable Subject Matter Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 14, the prior art made of record fails to clearly teach or fairly suggest the feature of the metallic shielded dielectric waveguide that has a first end at the connector, and a second end opposite the first end; and a dielectric clad dielectric waveguide converter at the second and of the metallic shielded dielectric waveguide, wherein the dielectric clad dielectric waveguide converter couples the metallic shielded dielectric waveguide with a dielectric clad dielectric. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tuan A. Pham whose telephone number is (571) 272-8097, the fax number is (571) 273-8097 and the email is tuan.pham01@uspto.gov. The examiner can normally be reached on Monday through Friday, 8:30 AM-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yuwen (Kevin) Pan can be reached on (571) 272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUAN PHAM/ Primary Examiner, Art Unit 2649
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Prosecution Timeline

Jun 29, 2022
Application Filed
Sep 08, 2022
Response after Non-Final Action
Jan 25, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
90%
With Interview (+7.6%)
2y 5m
Median Time to Grant
Low
PTA Risk
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