DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Status of Claims This Office Action is in response to the application filed on 6/30/2022. Claims 1-20 are presently pending and are presented for examination. Information Disclosure Statement The information disclosure statement (IDS) submitted on 6/30/2022, 4/7/2023 and 11/24/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 18 and 20 is/are rejected under 35 U.S.C. 102 ( a)(1) as being anticipated by Hwang (US 20200274402). As to claim 18, Hwang discloses a method for controlling charging of a power reception device (Fig. 9-10 receiver 2) , the method comprising: receiving power from a wireless power transmitter ([0025] transmitter 1 configured to wirelessly transmit a power signal and a receiver 2 configured to wirelessly receive the power signal) ; rectifying the received power to convert the received power into direct current (DC) power (Fig. 1, 5 and 10 rectifier 22) ; monitoring a voltage of the rectified DC power to measure a modulation depth (regulator 27 [0036]-[0042]) ; identifying a detuning switching circuitry to perform data modulation based on the modulation depth ([0035] When the rectifier output voltage VRECT 2100 excessively increases and is higher than the OVP level for protecting the receiver 2, the OVP_CTRL signal 230 of FIG. 1 becomes HIGH. Then, the switches M3 23-3 and M4 23-4 are turned on by the OVP_CTRL signal 230 ..[0041]-[0042] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage… the switches M1 23-1 and M2 23-2 are turned off. Then, the rectifier output voltage VRECT 2100 returns to a state … without increasing beyond the maximum voltage or decreasing below the minimum voltage. Accordingly, the rectifier output voltage VRECT 2100 converges into a range between the maximum voltage and the minimum voltage) ; controlling a modulation circuit such that data is modulated by means of the identified detuning switching circuitry and limiting the modulation depth such that the modulation depth belongs to a specified range ([0041] -[0042] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage, the modulated communication signal COMM_mod 2400, which is the output signal of the logic AND circuit 273, becomes LOW …. When the modulated communication signal COMM_mod 2400 is LOW, the switches M1 23-1 and M2 23-2 are turned off …Then, the rectifier output voltage VRECT 2100 returns to a state … without increasing beyond the maximum voltage or decreasing below the minimum voltage. Accordingly, the rectifier output voltage VRECT 2100 converges into a range between the maximum voltage and the minimum voltage ); and controlling the modulation circuit based on the data to be transmitted to the wireless power transmitter (Fig. 6 [0039]-[0045]). As to claim 20, Hwang discloses the method of claim 18, wherein the limiting of the modulation depth includes: dynamically selecting the detuning switching circuitry to perform the data modulation and controlling the modulation depth to belong to the specified range ([0035] When the rectifier output voltage VRECT 2100 excessively increases and is higher than the OVP level for protecting the receiver 2, the OVP_CTRL signal 230 of FIG. 1 becomes HIGH. Then, the switches M3 23-3 and M4 23-4 are turned on by the OVP_CTRL signal 230 ..[0041]-[0042] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage… the switches M1 23-1 and M2 23-2 are turned off) . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1,3-4, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20200274402 ). As to claim 1, Hwang discloses a power reception device (Fig.5 receiver 2) , comprising: a power reception circuitry (receiver 2) ; a communication circuit (regulator 27 and switch M1 23-1-2 and capacitors Covp 25 and Cm 24) ; a modulation depth monitoring circuit (regulator 27 [0036]-[0042]) ; and at least one controller electrically connected with the power reception circuitry, the communication circuit, and the modulation depth monitoring circuit (converter 27) , wherein the power reception circuitry includes: a receive circuit configured to receive power from a wireless power transmitter and include a coil and a first capacitor (Fig. 5 , L2,C2) and a rectifier circuit configured to rectify the power received by the receive circuit to convert the power into direct current (DC) power (Fig. 1 0 rectifier 22) , wherein the communication circuit includes: a plurality of detuning switching circuitries ( switch M1 23-1-4 and capacitors Covp 25) , each of which includes a second capacitor and a switch ( switch M1 23-1-4 and capacitors Covp 25) , and changes a voltage of the power received in the coil (Fig. 6 [0042]) , and a modulation circuit configured to turn on or off the switch based on a control signal received from the at least one processor (Fig. 5-6 [0036]-[0045] Then, the switches M3 23-3 and M4 23-4 are turned on by the OVP_CTRL signal 230 … … the switches M1 23-1 and M2 23-2 are turned off ) , wherein the modulation depth monitoring circuit monitors a voltage of the rectified DC power to measure a modulation depth and provides the at least one processor with the modulation depth (Fig. 6 [0039]-[0045]) , and wherein the at least one controller is configured to: identify a detuning switching circuitry to perform data modulation among the plurality of detuning switching circuitries based on the modulation depth ([0035] When the rectifier output voltage VRECT 2100 excessively increases and is higher than the OVP level for protecting the receiver 2, the OVP_CTRL signal 230 of FIG. 1 becomes HIGH. Then, the switches M3 23-3 and M4 23-4 are turned on by the OVP_CTRL signal 230 ..[0041]-[0042] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage… the switches M1 23-1 and M2 23-2 are turned off. Then, the rectifier output voltage VRECT 2100 returns to a state … without increasing beyond the maximum voltage or decreasing below the minimum voltage. Accordingly, the rectifier output voltage VRECT 2100 converges into a range between the maximum voltage and the minimum voltage) , control the modulation circuit such that data is modulated by means of the identified detuning switching circuitry and limits the modulation depth such that the modulation depth belongs to a specified range ([0041] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage, the modulated communication signal COMM_mod 2400, which is the output signal of the logic AND circuit 273, becomes LOW …. When the modulated communication signal COMM_mod 2400 is LOW, the switches M1 23-1 and M2 23-2 are turned off ) , and control the modulation circuit based on the data to be transmitted to the wireless power transmitter (Fig. 6 [0039]-[0045]) . Hwang does not disclose/teach the controller of Hwang to be at least one processor nor teaches the at least one processor is configured to perform the steps identified in Hwang above . It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the controller of Hwang to be the at least one processor wherein the at least one processor is configured to perform the steps identified in Hwang above in order to speed up processing time and reduce human error . As to claim 3, Hwang teaches the power reception device of claim 1, wherein the at least one processor is further configured to: dynamically select the detuning switching circuitry to perform the data modulation and controls the modulation depth to belong to the specified range ([0035] When the rectifier output voltage VRECT 2100 excessively increases and is higher than the OVP level for protecting the receiver 2, the OVP_CTRL signal 230 of FIG. 1 becomes HIGH. Then, the switches M3 23-3 and M4 23-4 are turned on by the OVP_CTRL signal 230 ..[0041]-[0042] When the comparator output signal CLAMP1 2500 is LOW, which indicates that the rectifier output voltage VRECT 2100 is higher than a preset maximum voltage or lower than a preset minimum voltage… the switches M1 23-1 and M2 23-2 are turned off ) . As to claim 4, Hwang teaches the power reception device of claim 1, wherein the at least one processor is further configured to: select the detuning switching circuitry to perform the data modulation and selects a capacitance value associated with the data modulation ([0035] [0041]-[0042]. Capacitor values of switches M1-M4) . As to claim 16, Hwang teaches the power reception device of claim 1, wherein the at least one processor is further configured to: when a modulation voltage is less than or equal to a second threshold voltage and is greater than or equal to a minimum modulation voltage, adjust a modulation setting value to an upper value (Fig. 10 and [0056] the rectifier output voltage VRECT 2100 cannot increase beyond VERCTS+Voff2. Nor can it decrease below VRECTS−Voff1.) . Claim s 2,8, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20200274402) in view of Oshima (US 20180375387) . As to claim 2, Hwang teaches the power reception device of claim 1, wherein the modulation depth monitoring circuit is configured to: obtain a voltage of the rectified DC power when the modulation circuit turns on the switch as a first voltage for each of a plurality of packets received by the communication circuit , obtain a voltage of the rectified DC power when the modulation circuit turns off the switch as a second voltage for each of the plurality of packets ([0007]-[0009],[0041]-[0042][0048] The switches M1 23-1 and M2 23-2 are turned on and off by the modulated communication signal COMM_mod 2400) . Hwang does not disclose/teach calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth . Oshima teaches calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth ( [0055] The averaging circuit 45 is a circuit that detects the average voltage A of the output voltages V3 of the rectifying circuit 44 ) It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the power reception device of Hwang to calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth in order detects the presence/absence of a leakage based on the average voltage detected by the average voltage detection circuit ([0007] of Oshima) in order to detect faults ([0003] of Oshima). As to claim 8, Hwang teaches the power reception device of claim 1, wherein the at least one processor is further configured to: when packet modulation occurs as wireless charging is started, measure the modulation depth for respective packets ([0036] by appropriately controlling fluctuation of the rectifier output voltage VRECT 2100..and Fig. 8 [0051]-[0052]). Hwang does not disclose/teach to calculate an average value. Oshima teaches calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth ( [0055] The averaging circuit 45 is a circuit that detects the average voltage A of the output voltages V3 of the rectifying circuit 44 ) It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the power reception device of Hwang to when packet modulation occurs as wireless charging is started, measure the modulation depth for respective packets to calculate an average value in order detects the presence/absence of a leakage based on the average voltage detected by the average voltage detection circuit ([0007] of Oshima) in order to detect faults ([0003] of Oshima). As to claim 19, Hwang discloses the method of claim 18, wherein the measuring of the modulation depth includes: obtaining a voltage of the rectified DC power when the modulation circuit turns on a switch as a first voltage for each of a plurality of packets received by a communication circuit; obtaining a voltage of the rectified DC power when the modulation circuit turns off the switch as a second voltage for each of the plurality of packets ([0007]-[0009],[0041]- [0042][0048] The switches M1 23-1 and M2 23-2 are turned on and off by the modulated communication signal COMM_mod 2400) . Hwang does not disclose/teach calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth . Oshima teaches calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth ( [0055] The averaging circuit 45 is a circuit that detects the average voltage A of the output voltages V3 of the rectifying circuit 44 ) It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the method device of Hwang to calculate an average value of difference values between the first voltage and the second voltage of each of the plurality of packets as the modulation depth in order detects the presence/absence of a leakage based on the average voltage detected by the average voltage detection circuit ([0007] of Oshima) in order to detect faults ([0003] of Oshima). Claim s 5 -7 ,10-15 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20200274402 ) in view of Kim ( WO2020085865 ) . Note: Examiner uses Kim (WO2020085865) to make rejection but relies on the machine translation to clarify position. As to claim 5, Hwang teaches the power reception device of claim 1. Hwang does not disclose/teach wherein the at least one processor is further configured to: change a capacitance value of the second capacitor to implement a capacitance value associated with the data modulation, when the second capacitors are variable capacitors. Kim teaches wherein the at least one processor is further configured to: change a capacitance value of the second capacitor to implement a capacitance value associated with the data modulation, when the second capacitors are variable capacitors ( Fig. 4b the first capacitor 410 or the second capacitor 415 may include a variable capacitor ) . It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the power reception device of Hwang to wherein the at least one processor is further configured to: change a capacitance value of the second capacitor to implement a capacitance value associated with the data modulation, when the second capacitors are variable capacitors in order to increase the modulation depth of the information to perform amplitude shift keying communication protocol . As to claim 6, Hwang teaches the power reception device of claim 1. Hwang does not disclose/teach a memory storing a plurality of capacitance values associated with the data modulation in a form of a modulation control table, wherein the at least one processor is further configured to: select any one mode of implementing the any one capacitance value among a plurality of modes according to use or not, the plurality of modes being included in the modulation control table Kim teaches a plurality of capacitance values associated with the data modulation and wherein the controller is further configured to: select any one mode of implementing the any one capacitance value among a plurality of modes according to use or not (Fig. 4b the first capacitor 410 or the second capacitor 415 may include a variable capacitor) . It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the processor of Hwang to include a plurality of capacitance values associated with the data modulation and wherein the at least one processor is further configured to: select any one mode of implementing the any one capacitance value among a plurality of modes according to use or not in order to increase the modulation depth of the information to perform amplitude shift keying communication protocol. Hwang in view of Kim does not disclose/teach a memory storing a plurality of capacitance values in a form of a modulation control table nor teaches the plurality of modes being included in the modulation control table. It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to include a memory storing a plurality of capacitance values in a form of a modulation control table and the plurality of modes being included in the modulation control table in order to increase the modulation depth of the information to perform amplitude shift keying communication protocol. As to claim 7, Hwang in view of Kim teaches the power reception device of claim 6, wherein the modulation control table is configured such that a capacitance value changed upon the data modulation increases as an upper value changes (pg. 15 of Kim …. the capacitance value of the fourth capacitor may be variable to increase the modulation depth of the information.) As to claim 10, Hwang teaches the power reception device of claim 1. Hwang does not disclose/teac h wherein the at least one processor is further configured to: when a magnitude of a modulation voltage during any one packet is greater than or equal to a first threshold voltage for upward modulation, increase a modulation voltage of a next packet . Kim teaches wherein the at least one processor is further configured to: when a magnitude of a modulation voltage during any one packet is greater than or equal to a first threshold voltage for upward modulation, increase a modulation voltage of a next packet ( pg. 15 of Kim …. increase the modulation depth of information ) . It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the power reception device of Hwang to wherein the at least one processor is further configured to: change a capacitance value of the second capacitor to implement a capacitance value associated with the data modulation, when the second capacitors are variable capacitors in order to increase the modulation depth of the information to perform amplitude shift keying communication protocol. As to claim 11, Hwang in view of Kim teaches the power reception device of claim 10, wherein the at least one processor is further configured to: when a magnitude of the modulation voltage is greater than or equal to the first threshold voltage and when the modulation voltage continues increasing, decrease a magnitude of a next modulation voltage to the first threshold voltage or less (Fig. 10 and [0056]) . As to claim 12, Hwang teaches the power reception device of claim 1. Hwang does not disclose/teac h wherein the at least one processor is further configured to: when a magnitude of a modulation voltage during any one packet is less than or equal to a first threshold voltage for downward modulation, decrease a modulation voltage of a next packet to a second threshold voltage or less through a voltage of a modulation off voltage or less . Kim wherein the at least one processor is further configured to: when a magnitude of a modulation voltage during any one packet is less than or equal to a first threshold voltage for downward modulation, decrease a modulation voltage of a next packet to a second threshold voltage or less through a voltage of a modulation off voltage or less ( pg. 15 of Kim …. increase the modulation depth of information ) . It would have been obvious to a person of ordinary skill in the art, before the effective filing date, to modify the power reception device of Hwang to wherein the at least one processor is further configured to: when a magnitude of a modulation voltage during any one packet is less than or equal to a first threshold voltage for downward modulation, decrease a modulation voltage of a next packet to a second threshold voltage or less through a voltage of a modulation off voltage or less in order to increase the modulation depth of the information to perform amplitude shift keying communication protocol. As to claim 13, Hwang in view of Kim teaches the power reception device of claim 12, wherein the at least one processor is further configured to: when a magnitude of the modulation voltage is less than or equal to the second threshold voltage, increase a magnitude of a next modulation voltage (Fig. 10 and [0056] of Hwang ) . As to claim 14, Hwang in view of Kim teaches the power reception device of claim 12, wherein the at least one processor is further configured to: when the modulation voltage is greater than or equal to the first threshold voltage and is less than or equal to a maximum modulation voltage, adjust a modulation setting value to a lower value (Fig. 10 and [0056] of Hwang the rectifier output voltage VRECT 2100 cannot increase beyond VERCTS+Voff2) . As to claim 15, Hwang in view of Kim teaches the power reception device of claim 14, wherein the at least one processor is further configured to: when the modulation voltage increases in a next packet, adjust the modulation setting value to an upper value ( pg. 15 of Kim ….increase the modulation depth of information) . As to claim 17, Hwang teaches the power reception device of claim 1, wherein the at least one processor is further configured to: when a modulation voltage decreases in a next packet, adjust a modulation setting value to a lower value ( pg. 15 of Kim ….increase the modulation depth of information) . Allowable Subject Matter Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding dependent claim 9 , Although the prior art discloses a power reception device, comprising: a power reception circuitry; a communication circuit; a modulation depth monitoring circuit; and at least one processor electrically connected with the power reception circuitry, the communication circuit, and the modulation depth monitoring circuit, wherein the power reception circuitry includes: a receive circuit configured to receive power from a wireless power transmitter and include a coil and a first capacitor, and a rectifier circuit configured to rectify the power received by the receive circuit to convert the power into direct current (DC) power, wherein the communication circuit includes: a plurality of detuning switching circuitries, each of which includes a second capacitor and a switch and changes a voltage of the power received in the coil, and a modulation circuit configured to turn on or off the switch based on a control signal received from the at least one processor, wherein the modulation depth monitoring circuit monitors a voltage of the rectified DC power to measure a modulation depth and provides the at least one processor with the modulation depth, and wherein the at least one processor is configured to: identify a detuning switching circuitry to perform data modulation among the plurality of detuning switching circuitries based on the modulation depth, control the modulation circuit such that data is modulated by means of the identified detuning switching circuitry and limits the modulation depth such that the modulation depth belongs to a specified range, and control the modulation circuit based on the data to be transmitted to the wireless power transmitter , wherein the at least one processor is further configured to: when packet modulation occurs as wireless charging is started, measure the modulation depth for respective packets to calculate an average value, the prior art of record does not disclose or teach the combination of : “ wherein the at least one processor is further configured to: take an average value for the other samples except for an upper certain rate and a lower certain rate among all sample values taking an average to calculate the average value of the modulation depth ” . Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion and Related Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Safaee et al ( US 20250112501 ) is cited for having wireless power transfer coil in accordance with an amplitude shift keying modulation scheme having a plurality of modulation depths. However, Safaee is filed after the effective filing date . Staring ( US 20140232201 ) is cited for having The approach of the system of FIG. 1 allows the modulation depth to be reduced while still allowing a reliable demodulation to be performed by the power receiver 105 . However Staring does not have a plurality of detuning circuits. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT TYNESE V MCDANIEL whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (313)446-6579 . The examiner can normally be reached on FILLIN "Work schedule?" \* MERGEFORMAT M to F, 9am to 530pm . If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at 571-27 0-7166 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TYNESE V MCDANIEL/ Primary Examiner, Art Unit 2859