DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Action is FINAL and is in response to the amendment filed March 23rd, 2026. Claims 1-4, 6-15, and 17-20 are pending, of which claims 1-4, 6-15, and 17-20 are currently rejected. Claims 5 and 16 have been cancelled by Applicant.
Response to Arguments
The amendment filed March 23rd, 2026 has been entered. Claims 1-4, 6-15, and 17-20 remain pending in the application. Applicant’s amendments have overcome each and every claim objection, drawing objection, and 101 rejections previously set forth in the Non-Final Office Action mailed December 23rd, 2025.
Drawing Objection
Applicant has submitted Corrected Drawings to address the previous objections to the drawings, resolving the objections to the drawings. Therefore, the previous objections to the Drawings have been withdrawn.
Claim Objections
Applicant has amended the claims to address the objections as previously set forth in the Office Action mailed December 23rd, 2025. Therefore, the previous objections to the Claims have been withdrawn. However, a new claim objection has been made.
See Claim Objections.
Claim Rejections - 35 USC § 112(b)
New 112(b) rejections have been made as necessitated by amendments. See Claim Rejections - 35 USC § 112.
Claim Rejections - 35 USC § 101
Applicant has presented arguments regarding the rejections under 35 USC § 101 and amended claims, resolving some of the rejections under 35 USC § 101. Therefore, the previous rejections for claims 1-12 and 19-20 under 35 USC § 101 have been withdrawn. Claim rejections under 35 USC § 101 for claims 13-15 and 17-18 have been sustained.
Applicant alleges that in regards to claim 13, similar arguments to claim 1 apply to claim 13 (Applicant Remarks Pg. 22). More specifically, Applicant alleges that (i) recited hardware elements with math operations are integrated into specific ALU hardware improvements (Applicant Remarks: Pg. 17), (ii) there is an improvement in processor technology by a particular machine architecture (Applicant Remarks: Pg. 17), (iii) and that the claimed invention cannot be practically performed in the human mind (Applicant Remarks: Pg. 18).
Examiner respectfully disagrees. Regarding point i, while for claim 1 this argument is applicable, and Applicant did in fact amend new limitations into the claims to integrate the abstract idea into a practical application (i.e., limitations referencing the exponent adjustment circuit), Applicant did not amend these limitations into claim 13. The only new limitation included in claim 13 is related to the precision of the intermediate computation result, which ultimately falls under mathematical relationships. As such point i is moot in regards to claim 13. As to point ii, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology (MPEP 2106.05(a)(II)). The inventive concept cannot be furnished by the unpatentable law or nature (or natural phenomenon or abstract idea) itself. MPEP 2106.05.I. See also MPEP 2106.05(a). The judicial exception alone cannot provide the improvement. As to point iii, the abstract idea of claim 13 was not classified under mentals, to which Applicant’s argument would be applicable. The abstract idea of claim 13 was classified under mathematical concepts. As such, point iii is moot in regards to claim 13.
Therefore, claim rejections under 35 USC § 101 are sustained for claims 13-15 and 17-18.
See Claim Rejections - 35 USC § 101.
Prior Art Rejections
Applicant’s arguments regarding the previously cited art have been fully considered and are partially persuasive (with regards to claims 1-12 and 19-20). Arguments with regards to claims 13-18 have been considered but are not persuasive.
Applicant alleges that claim 13 is allowable for the same reasons that claim 1 is allowable because claim 13 recites the method that the apparatus of claim 1 performs.
However, claim 1 is considered allowable due to its inclusion of the recitation of the exponent adjustment circuit, which is not recited anywhere in claim 13.
Additionally, Applicant alleges that Henry does not explicitly teach claim 13 because Henry does not teach the second precision multiplier for outputting an intermediate computation result for each of the combinations into an accumulator for the output computation result (Applicant Remarks: Pg. 26), and that Henry does not explicitly teach separate accumulators for the distinct multiplications of the different combinations.
Examiner respectfully disagrees. First of all, as can be seen in Fig. 4 of Henry, at 422-428 distinct multiplications are computed based on the various combinations of the decomposed floating point values, as indicated by the various arrows crisscrossing from the setting of values to the multiplications. Additionally, the distinct multiplications of the various combinations are sent to be accumulated at 432 as shown in Fig. 4. Furthermore, while Applicant alleges Henry does not claim separate accumulators for distinct multiplications of the different combinations, no where in claim 13 are the separate accumulators specifically recited. Therefore, Henry still does in fact teach claim 13 and therethrough dependents.
See Claim Rejections - 35 USC § 102, Claim Rejections - 35 USC § 103 and Allowable Subject Matter.
Claim Objections
Claims 3-11 are objected to because of the following informalities:
Claim 3 line 3 the limitation “the floating-point number decomposition circuit is further configured to” is incomplete.
Claims 4-11 are objected to based on their dependence upon claim 3.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 13-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Regarding claim 13, at Step 1, the claim is directed to a statutory category of invention (method).
At Step 2A, Prong 1, Examiner notes that the claim recites an abstract idea. Claim language recites a floating-number decomposition into a plurality of lower precision values and carrying out operations through the use of combinations of the lower precision values.
Below are the limitations of claim 13 that recite an abstract idea under mathematical concepts:
decomposing each to-be-computed first-precision floating-point number to obtain at least two second-precision floating-point numbers, a second precision of the second-precision floating-point number is lower than a first precision of the first-precision floating-point number;
determining various combinations comprising two second-precision floating-point numbers obtained by decomposing different first-precision floating-point numbers;
wherein the intermediate computation result is a first-precision intermediate computation result, and the computation result is a first-precision computation result;
determining a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination.
All limitations as indicated describe “mathematical concepts”.
At Step 2A Prong 2, further additional elements not reciting mathematical equations and mathematical calculations thereof include:
obtaining a plurality of to-be-computed first-precision floating-point numbers;
inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination.
There are insignificant extra-solution activities that must be made of note as shown below:
obtaining a plurality of to-be-computed first-precision floating-point numbers (data gathering falling under insignificant extra-solution activity)
inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination (inputting of data or a result is well-known in the art).
At Step 2B, the additional elements do not, either alone or in combination, amount to significantly more than the recited judicial exception. As stated in at Step 2A Prong 2, the claim does no more than generally link the abstract idea to a computer system. For these reasons, claim 13 does not amount to significantly more than the abstract idea.
In regards to the insignificant extra-solution activity found in this limitation “obtaining a plurality of to-be-computed first-precision floating-point numbers”, this action describes mere data gathering that is recited at a high level of generality. Per MPEP 2106.05(d)(II), the courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network). This limitation therefore remains insignificant extra-solution activity even upon reconsideration. Thus, this limitation does not amount to significantly more.
In regards to the insignificant extra-solution activity found in this limitation “inputting the second-precision floating-point numbers”, this action describes data inputting that is recited at a high level of generality. As is known in the art, inputting of data is a basic function of underlying hardware in any computer (Patterson: Pg. 15 Section 1.3 Lines 2-4). This limitation therefore remains insignificant extra-solution activity even upon reconsideration. Thus, this limitation does not amount to significantly more.
Claim 13 is not eligible.
Regarding claim 14, at Step 1, the claim is directed to a statutory category of invention (method).
At Step 2A, Prong 1, Examiner notes that the claim recites an abstract idea.
Below are the limitations of claim 14 that further recite an abstract idea under mathematical concepts:
determining an exponent bias value corresponding to each second-precision floating-point number; and
the determining a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination comprises:
adjusting, based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result; and
performing a summation operation on the adjusted intermediate computation results corresponding to all the combinations to obtain the computation result for the plurality of first-precision floating-point numbers.
All limitations as indicated describe “mathematical concepts”.
At Step 2A Prong 2, there are no further additional elements.
At Step 2B, there are no further additional elements that amount to significantly more than the recited judicial exception. For these reasons, claim 14 does not amount to significantly more than the abstract idea.
Claim 14 is not eligible.
Regarding claim 15, at Step 1, the claim is directed to a statutory category of invention (method).
At Step 2A, Prong 1, Examiner notes that the claim recites an abstract idea.
Below are the limitations of claim 15 that further recite an abstract idea under mathematical concepts:
based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result
adding the exponent of the intermediate computation result corresponding to each combination of second-precision floating-point numbers and the exponent bias value corresponding to the second-precision floating-point number in each combination, to obtain the adjusted intermediate computation result.
All limitations as indicated describe “mathematical concepts”.
At Step 2A Prong 2, there are no further additional elements.
At Step 2B, there are no further additional elements that amount to significantly more than the recited judicial exception. For these reasons, claim 15 does not amount to significantly more than the abstract idea.
In regards to the insignificant extra-solution activity found in this limitation “based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result”, this action describes mere data gathering that is recited at a high level of generality. Per MPEP 2106.05(d)(II), the courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network). This limitation therefore remains insignificant extra-solution activity even upon reconsideration. Thus, this limitation does not amount to significantly more.
Claim 15 is not eligible.
Regarding claim 17, at Step 1, the claim is directed to a statutory category of invention (method).
At Step 2A, Prong 1, Examiner notes that the claim recites an abstract idea.
Below are the limitations of claim 17 that further recite an abstract idea under mathematical concepts:
performing format conversion on each first-precision intermediate computation result to obtain a third-precision intermediate computation result corresponding to each combination, wherein precision of the third-precision intermediate computation result is higher than precision of the first-precision intermediate computation result;
the adjusting, based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result comprises:
adjusting, based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the third-precision intermediate computation result corresponding to each combination, to obtain an adjusted third-precision intermediate computation result; and
the performing the summation operation on the adjusted intermediate computation results corresponding to all the combinations to obtain the computation result for the plurality of first-precision floating-point numbers comprises:
performing the summation operation on the adjusted third-precision intermediate computation results corresponding to all the combinations to obtain a third-precision computation result for the plurality of first-precision floating-point numbers.
All limitations as indicated describe “mathematical concepts”.
At Step 2A Prong 2, further additional elements not reciting mathematical equations and mathematical calculations thereof include:
the inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination
inputting the second-precision floating-point numbers in each combination into the second-precision multiplier to obtain a first-precision intermediate computation result corresponding to each combination,
There are insignificant extra-solution activities that must be made of note as shown below:
the inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination (inputting of data or a result is well-known in the art)
inputting the second-precision floating-point numbers in each combination into the second-precision multiplier to obtain a first-precision intermediate computation result corresponding to each combination, (inputting of data or a result is well-known in the art)
At Step 2B, the additional elements do not, either alone or in combination, amount to significantly more than the recited judicial exception
In regards to the insignificant extra-solution activity found in this limitation “the inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination”, this action describes data inputting that is recited at a high level of generality. As is known in the art, inputting of data is a basic function of underlying hardware in any computer (Patterson: Pg. 15 Section 1.3 Lines 2-4). This limitation therefore remains insignificant extra-solution activity even upon reconsideration. Thus, this limitation does not amount to significantly more.
In regards to the insignificant extra-solution activity found in this limitation “inputting the second-precision floating-point numbers in each combination into the second-precision multiplier to obtain a first-precision intermediate computation result corresponding to each combination”, this action describes data inputting that is recited at a high level of generality. As is known in the art, inputting of data is a basic function of underlying hardware in any computer (Patterson: Pg. 15 Section 1.3 Lines 2-4). This limitation therefore remains insignificant extra-solution activity even upon reconsideration. Thus, this limitation does not amount to significantly more.
Claim 17 is not eligible.
Regarding claim 18, at Step 1, the claim is directed to a statutory category of invention (method).
At Step 2A, Prong 1, Examiner notes that the claim recites an abstract idea.
Below are the limitations of claim 18 that recite an abstract idea under mathematical concepts:
the performing the format conversion on the each first-precision intermediate computation result to obtain the third-precision intermediate computation result corresponding to each combination comprises:
performing zero padding processing on an exponent and a mantissa of each first-precision computation intermediate result to obtain the third-precision intermediate computation result corresponding to each combination of second-precision floating-point numbers.
All limitations as indicated describe “mathematical concepts”.
At Step 2A Prong 2, there are no additional elements.
At Step 2B, there are no additional elements, either alone or in combination, that amount to significantly more than the recited judicial exception. For these reasons, claim 18 does not amount to significantly more than the abstract idea.
Claim 18 is not eligible.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “the computation result” on line 16. There is lack of antecedent basis for this limitation. Appropriate correction is required.
Claim 1 recites the limitation “the intermediate computation result” on lines 22-23. It is unclear if this “intermediate computation result” is the same as “the adjusted intermediate computation result” of lines 18-19 or the “the intermediate computation result” of line 14. Appropriate correction is required. For examination purposes, “the intermediate computation result” of lines 22-23 will be construed to be “the adjusted intermediate computation result” of lines 18-19.
Because claims 2-4 and 6-12 depend on claim 1, claims 2-4 and 6-12 are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 13 is rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by Henry et al. (US 2019/0042244 A1), included in the IDS filed 01/30/2023 (hereinafter “Henry”).
Henry teaches:
A floating-point number multiplication computation method, the method comprising:
obtaining a plurality of to-be-computed first-precision floating-point numbers (Fig. 4 shows obtaining of plurality of floating point values);
decomposing each to-be-computed first-precision floating-point number to obtain at least two second-precision floating-point numbers (Abstract, operands being decomposed into plurality of lower precision values; Fig. 4 shows operands A and B being decomposed into a plurality of lower precision operands), a second precision of the second-precision floating-point number is lower than a first precision of the first-precision floating-point number (Fig. 4A and B operands go from first precision 32 to second precision 16 bits, which is lower than 32 bits);
determining various combinations comprising two second-precision floating-point numbers obtained by decomposing different first-precision floating-point numbers (Fig. 4 shows different combinations of the lower precision decomposed operands 422 424 426 428);
inputting the second-precision floating-point numbers in each combination into a second-precision multiplier to obtain an intermediate computation result corresponding to each combination (Fig. 4 shows different combinations of the lower precision decomposed operands 422 424 426 428 with multiplications on each of the combinations), wherein the intermediate computation result is a first-precision intermediate computation result, and the computation result is a first-precision computation result (¶ 0094 multiplication operations of 422-428 i.e., intermediate computation result can already be in the first precision, end computation result is in the first precision FP32); and
determining a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination (Fig. 4 multiplication of different combinations of decomposed floating point operands with accumulation of values occurs through summation operation of all combinations resulting in first precision computation result Fig. 4 element 432 and further discussed in ¶ 0094).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Henry further in view of Langhammer (US 2018/0321909 A1) included in the IDS filed 01/28/2023 (hereinafter “Langhammer”).
Regarding claim 14, Henry teaches:
The method according to claim 13, after the decomposing each to-be-computed first-precision floating-point number to obtain at least two second-precision floating-point numbers, further comprising:
the determining a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination (Henry: Fig. 4 shows different combinations of the lower precision decomposed operands 422, 424, 426, 428, each of the combinations are multiplied to obtain intermediate computation results) comprises:
performing a summation operation on the intermediate computation results corresponding to all the combinations to obtain the computation result for the plurality of first-precision floating-point numbers (Henry: accumulation of values occurs through summation operation of all combinations, resulting in first precision computation result Fig. 4 element 432 and further discussed in ¶ 0094, with output as computation result in first precision).
Henry does not explicitly teach:
determining an exponent bias value corresponding to each second-precision floating-point number; and
adjusting, based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result.
However, Langhammer teaches exponent handling circuitry that adjust respective exponents of floating-point operands based on an adjustable bias based on the precisions of the operands (Langhammer: Claim 13).
It would be obvious to combine the adjusting by an exponent bias based on precisions as taught by Langhammer with the method as taught by Henry as both teachings are directed towards operations on lower precision operands. One with ordinary skill in the art would be motivated to combine the teachings because doing so would allow for adjusted operands to be computed more accurately (Langhammer: Claim 13).
Henry in view of Langhammer therefore teaches:
The method according to claim 13, after the decomposing each to-be-computed first-precision floating-point number to obtain at least two second-precision floating-point numbers, further comprising:
determining an exponent bias value corresponding to each second-precision floating-point number; and
the determining a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination comprises:
adjusting, based on the exponent bias value corresponding to the second-precision floating-point number in each combination, an exponent of the intermediate computation result corresponding to each combination, to obtain an adjusted intermediate computation result; and
performing a summation operation on the adjusted intermediate computation results corresponding to all the combinations to obtain the computation result for the plurality of first-precision floating-point numbers.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Henry in view of Langhammer further in view of Sun et al. (US 2021/0019116 A1) (hereinafter “Sun”).
While Henry in view of Langhammer teaches the adjustment based on an exponent bias value corresponding to the second-precision floating point numbers (Langhammer: Claim 13), Henry in view of Langhammer does not teach the adjustment occurring by adding the exponent of the intermediate computation result with the exponent bias value.
However, Sun teaches adjusting of exponents by adding the exponent bias (Sun: ¶ 0038).
It would be obvious to combine the adjustment by addition of the exponent with the exponent bias as taught by Sun with the method as taught by Henry in view of Langhammer as all teachings are directed towards floating-point computations and management of precisions of operands. One with ordinary skill in the art would be motivated to combine the teachings because this would comply with the IEEE 754 standard as well as to be able to carry out computations with various precisions allowing for more flexibility in computations (Sun: ¶ 0038)
Allowable Subject Matter
Claims 1-12 and 17-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and rewritten in independent form to include all of the limitations of the base claim and any intervening claims.
Limitations of allowable claim 3 were brought up to be included in claim 1, therefore making claim 1 (and dependent claims) allowable.
Applicant claims an arithmetic logic unit wherein the arithmetic logic unit as in claim 1 comprises:
An arithmetic logic unit in a processor, the arithmetic logic unit comprising:
A floating-point number decomposition circuit configured to:
decompose each input to-be-computed first-precision floating-point number into at least two second-precision floating-point numbers, a second precision of the second-precision floating-point number being lower than a first precision of the first-precision floating-point number and output, to an exponent adjustment circuit, an exponent bias value corresponding to each second-precision floating-point number;
a second-precision multiplier configured to:
receive a combination comprising two second-precision floating-point numbers obtained by decomposing different first-precision floating-point numbers;
perform a multiplication operation on the second-precision floating-point numbers in each combination; and
output, to the exponent adjustment circuit, an intermediate computation result corresponding to each combination wherein the intermediate computation result is a first-precision intermediate computation result, and the computation result is a first-precision computation result;
wherein the exponent adjustment circuit configured to output an adjusted intermediate computation result to an accumulator; and
wherein the accumulator is configured to:
perform an operation to obtain a computation result for the plurality of to-be-computed first-precision floating-point numbers based on the intermediate computation result corresponding to each combination.
The specific reason for indication of allowable subject matter is the outputting from the floating-point number decomposition to the exponent adjustment circuit an exponent bias, as well as outputting from the second-precision multiplier to the exponent adjustment circuit the intermediate computation result, and lastly outputting an adjusted intermediate computation result to the accumulator, and having operations occurring with respective combinations of the second-precision floating-point values.. Henry discloses the claimed invention according to the claim mappings above. Henry does not explicitly disclose the respective outputting to the exponent adjustment circuit from the various circuitries or outputting the adjusted computation result to the accumulator as claimed.
Langhammer discloses integrated circuits including floating-point multiplier circuits. Langhammer additionally discloses multiplier circuits in communication with exponent handling circuitry that adjust respective exponents of floating-point operands based on an adjustable bias based on the precisions of the operands (Langhammer: Claim 13). However, Langhammer does not explicitly disclose the respective outputting to the exponent adjustment circuit from the various circuitries or outputting the adjusted computation result to the accumulator as claimed.
Claims 4-12 dependent on claim 1 are therefore also allowable.
Claims 17-18 are allowable for the same reason as indicated in the Office Action mailed December 23rd, 2025.
Claim 19 included allowable limitation from claim 3 as well, therefore claim 19 and dependent claim 20 are also allowable.
Conclusion
Applicant's amendment necessitated the new reasons of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARIA DE JESUS RIVERA whose telephone number is (571)272-2793. The examiner can normally be reached Monday-Friday 7:30AM-5PM.
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/M.D.R./Examiner, Art Unit 2151
/James Trujillo/Supervisory Patent Examiner, Art Unit 2151
Prosecution Insights