Prosecution Insights
Last updated: July 17, 2026
Application No. 17/856,086

Data Center Rack Including an Ultracapacitor Module

Final Rejection §103
Filed
Jul 01, 2022
Priority
Jul 06, 2021 — provisional 63/218,566
Examiner
THOMAS, ERIC W
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kyocera Corporation
OA Round
4 (Final)
82%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
80%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
1042 granted / 1264 resolved
+14.4% vs TC avg
Minimal -2% lift
Without
With
+-2.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
38 currently pending
Career history
1293
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
76.7%
+36.7% vs TC avg
§102
9.4%
-30.6% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1264 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 1/23/2026 have been fully considered but they are not persuasive. The rejection of at least claim(s) 1 under 35 U.S.C. 103 as unpatentable over Rivera et al. (US 2018/0337372) in view of MK (Supercapacitor Module, Supercap Power Module, Ultracapacitor Module) and Kanouda et al. (US 20030222618) is maintained. Regarding claim 1, Rivera et al. disclose in fig. 1, 2, 5, an uninterruptible power supply for use a data center rack [0001], comprising: a ultracapacitor module (10, 110 - [0016]) comprising a plurality of ultracapacitors (30, [0016]) that fit in a chamber of a rack. Rivera et al. disclose the claimed invention except for the ultracapacitor module has an output voltage of 12 V to 100 V (20 to 80 V or 48 V), and the rack includes a plurality of chambers openings that include computing devices and wherein the plurality of chamber openings and the at least one chamber opening are presented in a vertical array. Kanouda et al. disclose a rack (fig.1) containing information processing apparatuses (26 - computing devices) housed within chambers (see fig. 1), arranged in a vertical array (fig. 1). Additionally, an uninterrupted power supply chamber (1) is integrated into the same vertical configuration ([0003], Fig. 1). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the data center rack of Rivera et al. to incorporate multiple chamber openings for computing devices, with the ultracapacitor module chamber arranged in the same vertically configuration, since such a modification would provide a data venter rack with a backup power source utilizing multiple ultracapacitors, achieving high enhanced space efficiency and superior cooling performance. MK teaches an ultracapacitor module having an output voltage of 48 V (P: 4 - terminal voltage - 48 V; Rated voltage 48 V). Lacking unexpected results, it would have been obvious to one of ordinary skill in the ultracapacitor module art to form the ultracapacitor module of Rivera et al. so that the module has a terminal / rated voltage (output voltage) of 48 V, since such a modification would form a system having a module with high output voltage. MK modules also have good stability and high conversion efficiency. A) Applicant maintains that any alleged chamber openings within Rivera are presented in a horizontal array, and further, that Rivera fails to provide any teaching or motivation for modifying such disclosed orientation to provide a vertical array. Rather, Rivera teaches that the "energy storage units 30 are sized and positioned to fit within carrier 14 sized to fit within a single large form factor modular data storage slot (see, e.g., FIG. 5B)." (Rivera at 1 [0016]). For instance, as demonstrated by FIGS. 1A and 1B of Rivera, the "energy storage carrier 14 is sized to fit into a modular data storage slot, or bay, or a large form factor server (see, e.g., FIG. 5B.)" (Rivera at 1 [0015]). "By locating the power modules in the modular data storage slots at the front of the server, the power modules are exposed to cooler ambient air temperatures than otherwise would be exposed to." (Rivera at 1 [0014]). Thus, as Rivera teaches that the horizontal array helps position the energy storage units within the energy storage carrier so that the carrier is sized to fit into a modular data storage slot. While the power modules of Rivera are illustrated in a horizontal array, Rivera et al. as combined with Kanouda et al. disclose the claimed limitations. Rivera discloses a power module (10) for use as a back-up power supply for data centers (data center racks) to supply continuous operations. The power module maybe formed in a modular data slot. Kanouda et al. disclose a data center rack comprising chambers that include a chamber for a back-up power module located at the bottom of the rack (see annotated figure below), wherein the rack (fig.1) containing information processing apparatuses (26 - computing devices / control circuit) housed within chambers (see fig. 1), arranged in a vertical array (fig. 1) PNG media_image1.png 492 707 media_image1.png Greyscale Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the data center rack of Rivera et al. to incorporate multiple chamber openings for computing devices, with the ultracapacitor module chamber arranged in the same vertically configuration, since such a modification would provide a data center rack with a backup power source utilizing multiple ultracapacitors, achieving high enhanced space efficiency and superior cooling performance. B) Applicant respectfully submits that Kanouda fails to provide proper motivation to form the data center rack of presently pending independent claim 1 with at least one chamber opening including a mounted ultracapacitor module comprising a plurality of ultracapacitors, wherein the plurality of chamber openings and the at least one chamber opening are presented in a vertical array, at least because Kanouda is allegedly directed towards "[a] DC backup power supply system comprising: a battery; a charge-discharge circuit for charging and discharging a power between said battery and a DC line; and a control circuit for controlling said charge- discharge circuit, wherein said battery has a number of battery cells and cylindrical portions of the battery cells are laid on an approximately horizontal plane." (Kanouda at Claim 1). Notably, Kanouda fails to teach the utilization of a plurality of ultracapacitors and rather teaches that "[e]ach battery cell 15 is a sub-C size nickel-metal-hydride battery (NiMH battery) cell which is about 43 mm in height and about 25.5 mm in diameter." (Kanouda at 'I [0031]). Further, although Applicant acknowledges that Kanouda merely discloses that "[i]n FIG. 4, seven battery cells are serially connected by conductive members 18 and disposed in a horizontal direction as viewed in FIG. 4, and four sets of such serial connections are disposed in a vertical direction," Applicant respectfully submits that this alone fails to provide proper motivation to alter the horizontal array position as taught by Rivera with the energy storage units within the energy storage carrier so that the carrier is sized to fit into a modular data storage slot absent improper hindsight reliance on the presently pending claims. The examiner was relying on the specific teaching of the data center rack configuration (i.e. - chamber openings / at least one chamber openings in a stacked vertical array. In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971). C) Applicant further respectfully submits that neither Rivera nor Kanouda, either alone or in further combination with MK, teach or provide proper motivation to form a data center rack with a plurality of chamber openings including computing devices in combination with at least one chamber opening including a mounted ultracapacitor module comprising a plurality of ultracapacitors wherein the ultracapacitor module has an output voltage of from 12 V to 100 V, wherein the plurality of chamber openings and the at least one chamber opening are presented in a vertical array. Although Applicant acknowledges that the Office Action alleges that the information processing apparatuses of Kanouda are akin to the computing devices of the present disclosure, Applicant respectfully submits that one of ordinary skill in the art would understand that the disclosure of an "information processing apparatus such as a server, a router and a storage," may encompass devices that do not perform computation as required of the claimed computing devices. (Kanouda at 1 [0003]). For instance, routers and storage devices primarily transmit or store data and are not computing devices as claimed. Accordingly, Applicant respectfully submits that none of the cited references teach or suggest a data center rack with a plurality of chamber openings including computing devices in combination with at least one chamber opening including a mounted ultracapacitor module comprising a plurality of ultracapacitors. As seen in Fig. 1 and 6, Kanouda disclose each information processing apparatus (26) includes at least load (39) which comprises a control circuit (36), a disk drive (37) and memory (38). The control circuit is a computing device as it actively processes information and executes control logic. Applicant is encourage to contact the examiner to discuss possible amendments to overcome the current rejection of record. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-3, 5-6, 8, and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rivera et al. (US 2018/0337372) in view of MK (Supercapacitor Module, Supercap Power Module, Ultracapacitor Module) and Kanouda et al. (US 2003/0222618). Regarding claims 1-3, Rivera et al. disclose in fig. 1, 2, 5, an uninterruptible power supply for use a data center rack [0001], comprising: a ultracapacitor module (10, 110 – [0016]) comprising a plurality of ultracapacitors (30, [0016]) that fit in a chamber of a rack. Rivera et al. disclose the claimed invention except for the ultracapacitor module has an output voltage of 12 V to 100 V (20 to 80 V or 48 V), and the rack includes a plurality of chambers openings that include computing devices and wherein the plurality of chamber openings and the at least one chamber opening are presented in a vertical array. Kanouda et al. disclose a rack (fig.1) containing information processing apparatuses (26 – computing devices) housed within chambers (see fig.1), arranged in a vertical array (fig. 1). Additionally, an uninterrupted power supply chamber (1) is integrated into the same vertical configuration ([0003], Fig.1). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the data center rack of Rivera et al. to incorporate multiple chamber openings for computing devices, with the ultracapacitor module chamber arranged in the same vertically configuration, since such a modification would provide a data venter rack with a backup power source utilizing multiple ultracapacitors, achieving high enhanced space efficiency and superior cooling performance. MK teaches an ultracapacitor module having an output voltage of 48 V (P: 4 – terminal voltage – 48 V; Rated voltage 48 V). Lacking unexpected results, it would have been obvious to one of ordinary skill in the ultracapacitor module art to form the ultracapacitor module of Rivera et al. so that the module has a terminal / rated voltage (output voltage) of 48 V, since such a modification would form a system having a module with high output voltage. MK modules also have good stability and high conversion efficiency. Regarding claims 5-6, Rivera et al. disclose the claimed invention except for the ultracapacitor module has a capacitance of from 50 F to 1,000 F. MK teaches an ultracapacitor module having a capacitance of from 50 F to 1000F (500 F - P:4 – terminal voltage – 12V). Lacking unexpected results, it would have been obvious to one of ordinary skill in the ultracapacitor module art to form the ultracapacitor module of Rivera et al. so that the module has a capacitance of from 50 F to 1000 F (500 F), since such a modification would for a system having a module with high capacitance. MK modules also have good stability and high conversion efficiency. Regarding claim 8, Rivera et al. disclose the ultracapacitor module (fig. 5C, 10) includes at least three banks of ultracapacitors (10) each comprising the ultracapacitors (30 – [0016]). Regarding claim 13, the modified Rivera et al. disclose the ultracapacitor module (10) includes external terminals (16, [0016]) for electrical connection to the computing devices. Regarding claim 14, Rivera et al. disclose a data center comprising the data center rack of claim 1 [0001]. Regarding claim 15, Rivera et al. disclose the claimed invention except for the ultracapacitor module includes an enclosure housing the plurality of ultracapacitors and one or more handles. Kanouda et al. disclose an energy storage device module (1) that includes an enclosure housing a plurality of energy storage devices (Fig. 2) and one or more handles (19). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the device of Rivera et al. so that the ultracapacitor module includes an enclosure housing the plurality of ultracapacitors and one or more handles, since such a modification would form a data center rack where the power module can be easily removed. Claim(s) 4, 7, and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rivera et al. (US 2018/0337372) and MK (Supercapacitor Module, Supercap Power Module, Ultracapacitor Module), and Kanouda et al. (US 2003/0222618), as applied to claim 1 above, and further in view of applicant’s admitted prior art (AAPA). Regarding claim 4, Rivera et al. disclose the claimed invention except for Rivera et al. disclose the claimed invention except for the ultracapacitor module has a leakage current of 50 mA or less at a rated voltage and a temperature of 70 degrees C. AAPA teaches that it is well known the art to form a ultracapacitor module having a low leakage current (below 50 mA) at a rated voltage and a temperature of 70 degree C. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the ultracapacitor module of Rivera et al. so that it has a leakage current of 50 mA or less at a rated voltage and a temperature of 70 degrees C, since such a modification would form a data center rack that has an ultracapacitor module with low leakage current. Regarding claim 7, Rivera et al. illustrate 20 ultracapacitors contained in the ultracapacitor module (fig. 2A). Rivera et al. do not expressly state that the ultracapacitor module comprises 18 to 60 ultracapacitors. AAPA teaches that it is well known in the ultracapacitor bank art to form a specific number of capacitors in a ultracapacitor module. Lacking unexpected results, it would have been obvious to a person of ordinary skill in the ultracapacitor module art to include 18 to 60 ultracapacitors in a ultracapacitor module, since such a modification allow for precise control over the total capacitance of the ultracapacitor bank (specific applications). Regarding claim 9, Rivera et al. disclose the claimed invention except for the ultracapacitor banks (10) are connected in parallel. AAPA teaches that connecting capacitor banks in parallel is well known in the ultracapacitor bank art. Lacking unexpected results, it would have been obvious to a person of ordinary skill in the ultracapacitor bank art to connect the ultracapacitor banks of Rivera et al. in parallel, since such a modification would have multiple benefits such as increased capacitance; high voltage rating; improved reliability and redundancy; and high current handling. Claim(s) 10-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rivera et al. (US 2018/0337372) and MK (Supercapacitor Module, Supercap Power Module, Ultracapacitor Module) and Kanouda et al. (US 2003/0222618), as applied to claim 1 above, and further in view of Ma et al. (CN 105633993). Regarding claim 10, Rivera et al. does not specifically state that the ultracapacitor module includes a switch mode power supply. Ma et al. disclose a ultracapacitor module (3) that uses a bidirectional converter (4, switched-mode power supply). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the ultracapacitor module of Rivera et al. to include a bidirectional converter, since such a modification would form a system that would allow stepping up or stepping down of voltage between different components. Regarding claim 11, Rivera et al. disclose the claimed invention except for the ultracapacitor module comprises a converter. Ma et al. disclose a ultracapacitor module (3) that uses a bidirectional converter (4). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the ultracapacitor module of Rivera et al. to include a bidirectional converter, since such a modification would form a system that would allow stepping up or stepping down of voltage between different components. Regarding claim 12, Rivera et al. disclose the claimed invention except for the ultracapacitor module includes a buck converter, a boost converter, or a buck/boost converter. Ma et al. disclose a ultracapacitor module (3) that uses a buck converter, a boost converter, or a buck/boost converter (4). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the ultracapacitor module of Rivera et al. to include a buck converter, a boost converter, or a buck/boost converter, since such a modification would form a system that would allow stepping up or stepping down of voltage between different components. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W THOMAS/Primary Examiner, Art Unit 2847 ERIC THOMAS Primary Examiner Art Unit 2847
Read full office action

Prosecution Timeline

Show 1 earlier event
Jun 20, 2024
Non-Final Rejection mailed — §103
Sep 19, 2024
Response Filed
Jan 02, 2025
Final Rejection mailed — §103
Apr 02, 2025
Request for Continued Examination
Apr 04, 2025
Response after Non-Final Action
Oct 23, 2025
Non-Final Rejection mailed — §103
Jan 23, 2026
Response Filed
May 21, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
82%
Grant Probability
80%
With Interview (-2.1%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1264 resolved cases by this examiner. Grant probability derived from career allowance rate.

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