Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is final and is in response to claims filed on 05/17/2026 via amendment. Claims 1-5, 7-8, 10-18 and 20-24 are pending for examination. Claims 1-3, 7, 10-15, 17-18, and 20 are currently amended. Claims 4-5 and 8 are as previously filed. Claims 21-24 are newly presented.
Response to Arguments
Claim Objections
Applicant has amended the claims at issue, and, therefore, the previous objections have been withdrawn.
Double Patenting
Applicant has amended the claims at issues, and the claims now recite different subject matter. Therefore, the previous rejections have been withdrawn.
Rejections under 35 U.S.C. 103
Applicant’s arguments, see Remarks 13-15, filed 05/17/2026, with respect to claims 1-20 have been fully considered and are persuasive. The rejections under 35 U.S.C. 103 have been withdrawn.
Rejections under 35 U.S.C. 101
Applicant’s arguments regarding the 35 U.S.C. 101 rejections have been fully considered. Regarding the rejection under 35 U.S.C. 101, Applicant argues “The claim is directed to a specific method for processing tensors in a sparse neural network by leveraging the complementary sparsity of process tensors from different neural network nodes”. See Remarks 10.
Examiner respectfully disagrees with Applicant’s arguments. The recitation of the neural network is at a high level of generality and is clearly generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h).
Applicant further argues “The claim does not recite a mathematical concept itself, but rather is based on or involves a mathematical concept to achieve efficient tensor processing for neural network inference”. See Remarks 10.
Examiner respectfully disagrees with Applicant’s arguments. These purported improvements are not recited in the claims.
Applicant further argues “which cannot be reduced to a mathematical equation or concept. These features describe specific data transformation operations tied to neural network architecture, not abstract mathematics”. See Remarks 10.
Examiner respectfully disagrees with Applicant’s arguments. The recitation of the neural network is at a high level of generality and is clearly generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h).
Applicant further argues “The characterization that a person could combine multiple sparse tensors from neural network nodes by overlaying them, perform computations against an activation tensor, separate the resulting products, and accumulate the results by hand using pen and paper does not reflect the reality of these operations, which involve tensor data structures with potentially thousands of values and are inherently tied to computing hardware”. See Remarks 10.
Examiner respectfully disagrees with Applicant’s arguments. The claims as written do not require that the tensors have many values.
Applicant further argues “The claim is directed to the practical application of complementary sparsity techniques to the field of neural network accelerators, which results in improved efficiency by enabling the simultaneous processing of multiple sparse process tensors from different neural network nodes”. See Remarks 11.
Examiner respectfully disagrees with Applicant’s arguments. The recitation of the neural network is at a high level of generality and is clearly generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h). Also, these purported improvements are not recited in the claims.
Examiner encourages Applicant to point to specific paragraphs in the specification for the alleged improvements.
Applicant further argues “This specific combination of steps provides an improvement to tensor processing technology by allowing multiple sparse neural network computations to be processed through a single complementary process tensor, rather than processing each sparse process tensor individually. This is a concrete improvement to how neural network accelerators operate, not merely a generic application of an abstract idea on a general-purpose computer”. See Remarks 11.
Examiner respectfully disagrees with Applicant’s arguments. The recitation of the neural network is at a high level of generality and is clearly generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h). Also, these purported improvements are not recited in the claims.
Applicant further argues “this combination is not conventional, routine, or well-understood in the field, and the Office Action has not established otherwise. These limitations, when combined, advantageously create a method for efficient tensor processing in sparse neural networks that allows multiple sparse process tensors to be operated on simultaneously”. See Remarks 12.
Examiner respectfully disagrees with Applicant’s arguments. The recitation of the neural network is at a high level of generality and is clearly generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h). Also, these purported improvements are not recited in the claims.
Further, it is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements. See the discussion of Diamond v. Diehr, 450 U.S. 175, 187 and 191-92, 209 USPQ 1, 10 (1981)) in subsection II, below. In addition, the improvement can be provided by the additional element(s) in combination with the recited judicial exception... However, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology...”. See MPEP 2106.05(a).
Examiner further notes that pointing to specific improvements to the hardware in the claims or specification, as well as reciting non-generic hardware in the claims can help overcome the rejections under 35 U.S.C. 101.
Information Disclosure Statement
The Information Disclosure Statements (IDS) submitted on 05/17/2026 and 06/17/2026 are in compliance with the provisions of 37 CFR 1.97, 1.98, and MPEP § 609. They have been placed in the application file, and the information referred to therein has been considered as to the merits.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-5, 7-8, 10-15, 17-8, and 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract ideas without significantly more.
With regards to claim 1, at step 1, the claim is directed to a method, which is a statutory category of invention.
At Step 2A Prong 1, the examiner notes that the claim is directed to mental processes and/or mathematical concepts. The claim language has been reproduced below:
A computer-implemented method for operating on tensors, the computer-implemented method comprising: (mental process, evaluation)
combining a plurality of sparse process tensors to a complementary process tensor (mathematical calculation) by overlaying the plurality of sparse process tensors, (mathematical calculation)
the plurality of sparse process tensors corresponding to (mental process, evaluation) a plurality of nodes of a sparse neural network and having non-overlapping locations of active values; (mental process, evaluation)
performing computations between the complementary process tensor and an activation tensor to generate a plurality of products; (mathematical calculation)
separating the plurality of products into groups, each group corresponding to one of the sparse process tensors; and (mental process, evaluation; mathematical calculation)
and accumulating the groups of products to generate a plurality of accumulated values, (mathematical calculation) each accumulated value corresponding to one of the sparse process tensors (mental process, evaluation; mathematical relationship).
Each of the non-bolded limitations are mental processes and/or mathematical calculations. The “the computer-implemented method comprising:” limitation is an evaluation mental process that can be performed by choosing what the method comprises. The “combining a plurality of sparse process tensors to a complementary process tensor” limitation is a mathematical calculation that can be performed by combining the sparse tensors by hand using pen and paper. The “by overlaying the plurality of sparse process tensors” limitation is a mathematical calculation that can be performed by overlaying the tensors by hand using pen and paper. The “the plurality of sparse process tensors corresponding to” limitation is an evaluation mental process that can be performed by choosing what the tensors correspond to. The “and having non-overlapping locations of active values” limitation is an evaluation mental process that can be performed by choosing the structure of the tensors. The “performing computations between the complementary dense process tensor and an activation tensor” limitation is a mathematical calculation that can be performed by performing the computations by hand using pen and paper. The “separating the plurality of products into groups, each group corresponding to one” limitation is an evaluation mental process and mathematical calculation that can be performed by separating the plurality of products by hand using pen and paper. The “and accumulating the groups of products to generate a plurality of accumulated values” limitation is a mathematical calculation that can be performed by accumulating the groups by hand using pen and paper. The “each accumulated value corresponding to one of the sparse process tensors” limitation is an evaluation mental process and mathematical relationship that can be performed by choosing what the accumulated values correspond to.
At Step 2A prong 2, The additional elements are bolded above. the "plurality of nodes of a sparse neural network " is generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h). The claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
At Step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 11, it recites similar language to claim 1 and is rejected for, at least, the same reasons therein. Herein claim 11 is directed towards the statutory category of a machine, thus also satisfying step 1. Under step 2A prong 1, the “A computing device, comprising” limitation is an evaluation mental process that can be performed by choosing what the computing device comprises. The “memory configured to store a model” is an evaluation mental process that can be performed by choosing what the memory is to store. The “a processor coupled to the memory” limitation is an evaluation mental process that can be performed by choosing what the processor is coupled to. The “the processor configured to” limitation is an evaluation mental process that can be performed by choosing what the processor is configured to do.
Under step 2A prong 2, the ‘store’ limitation, as claimed and under BRI, is an additional element that is insignificant extra-solution activity. For example, ‘store’ in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining additional elements (the memory, the processor, etc.) are no more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under step 2B, the claim recites “memory configured to store a model”, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claims 2 and 12, they are directed to an evaluation mental process and mathematical calculation that can be performed by choosing that the sparse tensors are partitioned and partitioning them by hand using pen and paper. Under steps 2A prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 3 and 13, they are directed to mental processes and/or mathematical concepts. The “wherein performing the computations between the complementary process tensor and the activation tensor comprises” limitation is an evaluation mental process that can be performed by choosing what the computations comprises. The “perform elementwise multiplications between values in the complementary process tensor and values in the activation tensor” limitation is a mathematical calculation that can be performed by performing the multiplications by hand using pen and paper. Under steps 2A prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 4 and 14, they are directed to mental processes and/or mathematical concepts. The “wherein separating the plurality of products into groups comprises” limitation is an evaluation mental process that can be performed by choosing what the separating comprises. The “a pre-multiplication re-arrangement of the activation tensor” limitation is a mathematical calculation that can be performed by re-arranging the activation tensor by hand using pen and paper. Under steps 2A prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 5 and 15, they are directed to mental processes and/or mathematical concepts. The “wherein separating the plurality of products into groups comprises” limitation is an evaluation mental process that can be performed by choosing what the separating comprises. The “a post-multiplication re-arrangement of the plurality of products” limitation is a mathematical calculation that can be performed by re-arranging the plurality of products by hand using pen and paper. Under steps 2A prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 7 and 17, they are directed to mental processes and/or mathematical concepts. The “wherein the processor is further configured to” limitation is an evaluation mental process that can be performed by choosing what the processor is configured to do. The “select a subset of the plurality of accumulated values as winners of an activation selection” limitation is an evaluation mental process and mathematical relationship that can be performed by selecting the subset of accumulation values by hand using pen and paper. The “set the remaining of the plurality of accumulated values to zero” limitation is an evaluation mental process and mathematical relationship that can be performed by setting the remaining values to zero by hand using pen and paper. Under step 2A Prong 2, none of the remaining additional elements regarding the generic computer components (i.e. the processor, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Under Step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 8 and 18, they are directed to mental processes and/or mathematical concepts. The “wherein separate the plurality of products into groups comprises” limitation is an evaluation mental process that can be performed by choosing what the separating comprises. The “flattening the plurality of products in a form of a tensor into a one-dimensional array” limitation is a mathematical relationship that can be performed by flattening the tensor by hand using pen and paper. The “re-arranging the one-dimensional array to the groups of products corresponding to the sparse process tensors” limitation is a mathematical relationship that can be performed by re-arranging the array by hand using pen and paper. Under steps 2A prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claims 10 and 20, they are directed to mental processes and/or mathematical concepts. The “wherein the processor is further configured to” limitation is an evaluation mental process that can be performed by choosing what the processor is configured to do. The “combining a second plurality of sparse process tensors to a second complementary process tensor” limitation is a mathematical calculation that can be performed by combining the second plurality of sparse process tensors by hand using pen and paper. The “wherein the plurality of sparse process tensors and the second plurality of sparse process tensors both correspond to nodes” limitation is an evaluation mental process that can be performed by choosing what the plurality of sparse process tensors and the second plurality of sparse process tensors correspond to. Under step 2A Prong 2, none of the remaining additional elements regarding the generic computer components (i.e. the processor, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Under Step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
Claims 21-24 integrate the abstract ideas into a practical application. More specifically, the recitation of the permutation circuit comprising a network of switches integrates the abstract ideas into a practical application.
Allowable Subject Matter
Claims 1-5, 7-8, 10-18 and 20-24 would be allowable if rewritten to overcome the rejections under 35 U.S.C. 101 and 35 U.S.C. 112 set forth in this Office action.
While prior art teaches of merging sparse tensors, prior art fails to teach of overlaying a plurality of sparse tensors having non-overlapping locations of active values to generate a dense tensor.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jakob O Gudas whose telephone number is (571)272-0695. The examiner can normally be reached Monday-Thursday: 7:30AM-5:00PM Friday: 7:30AM-4:00PM.
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/J.O.G./Examiner, Art Unit 2151
/James Trujillo/Supervisory Patent Examiner, Art Unit 2151
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