DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgement
The Amendment filed on 8/7/25, responding to the Office action mailed on 05/09/25, has been entered into the record. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this office action are claims 1-8.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the claim limitation a through-hole having a convex polygonal shape cited in claim 1 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
Amendment filed on 8/7/25 regarding to the title is accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 5/21/25, 9/18/25, 11/24/25, and 3/9/26 were filed after the mailing date of the Non-Final Rejection on 05/09/25. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites “a through-hole having a convex polygonal shape”. The claim limitation “convex” is considered new matter. Applicant’s argument of the claim limitation support in [0028] and Fig. 15 is not sufficient. Although Fig. 15 supports a curved surface shape for through hole 54 in a top-view, it does not support the through-hole being a shape of “convex” polygonal.
Claims 2-8 are rejected for being dependent under claim 1.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Nashida et al. (US 2016/0079133 and Nashida hereinafter).
Regarding to claim 1, Nashida teaches a semiconductor device (Fig. 1(a) and 1(b)), comprising: an insulating substrate (2);
a plurality of conductor portions (3) formed on the insulating substrate;
a semiconductor element (6) disposed on one of the plurality of conductor portions;
a support member (9) having a flat plate-shape that is disposed at a predetermined distance from another conductor portion of the plurality of conductor portions;
a pin terminal (10) that has a columnar shape and is supported in a state of being inserted through the support member and that is connected to the other conductor portion of the plurality of conductor portions from which the support member is disposed at the predetermined distance; and
a sealing resin (11) that seals the insulating substrate, the plurality of conductor portions, the semiconductor element, and the support member, wherein:
the support member has a through-hole (13) having a convex polygonal shape (Fig. 2(b) and 3(a)) and penetrating in a plate thickness direction of the support member (Fig.1(b)), and
the pin terminal is supported by the support member making point contact with the through-hole as viewed from a longitudinal direction of the pin terminal in a state in which the pin terminal is inserted through the through-hole (Fig.1(b)).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Umeda (US 2020/0350236, cited in previous Office Action) in view of Nashida.
Regarding claim 1, Umeda discloses A semiconductor device comprising:
an insulating substrate (ceramic substrate, 8) [0040];
a plurality of conductor portions formed on the insulating substrate (first and second metal plates, 32, 33)
a semiconductor element (6) disposed on one of the plural conductor portions
a support member (7) having a flat plate-shape that is disposed at a predetermined distance from another conductor portion of the plural conductor portions on the insulating substrate (one of metal plate 32)
a pin terminal (3) that has a columnar shape and is supported in a state of being inserted through the support member and that is connected to the other conductor portion of the plural conductor portions from which the support member is disposed at the predetermined distance (another metal plate 32 under terminal 3 to the right of chip 6); and
a sealing resin (4) that seals the insulating substrate, the plural conductor portions, the semiconductor element, and the support member, wherein:
the support member has a through-hole (12) and penetrating in a plate thickness direction of the support member making point contact with the through-hole as viewed from a longitudinal direction of the pin terminal (direction of pin terminal inserted into lead frame 7) in a state in which the pin terminal is inserted through the through-hole.
Umeda does not explicitly disclose the through-hole having a convex polygonal shape. However, Nashida teaches a semiconductor device comprising a through-hole (13) having a convex polygonal shape (Fig. 2(b) and 3(a)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the through-hole of Umeda to have a convex polygonal shape, since it has been held that a minor change in shape of an element is generally recognized as being within the level of ordinary skill in the art when the change in shape is not significant to the function of the combination.
Regarding claim 2, the combination of Umeda and Nashida teaches the semiconductor device according to claim 1, wherein a space between an outer periphery of the pin terminal and an inner periphery of the through-hole is filled with a conductive bonding material with which the pin terminal and the support member are bonded to each other. Wherein the solder of Umdea is used to bond pin terminals 3 to the lead frame 7 [0044-0046].
Regarding claim 3, Umeda in view of Nashida teaches the semiconductor device according to claim 1, wherein the pin terminal has a facing surface bonded to the through-hole edge with conductive material. Examiner notes that Umeda discloses a pin terminal 3 with an overhanging portion 23 soldered to the support member (7). The overhanging portion constitutes as the “facing surface” of the pin terminal bonded via solder.
Regarding claim 4, Umeda in view of Nashida teaches the semiconductor device according to claim 2, wherein the pin terminal has a facing surface bonded to the through-hole edge with conductive material. Examiner notes that Umeda discloses a pin terminal 3 with an overhanging portion 23 soldered to the lead frame. The overhanging portion constitutes in this case as the “facing surface” bonded via solder. [0086]
Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Umeda in view of Nashida and Takiguchi (US 2014/0198509, cited in previous Office action).
Regarding claims 5, Umeda in view of Nashida teaches the semiconductor device according to claim 1. While Umeda in view of Nashida discloses a semiconductor device with through holes however, neither Umeda nor Nashida explicitly disclose that an inner peripheral surface of a corner part of the through-hole is formed in a curved surface shape.
Takiguchi in an analogous art discloses a semiconductor device with through-holes (14), wherein an inner peripheral surface of a corner part (13d) of the through-hole is formed in a curved surface shape. Specifically, Takiguchi teaches a through-hole (14) in a positioning member (4) with curved inner corners (13d) at the junction of the plate spring (13) and base section (12) to reduce stress concentration [0022].
A person of ordinary skill in the art would recognize that applying curved corners from the teachings of Takiguchi to the polygonal shape through-hole (54) of Umeda in view of Nashida would mitigate stress during pin terminal insertion [0080], an obvious modification to the through-holes for improved mechanical reliability of the semiconductor device.
Regarding claims 6, Umeda in view of Nashida teaches the semiconductor device according to claim 2. While Umeda in view of Nashida discloses a semiconductor device with through holes however, neither Umeda nor Nashida explicitly disclose that an inner peripheral surface of a corner part of the through-hole is formed in a curved surface shape.
Takiguchi in an analogous art discloses a semiconductor device with through-holes (14), wherein an inner peripheral surface of a corner part (13d) of the through-hole is formed in a curved surface shape. Specifically, Takiguchi teaches a through-hole (14) in a positioning member (4) with curved inner corners (13d) at the junction of the plate spring (13) and base section (12) to reduce stress concentration [0022].
A person of ordinary skill in the art would recognize that applying curved corners from the teachings of Takiguchi to the polygonal shape through-hole (54) of Umeda in view of Nashida would mitigate stress during pin terminal insertion [0080], an obvious modification to the through-holes for improved mechanical reliability of the semiconductor device.
Regarding claims 7, Umeda in view of Nashida teaches the semiconductor device according to claim 3. While Umeda in view of Nashida discloses a semiconductor device with through holes however, neither Umeda nor Nashida explicitly disclose that an inner peripheral surface of a corner part of the through-hole is formed in a curved surface shape.
Takiguchi in an analogous art discloses a semiconductor device with through-holes (14), wherein an inner peripheral surface of a corner part (13d) of the through-hole is formed in a curved surface shape. Specifically, Takiguchi teaches a through-hole (14) in a positioning member (4) with curved inner corners (13d) at the junction of the plate spring (13) and base section (12) to reduce stress concentration [0022].
A person of ordinary skill in the art would recognize that applying curved corners from the teachings of Takiguchi to the polygonal shape through-hole (54) of Umeda in view of Nashida would mitigate stress during pin terminal insertion [0080], an obvious modification to the through-holes for improved mechanical reliability of the semiconductor device.
Regarding claims 8, Umeda in view of Nashida teaches the semiconductor device according to claim 4. While Umeda in view of Nashida discloses a semiconductor device with through holes however, neither Umeda nor Nashida explicitly disclose that an inner peripheral surface of a corner part of the through-hole is formed in a curved surface shape.
Takiguchi in an analogous art discloses a semiconductor device with through-holes (14), wherein an inner peripheral surface of a corner part (13d) of the through-hole is formed in a curved surface shape. Specifically, Takiguchi teaches a through-hole (14) in a positioning member (4) with curved inner corners (13d) at the junction of the plate spring (13) and base section (12) to reduce stress concentration [0022].
A person of ordinary skill in the art would recognize that applying curved corners from the teachings of Takiguchi to the polygonal shape through-hole (54) of Umeda in view of Nashida would mitigate stress during pin terminal insertion [0080], an obvious modification to the through-holes for improved mechanical reliability of the semiconductor device.
Response to Arguments
Applicant’s arguments with respect to claims 1-8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eva Yan Montalvo whose telephone number is (571)270-3829. The examiner can normally be reached M-TH 9AM-7PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, John Fristoe can be reached at (571) 272-4926. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EVA Y MONTALVO/Supervisory Patent Examiner, Art Unit 2818
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