DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/06/2026 has been entered.
Accordingly, claims 1, 3-6, 8-12 and 14-22 are pending in this application. Claims 1, 4-5, 8-12, 15-19 and 21 are currently amended; clams 3, 14, 20 and 22 are previously presented; claim 6 is original; claims 2, 7 and 13 are canceled.
Claim Objections
Claims 18-21 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. In claim 18 line 10, “separate processes” should read “the separate processes” instead because separate processes is already introduced in line 7. Claims 19-21 inherit the same deficiency as claim 18 by reason of dependence.
Claim Interpretation
The term “lazy update” in claim 18 as interpreted as described in paragraph [0075]
The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. For example, assume a method claim requires step A if a first condition happens and step B if a second condition happens. If the claimed invention may be practiced without either the first or second condition happening, then neither step A or B is required by the broadest reasonable interpretation of the claim. If the claimed invention requires the first condition to occur, then the broadest reasonable interpretation of the claim requires step A. If the claimed invention requires both the first and second conditions to occur, then the broadest reasonable interpretation of the claim requires both steps A and B. See MPEP 2111.04 subsection II for more information.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 18-21 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under Step 1, claims 18-21 recite a series of steps and, therefore, is a process.
Under Step 2A prong 1, claim 18 recites
A processor-implemented method, comprising:
determining, by a processor, whether an exponential difference between first data and second data on which an operation set to be performed is greater than a predetermined threshold based on respective exponent identifier fields in the first data and the second data identifying a location of a corresponding shared exponent among a plurality of shared exponents stored in a memory;
performing, at a first time, by the processor, separate processes on exponents of the first data and the second data, and mantissas of the first data and the second data, with a block floating point operation; and
performing, at a second time, by the processor, separate processes on the exponents of the first data and the second data, and the mantissas of the first data and the second data, with the block floating point operation and a lazy update
wherein the lazy update is performed by accumulating one of the first data and the second data that has a smaller exponent, in an accumulator in response to the exponential difference between the first and second data is greater than the predetermined threshold.
The above underlined limitations of determining whether an exponent difference between a first data and a second data is greater than a predetermined threshold and performing a block floating point operation or a block floating point operation and a lazy update based on the determining amounts to processing mathematical relationships and/or calculations that can be practically performed mentally and falls within the “Mathematical Concepts” and/or “Mental Processes” grouping of abstract ideas. The step of “determining”, “performing” and “performing” is a process that under its broadest reasonable interpretation, covers performance of the limitation in the mind. That is, other than reciting “by a processor” and “in an accumulator”, nothing in the claim element precludes the step from practically being performed in the human mind. For example, but for the “by a processor” and “in an accumulator” language, the claim encompasses visually comparing whether an exponential difference value between a first data and a second data is greater than a predetermined threshold value and performing a block floating point addition operation if the exponential difference is less than the predetermined threshold and performing a block floating point addition operation with a lazy update by accumulating one of the first data and the second data that has a smaller exponent if the exponential difference is greater than the predetermined threshold using pen and paper. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: a processor, a memory, and an accumulator. However, the additional elements of “a processor”, “a memory” and “an accumulator” are recited at a high-level of generality (i.e., as a generic computer component for executing a series of mathematical operations; as a generic computer component for storing data; and as a generic accumulator for accumulating) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” (or an equivalent) with the judicial exception. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 18 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a processor”, “a memory” and “an accumulator” are recited at a high-level of generality (i.e., as a generic computer component for executing a series of mathematical operations; as a generic computer component for storing data; and as a generic accumulator for accumulating) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea or merely reciting the words “apply it” (or an equivalent) with the judicial exception. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f) for more information. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 19-21 recite the same abstract idea as claim 18 by reason of dependence. Further, claim 19 recites further details of the abstract idea of the separate processes “wherein the separate processes are at least one or more of addition processes, subtraction processes, and multiplication processes”; and claim 20 recites further abstract idea of “wherein the predetermined threshold is dynamically determined in a data processing process” which falls within the “Mathematical Concepts” and/or “Mental Processes” grouping of abstract ideas. In particular claim 19 does not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claims are directed to recite an abstract idea.
Under step 2A prong 2, claim 20 recites the following additional elements: an electronic device. Claim 21 recites the following additional elements wherein the plurality of shared exponents comprising exponents of a plurality of data are stored into data fields separate from data fields storing the first and second data. However, the additional elements of “an electronic device” in claim 20 is recited at a high-level of generality (i.e., as a generic computer device including a processor) such that it amounts to no more than mere instructions using a generic computer component or merely as a tool to implement the abstract idea. The additional elements of “wherein the plurality of shared exponents comprising exponents of a plurality of data are stored into data fields separate from data fields storing the first and second data” in claim 21 is merely adding an insignificant extra-solution activity. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claims are not integrated into a practical application.
Under step 2B, claims 20 and 21 do not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “an electronic device” in claim 20 is recited at a high-level of generality (i.e., as a generic computer device including a processor) such that it amounts to no more than mere instructions using a generic computer component or merely as a tool to implement the abstract idea. The additional elements of “wherein the plurality of shared exponents comprising exponents of a plurality of data are stored into data fields separate from data fields storing the first and second data” in claim 21 is merely adding an insignificant extra-solution activity. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Storing and retrieving information in memory” as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The claims do not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claims do not amount to significantly more than the abstract idea.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Dellinger et al. (US 12307217 B1), hereinafter Dellinger, in view of Xi et al. (US 20210064986 A1), hereinafter Xi, and Langhammer (US 20180081633 A1). Xi is cited in the IDS submitted on 07/12/2022.
Regarding claim 12, Dellinger teaches a processor-implemented operating method, comprising:
generating a floating-point representation that comprises a sign field, an exponent identifier field, and a mantissa field for a first data and a second data (Dellinger Fig. 1 step 106; Figs. 4 and 10; and col 3 lines 23-26 “The exponent compression parameters include the number of bits in a compressed exponent ("compressed ebit-width") and the exponent bias ("compressed exponent bias") associated with the compressed exponent”; col 3 lines 49-51 “At block 106, the exponents are compressed according to the current compressed ebit-width and current compressed exponent bias associated with the set”; col 8 lines 11-15 “This potentially "rounded" exponent is used for overflow/underflow detection, as well as being converted to the compressed exponent, by subtracting the bias adjustment factor in register 412 from the 8 exponent bits in register 408 by subtractor circuit 414”; col 8 lines 38-41 and 66-67; col 11 lines 16-27; first data and second data – at least two values in the set of floating-point values; floating-point representation - floating-point format in register 434 which includes a sign field (top portion bit [N-1]), an exponent identifier field (middle portion bits [N-2:M]), and a mantissa field (bottom portion bits [M-1:0]),
performing an operation on the first and second data using the floating-point representation (Dellinger Fig. 1 step 110 and col 3 line 56 to col 4 line 6 “The set of floating point values having the compressed exponents is provided at block 110 for additional processing according to the application. For example, the additional processing can entail storing the set of floating point values having the compressed exponents in a memory for later decompressing and processing by a tensor processor, or inputting the set of floating point values having the compressed exponents directly to a processor that is configured to process floating point values having the compressed exponents”), and
wherein, for each of the first and second data, the exponent identifier field comprised a bit value (Dellinger Fig. 10 and col 11 lines 20-27), and
wherein the floating-point representation reduces a total number of bits required to represent each of the first and the second data in the memory by replacing an exponent field with the exponent identifier field having fewer bits than the exponent field, thereby reducing at least one of memory usage or communication bandwidth of transmitting the first and second data (Dellinger Figs. 4 and 10 and col 11 lines 20-27 “An uncompressed 8-bit exponent can be compressed into a 4-bit exponent by subtracting the BAF from the 8-bit value”; col 5 lines 52-55 “The compression of the exponents reduces storage requirements of RAM 318 and bandwidth requirements for providing reading the tensors from the RAM for processing the tensor processor 314”), and
wherein the generating of the floating-point representation of the first data and the second data are performed by a processor configured according to instructions executed by the processor (Dellinger Fig. 3; col 5 lines 31-36; col 7 lines 23-24; and col 11 lines 34-38 “In certain implementations, a programmable circuit is one or more computer circuits programmed to execute a set (or sets) of instructions stored in a ROM or RAM and/or operate according to configuration data stored in a configuration memory”; processor - a host processor 302 and/or a hardware accelerator 304)
Dellinger does not explicitly teach storing, in a memory, a plurality of shared exponents comprising exponents of the first data and the second data into data fields separate from data fields storing the first and second data; wherein, for each of the first and second data, the exponent identifier field comprised a bit value that identifies a location of a corresponding shared exponent among the plurality of shared exponents stored in the memory; performing an operation on the first and second data using the floating-point representation based on the shared exponents; wherein the performing of the operation comprises determining whether an exponential difference between the first data and the second data on which the operation is set to be performed, by the processor, among a plurality of data is greater than a predetermined threshold; and in response to the exponential difference being greater than the predetermined threshold, accumulating one of the first data and the second data that has a smaller exponent, in an accumulator.
However, on the same field of endeavor, Xi discloses storing, in a memory, a plurality of shared exponents comprising exponents of a plurality of data into data fields separate from data fields of the plurality of data; performing an operation on the plurality of data based on the plurality of shared exponents; and wherein, for each of the plurality of data, an exponent identifier field comprises a respective bit value that identifies a location of a corresponding shared exponent among the plurality of shared exponents stored in the memory (Xi Figs. 2-3 and paragraphs [0049-0051, 0055] “the actual number of unique exponent values extracted across all of the parameters is typically one or more orders of magnitude less than the full range of possible exponent values … the number of unique values may not exceed 16 discrete or distinct integer values. In those scenarios, exponent encoder 316 may encode the exponent value set 314 to generate exponent LUT 318 that comprises the unique exponent values (less than 16 values), with the corresponding number of index values. As a result, each parameter's exponent value in this type of scenario may be represented by a 4-bit exponent LUT index value (or less) that identifies the particular exponent value for the parameter … In step 210, the mantissa lookup table, mantissa lookup table index values, exponent lookup table, and exponent lookup table values are provided to at least one processing entity to train the model”).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Dellinger and generalize the teaching of Xi and store, in the memory, a plurality of shared exponents comprising exponents of the first and second data into data fields separate from data fields storing the first and second data; wherein, for each of the first and second data, the exponent identifier field identifies a location of a corresponding shared exponent among the plurality of shared exponents stored in the memory and perform the operation on the first and second data using the floating-point representation based on the plurality of shared exponents in order to store a mapping table of the compressed exponents and the original uncompressed exponents and to reduce storage and bandwidth requirements (Dellinger col 5 lines 52-55; col 11 lines 10-27; Xi paragraphs [0051, 0054]).
Therefore, the combination of Dellinger as modified in view of Xi teaches storing, in a memory, a plurality of shared exponents comprising exponents of the first data and the second data into data fields separate from data fields storing the first and second data; wherein, for each of the first and second data, the exponent identifier field comprised a bit value that identifies a location of a corresponding shared exponent among the plurality of shared exponents stored in the memory; performing an operation on the first and second data using the floating-point representation based on the shared exponents.
Dellinger as modified in view of Xi does not explicitly teach wherein the performing of the operation comprises determining whether an exponential difference between the first data and the second data on which the operation is set to be performed, by the processor, among a plurality of data is greater than a predetermined threshold; and in response to the exponential difference being greater than the predetermined threshold, accumulating one of the first data and the second data that has a smaller exponent, in an accumulator.
However, on the same field of endeavor, Langhammer determining, by a processor, whether an exponential difference between a first data and a second data on which an operation is set to be performed is greater than a predetermined threshold and performing the operation between the first data and the second data using an operation scheme that is determined based on a result of the determining (Langhammer Fig. 4 and paragraph [0046] “adder 200 may include exponent/mantissa comparison and near/far path routing circuitry 400 that receives inputs A and B (i.e., the exponents and mantissa of numbers A and B), compares the exponents and also mantissas of inputs A and B, and splits the numbers into a "near" path and a "far" path. If the difference of the exponents is equal to zero or one, then the near path may be used (where the value of "1" is set as the predetermined threshold value). In the near path, typically only subtraction occurs … On the other hand, if the difference of the exponents is greater than one or for a true addition operation, then then far path may be taken ( e.g., the far path may handle addition for the near values as well)”; exponential difference - difference of the exponents; first data and second data - inputs A and B; predetermined threshold - predetermined threshold value; operation scheme – addition and/or subtraction).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, to modify Dellinger using Langhammer and generalize the teaching of Langhammer by determining whether an exponential difference between first data and second data on which the operation is set to be performed is greater than a predetermined threshold and performing the operation between the first data and the second data using an operation scheme that is determined based on a result of the determining in order to support a wide range of intermediate floating-point sizes such as FP32, FP16, FP17, FP18, FP20, etc., without incurring large area penalties (Langhammer paragraph [0044]) which may be used in a neural network application.
Therefore, the combination of Dellinger as modified in view of Xi and Langhammer teaches wherein the performing of the operation comprises determining whether an exponential difference between the first data and the second data on which the operation is set to be performed, by the processor, among a plurality of data is greater than a predetermined threshold.
Examiner notes that the limitation of “in response to the exponential difference being greater than the predetermined threshold, accumulating one of the first data and the second data that has a smaller exponent, in an accumulator” is a contingent limitation that is not required by the claim if the exponential difference is less than or equal to the predetermined threshold. See claim interpretation section above for more information. Therefore, the combination of Dellinger as modified in view of Xi and Langhammer teaches all the limitations of method claim 12.
Regarding claim 14, Dellinger as modified in view of Xi and Langhammer teaches all the limitations of claim 12 as stated above. Further, Dellinger as modified in view of Xi and Langhammer teaches wherein a total number of bits of the exponent identifier field is determined based on a total number of shared exponents in the plurality of shared exponents (Dellinger col 4 line 59 to col 5 line 4 “Continuing the pre-ceding example, the lower_exp=-12 and the upper_exp=-3, and there are 10 exponent values to represent. The 10 values require 4 exponent bits for representation”; Xi paragraph [0051] “exponent encoder 316 may encode the exponent value set 314 to generate exponent LUT 318 that comprises the unique exponent values (less than 16 values), with the corresponding number of index values. As a result, each parameter's exponent value in this type of scenario may be represented by a 4-bit exponent LUT index value (or less) that identifies the particular exponent value for the parameter”).
Regarding claim 15, Dellinger as modified in view of Xi and Langhammer teaches all the limitations of claim 12 as stated above. Further, Dellinger as modified in view of Xi and Langhammer teaches wherein a total number of bits of the exponent identifier field is less than a total number of bits of each shared exponent (Dellinger col 11 lines 23-25 “An uncompressed 8-bit exponent can be compressed into a 4-bit exponent by subtracting the BAF from the 8-bit value”).
Regarding claim 16, Dellinger as modified in view of Xi and Langhammer teaches all the limitations of claim 12 as stated above. Further, Dellinger as modified in view of Xi and Langhammer teaches wherein the performing of the operation further comprises: performing the operation between the first data and the second data using an operation scheme that is determined based on a result of the determining (Langhammer Fig. 4 and paragraph [0046]).
Allowable Subject Matter
Claims 1, 3-6, 8-11, 17 and 22 are allowed.
Claims 18-21 would be allowable if rewritten to overcome the 35 U.S.C. 101 rejections discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
The reasons for the indication of allowable subject matter are the same reasons the indication of allowable subject matter provided in the non-final office action submitted on 12/11/2025, and in the final office action submitted on 05/05/2026.
Response to Arguments
Applicant's arguments, see remarks page 8, filed 07/06/2026, with respect to the 35 U.S.C. 101 rejection of claims 18-21 have been fully considered but they are not persuasive.
Applicant amended claim 18 to recite “wherein the lazy update is performed by accumulating one of the first data and the second data that has a smaller exponent, in an accumulator in response to the exponential difference between the first and second data is greater than the predetermined threshold”.
Regarding claim 18, Examiner would like to point out that the added feature “accumulating one of the first data and the second data that has a smaller exponent” is a mathematical concept and mental step that can practically be performed by a human with or without using pen and paper. Further, the additional element of “an accumulator” to perform the accumulation is recited at a high-level of generality such that they amount to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception. Further, Applicant has not provided any argument as to how the added features integrates the abstract idea into a practical application in step 2A prong Two or recites significantly more than a judicial exception in Step 2B.
Conclusion
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/Carlo Waje/Examiner, Art Unit 2151 (571)272-5767
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